KR20070040007A - Code overlay method in the embedded system - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of overlaying code in an embedded system, in which a code block necessary for executing a program is copied from a flash memory to a RAM area and executed.

Code overlay method in the embedded system according to the present invention comprises the steps of generating an execution schedule in a formal order of the application program; Compiling an original source of the application program to generate an object file; Determining the image layout of an application to be stored in the flash memory of the embedded system by receiving the generated schedule information, the size of each object file, and the memory information of the embedded system, and generating a main function and a linker script; After performing the linking process using the generated linker script, characterized in that it comprises the step of generating an executable image and transferred to the flash memory of the embedded system.

Host, Embedded System, Code Overlay

Description

CODE OVERLAY METHOD IN THE EMBEDDED SYSTEM

1 is a diagram showing the configuration of a host and an embedded system according to the present invention.

2 is a block diagram showing the structure of a flash memory according to the present invention.

3 is a flowchart illustrating a code overlay method in an embedded system according to the present invention.

4 illustrates a memory layout in accordance with the present invention.

5 illustrates an example of a main function structure in accordance with the present invention.

6 is a layout of a flash memory according to the present invention, illustrating a case where a cluster is performed and a case where a cluster is not performed.

7 shows an example of positioning according to the present invention;

<Explanation of symbols for the main parts of the drawings>

10 ... flash memory 20 ... RAM

30 Main control 40 Host

41 ... schedule generator 42 ... clustering and positioning unit

43 ... Linker part

The present invention relates to a method of overlaying a code in an embedded system, which executes after copying only the necessary code blocks to a RAM area according to a schedule when executing an application program.

Most embedded systems, such as low-end mobile phones and memory card controllers, have internal NAND flash memory and SRAM. Firmware such as bootstrap code is stored in the flash memory. When the system is booted, the firmware is copied to the SRAM and then jumped to a start code address to be driven.

In this case, the size of the SRAM should be larger than the size of the entire program to be copied. The size of the program is gradually increased due to the addition of various functions, while the size of the SRAM is already fixed. Will enter.

In other words, the code size of an application continues to increase as features are added and improved in most embedded systems. However, the size of the RAM is already fixed, so the size of the program that can be executed is limited. To solve this problem, there is a cost problem, such as replacing a larger amount of RAM in hardware.

In addition, if the product is already released and the customer is in use, it is almost impossible to replace the ram, there is a problem that the reliability of the product falls.

It is a first object of the present invention to provide a method of overlaying code in an embedded system to remove a size limitation of an executable program according to RAM capacity in an embedded system.

A second object of the present invention is to provide a method of overlaying code in an embedded system to copy only a block of code requiring run time to a RAM area and to reduce copy overhead when copying.

Code overlay method in the embedded system according to the present invention for achieving the above object,

Generating an execution schedule in a formal order of the application program;

Compiling an original source of the application program to generate an object file;

Determining the image layout of an application to be stored in the flash memory of the embedded system by receiving the generated schedule information, the size of each object file, and the memory information of the embedded system, and generating a main function and a linker script;

After performing the linking process using the generated linker script, characterized in that it comprises the step of generating an executable image and transferred to the flash memory of the embedded system.

Preferably, when the embedded system is initially operated, the bootstrap code of the image downloaded to the flash memory is executed; When the bootstrap code is executed, the main function corresponding to the root function of the application program is copied to RAM, and the copied main function resides in the system and is responsible for executing and loading code blocks of the entire application according to the execution schedule. Characterized in that it comprises a step.

Preferably, the code block execution uses an overlay technique in which only a code block necessary at run time is copied to the RAM area.

Preferably, the clustering and location determination is characterized by applying a genetic algorithm to reduce the copy overhead according to the location and cluster of each code block according to the execution schedule.

Preferably, the size of the RAM is not larger than the size of the application.

On the other hand, the code overlay method in an embedded system according to another embodiment of the present invention,

A flash memory in which bootstrap code and an application program are stored; RAM which is a workspace; In the embedded system comprising a main control unit for controlling the flash memory and RAM,

When the system is booted, bootstrap code is executed to perform hardware initialization; Copying the main function of the application to RAM; And copying and executing only the code blocks necessary for the entire application to the RAM area according to a predetermined execution schedule in the main function copied to the RAM.

Preferably, the main function includes clustered information for loading code blocks that are in a call relationship with each other according to the execution schedule.

Preferably, the main function includes location information on whether a RAM address of an adjacent code block uses the same memory area in consideration of an execution schedule of each code block and each code block RAM address.

Referring to the accompanying drawings, a code overlay method in an embedded system according to an exemplary embodiment of the present invention configured as described above is as follows.

1 is a block diagram of an embedded system according to the present invention.

Referring to FIG. 1, a flash memory 10, which is a nonvolatile memory that stores downloaded images that are moved in units of pages, a RAM (eg, an SRAM) 20 serving as a work space, and the flash memory ( 10) and the main controller 30 connected to the bus 20 to control the bus, and the host 40 for downloading an image executable as a code overlay through the main controller 30.

Here, the flash memory 10 is composed of, for example, a NAND flash memory, and the downloaded application program (ie, an image) is stored. In addition, the flash memory 20 stores a bootstrap code and a code part (not shown) for managing an application download.

Referring to the accompanying drawings, a code overlay apparatus and method in an embedded system according to an exemplary embodiment of the present invention configured as described above are described below.

First, referring to FIG. 1, when the system starts to boot, the main controller 30 copies the bootstrap code stored in the flash memory 10 to the RAM 20 and then executes the bootstrap code. It performs hardware initialization tasks such as initialization.

In addition, the entire application program (including data) in the flash memory 20 is copied to the storage area of the RAM 20. After copying, jump to the beginning of the application and run the application program.

At this time, since the memory size of the RAM 20 is limited in copying the entire application, the present invention prevents the RAM capacity from being exceeded by copying only the currently required codes or codes to be executed in the future. When code is executed in this way, different blocks of code use the same memory address (hereinafter referred to as code overlay).

For this code overlay, the host 40 generates an image executable by the code overlay and downloads the image to the flash memory 10 through the main controller 30.

To this end, the host 40 includes a schedule generation unit 41, a clustering and positioning unit 42, and a linker unit 43. The schedule generating unit 41 targets an application program having a formalized order, and in the case of an application program of an actual embedded system, routines performed by each event according to time are sequentially defined. A schedule is generated on a time basis by a sequential event. Here, the routine is not a function but a collection of functions and is executed for some specific purpose. That is, such an execution schedule is generated by the schedule generator 41.

The clustering and positioning unit 42 receives the generated schedule information and the size of each code block as input, performs clustering and positioning, and generates and outputs a main function, a file generation, and a linker script.

The linker unit 43 reads the generated linker script, analyzes the linker script, and performs a linking operation according to a position instructed by the linker script to generate an executable final image. In addition, the host 40 downloads the image finally generated through the linking operation to the flash memory 10 through the main controller 30 connected to a communication means (not shown).

Specifically, in order to code overlay, codes are divided into several areas according to the physical characteristics of the flash memory 10 and stored. In addition, when the code is read from the flash memory to copy the code to the RAM area, the main controller 30 moves in the page unit in units of the flash memory. 2 is a diagram illustrating a structure of a flash memory.

The page size of the flash memory has a certain size, for example, about 4K. For example, if you try to copy an area of 1K code from flash memory to RAM, all the pages that span 1K are moved into the buffer area inside the flash memory. This causes a problem that the number of copies of the page is increased.

To solve this problem, the present invention clusters related code blocks (functions) and stores the clustered code blocks in a flash memory so as to fall within an integer multiple of a boundary of the page size unit. That is, when the application image is stored in the flash memory, the copy overhead may be reduced by storing the layout of the image using the characteristics of the page unit of the flash memory.

3 is a flowchart illustrating a code overlay method for an embedded system in a host according to the present invention.

Referring to FIG. 3, the original source file is profiled to schedule the functions according to the order in which the functions are executed. The original source file 42 is compiled (43) to produce an object file (44). At this time, you can know the object file.

Here, the original source file is divided into blocks, and if the schedule is A-> B-> C, it consists of code blocks A, B, and C. The A-> B-> C schedule requires three original source files A.c, B.c, and C.c.

Then, the clustering and positioning process is performed (45). At this time, the parameters corresponding to the size of each object file, execution schedule, and memory condition (page size of NAND flash, RAM size) of the system are inputted for clustering and positioning.

Subsequently, an application image layout to be stored in the flash memory is determined by the system memory situation, and a main function (main ()) 46 and a linker script 47, which are in charge of the schedule and loading, are created to input the linker unit. Enter The main function performs loading control according to a schedule, and the linker script performs loading.

Here, the clustering and positioning process applies a genetic algorithm to various possibilities to find an optimal layout that minimizes the copy overhead from the flash memory to the RAM. At the end of the last linking process 48, an executable image is created (49), which downloads the application image into the flash memory of the embedded system.

The linker that performs the linking process is for executing an application program, and the link script refers to how the process is executed. For example, the linker converts the original source code written in C into an assembly by the compiler, which is then converted into an object file by the assembler. In other words, the object file created in this way is put into memory to create an executable file. In this linking process, the linker command file instructs the linker how to combine the object files and place the program data in the embedded system memory. Within that command is the programmer's intended definition of memory and the placement of sections to drive the DSP chip. In other words, the linker actually executes the object file created by executing the application program in the DSP chip.

Referring to Figure 4, the memory layout of the system when the application is executed in the present invention will be described as follows.

In the initial RAM 20, the application images A, B, and C 11, 12, and 13 are stored in the flash memory 10 in the absence of data. When the system operates, that is, at run time, the boot strip code (not shown) is first executed, and then the main function portion corresponding to the root function of the application is copied to the RAM 20.

The main function 21 copied to the RAM 20 always resides in RAM until the system is turned off, and is responsible for executing and loading the entire application according to the schedule information. The loading actually takes place in the linker script. That is, according to the schedule, the necessary code blocks A, B, C (11, 12, 13) stored in the flash memory 10 are loaded and copied to the overlay buffer 22 to execute the application.

5 illustrates an execution schedule and loading as an example of the structure of a main function according to the present invention. 4 and 5, the main function main () executes a code block (function) in the order of "ABABCCC" according to a schedule. If code block A 11 is to be executed and code block A 11 is not in the overlay buffer 22 of the RAM 20, the code block A 11 is transferred from the flash memory 10 to the RAM 20. It will copy it and run it. At this time, there is a time delay when copying from the flash memory 20 to the RAM 10. This can minimize the copy time delay by the clustering and positioning process after the main function executed in the above is copied to the embedded system. That is, the main function may include not only an execution schedule but also clustering information and position determination information.

6 illustrates the function of clustering according to the present invention. A) is a case where no clustering is required, and when code block A data is required, two pages (Page 1, 2) must be read because code block A data is spread over two pages, and code block B data is required separately. In this case, one page (page 3) must be read again. However, b) is a case where clustering is performed, and since code block A data and code block B data are combined into two pages, the code block B data is automatically read when the code block A data is read. If Codeblock A data and Codeblock B data call each other on a schedule, this is very efficient clustering.

As such, by clustering data that is related to each other, it is possible to increase the use of copy time and RAM memory space when calling the clustered data.

7 illustrates an example of positioning according to the present invention.

Referring to FIG. 7, two examples are shown in which all conditions are the same and only positioning is different. Here, the input condition is ABABCCC, the RAM size is 4K, the NAND flash memory page size is 2K, and the code blocks A, B, and C are 2K. The overall application size is 6K and the RAM capacity is 4K.

In the case of a), the same RAM address is assigned to Code Block A and Code Block C, and in the case of b), the same RAM address is assigned to Code Block A and Code Block B. Assigning the same address is exclusive because the two occupy the same memory area. If code block A resides in RAM first and code block C assigned the same area is copied to RAM, the previous code block A is invalidated (deleted). Therefore, if each code block is well positioned according to the execution schedule, it can reduce the considerable copy overhead.

 In case of a), copying occurs only 3 times, while in case of b), it occurs 5 times. This is because Code Blocks A and B call each other because they assign the same address and erase each other.

That is, in the case of a), in the positioning example of the present invention, copying is performed while executing in the order of load A, load B, hit, hit, hit, load C (deleting A), hit, and hit according to execution schedule ABABCCC. Will occur once.

However, in the case of b), it is a conventional problem, while the operation schedule ABABCCC operates under load A, load B (delete A), load A (delete B), load B (delete A), load C, hit, hit, The copy is made five times.

As such, clustering and positioning are performed to generate a minimum copy overhead. For this, a genetic layout is used to find an optimal layout. In general, genetic algorithms continue to leave good genes over generations and continue to cross them to obtain better traits, leaving an optimal solution at the end. Accordingly, code blocks intersecting with each other are determined to be different RAM locations, and code blocks associated with each other do not allocate the same RAM address. In addition, the final code block to be executed is determined as a RAM position that will not be executed in the future, thereby solving the problem of overlapping each other and implementing an optimal layout.

Here, if code block A and code block B are allocated to the same RAM address, the two code blocks are inferior in relation to each other on a schedule. Also, since code block B is not called after code block A is called or vice versa, even if two code blocks are allocated to the same memory, swapping does not occur. Will not occur.

For example, if scheduled in the order of code block ABA, code block A is first called from flash memory and copied. Then code block B is copied. If the same address is allocated, the code block B is loaded again at the location of the code block A, and thus the code block A is deleted. Therefore, the code block A is deleted from the flash memory. This can take a long time, so if the code blocks A and B are related to each other, such as code block ABA, they should not be assigned the same RAM address.

As such, as the application is executed, the application larger than the size of the RAM can be executed. This can add functionality to the application without limiting the size of the memory.

Meanwhile, in the embedded system, when the system is booted, the bootstrap code is executed to perform hardware initialization, and by copying the main function of the application to RAM, the entire function according to a predetermined execution schedule is copied from the main function copied to the RAM. Only the code blocks needed by the application are copied to the RAM area and executed. At this time, the main function is to load the code blocks in the call relationship according to the execution schedule by the clustered information included in the function, the execution schedule of each code block and each code block RAM address by the positioning information In consideration of this, the RAM addresses of adjacent code blocks are called according to whether they use the same memory area.

So far, the present invention has been described with reference to the preferred embodiments, and those skilled in the art to which the present invention pertains to the detailed description of the present invention and other forms of embodiments within the essential technical scope of the present invention. Could be implemented. Here, the essential technical scope of the present invention is shown in the claims, and all differences within the equivalent range will be construed as being included in the present invention.

Code overlay method in the embedded system according to the present invention, when the size of the RAM is smaller than the program in the embedded system, there is an effect that can run an application larger than the size of the RAM without additionally adding or replacing the RAM. .

It also has the effect of adding functionality to the application without limiting memory size.

In addition, it can be applied to existing products on the market.

Overlays also reduce copy time, minimizing increased run time.

Claims (8)

Generating an execution schedule in a formal order of the application program; Compiling an original source file of the application to generate an object file; Determining the image layout of an application to be stored in the flash memory of the embedded system by receiving the generated schedule information, the size of each object file, and the memory information of the embedded system, and generating a main function and a linker script; And performing a linking process using the generated linker script to generate an executable image and to transfer the executable image to a flash memory of an embedded system. The method of claim 1, In the embedded system, when the operation is initially performed, the bootstrap code of the image downloaded to the flash memory is executed; When the bootstrap code is executed, the main function corresponding to the root function of the application is copied to RAM, and the main function resides in the system to perform code block execution and loading of the entire application according to the execution schedule. Code overlay method in an embedded system comprising a. The method of claim 2, The code block execution method of the code overlay in an embedded system, characterized in that for using the overlay technique to copy only the necessary code blocks to the RAM area at runtime. The method of claim 1, The clustering and positioning method is a code overlay method in an embedded system, characterized in that to apply the genetic algorithm to reduce the copy overhead according to the position and cluster of each code block according to the execution schedule. The method of claim 2, And the size of the RAM is not larger than the size of an application. A flash memory in which bootstrap code and an application program are stored; RAM which is a workspace; In the embedded system comprising a main control unit for controlling the flash memory and RAM, Executing the bootstrap code when the system is booted to perform hardware initialization; Copying the main function of the application to RAM; And copying and executing only the code blocks necessary for the entire application in the RAM region according to a predetermined execution schedule in the main function copied to the RAM. The method of claim 6, And the main function includes information clustered for loading of code blocks that are in a call relationship with each other according to the execution schedule. The method of claim 6, In the embedded system, the main function includes location information on whether a RAM area of an adjacent code block uses the same memory area in consideration of an execution schedule of each code block and each code block RAM address. Code overlay method.

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