KR20060098182A - Pedestal structure of plasma depositing equipment for use in semiconductor device manufacturing - Google Patents

Abstract

The present invention relates to a plasma deposition facility for the manufacture of semiconductor devices. In the present invention, in implementing a plasma deposition apparatus for manufacturing a semiconductor device, grooves for O-ring adhesion are formed in the lower surface of the pedestal on which the wafer is seated. As the O-ring is in close contact with the groove formed on the lower surface of the pedestal, it is possible to solve the problem of O-ring marks on the lower surface of the pedestal due to the O-ring installation, which can shorten the PM time and replace the leaked pedestal. As a result, the problem of increased production costs can be solved.

Semiconductor, Plasma, Electrostatic Chuck, Pedestal, Leak

Description

Pedestal structure of plasma depositing equipment for semiconductor device manufacturing

1 shows the structure of a plasma installation according to the prior art.

FIG. 2 illustrates a cross-sectional structure in the A-A 'direction of FIG. 1.

3 shows a pedestal cross-sectional structure of a plasma installation according to the prior art.

4 shows the structure of the lower underside of the pedestal shown in FIG.

5 is a cross-sectional view illustrating a pedestal structure of a plasma deposition apparatus according to a preferred embodiment of the present invention.

FIG. 6 is a structural diagram of a bottom surface of the defestal illustrated in FIG. 5.

* Description of the symbols for the main parts of the drawings *

100: lower electrode plate 102: pedestal

104: O-ring 106a, 106b: groove

The present invention relates to a plasma facility for manufacturing a semiconductor device, and more particularly to a pedestal structure of a plasma facility for manufacturing a semiconductor device.

Recently, with the rapid development of the information communication field and the rapid popularization of information media such as computers, semiconductor devices are also rapidly developing. Therefore, in terms of its functionality, it is required to operate at a high speed and to have a large storage capacity. Therefore, the manufacturing technology of the semiconductor device has been researched and developed in order to maximize integration, reliability and response speed.

The manufacturing technology of a semiconductor device is largely a thin layer deposition process for forming a process film on a semiconductor substrate, and a photolithography process for applying a photoresist film to the process film formed by the thin film deposition process and then patterning the photoresist film. And an etching process for patterning the processed film by using the photosensitive film patterned through the photolithography process as an etching mask.

Among the various unit processes as described above, the thin film deposition process is a process of forming a thin film on the wafer, and can be largely classified into a physical vapor deposition method and a chemical vapor deposition method according to a method of depositing a thin film. Chemical vapor deposition method of forming a thin film on the wafer by chemical reaction after decomposing the compound is widely used.

In addition, the chemical vapor deposition method is characterized in that the APCVD (Atmospheric Pressure Chemical Vapor Deposition) in a atmospheric pressure atmosphere according to the specific conditions under which a chemical reaction occurs to form a thin film, that is, pressure, temperature and energy injected, LPCVD performed in a low pressure atmosphere It can be subdivided further by (Low Pressure CVD) and Plasma Enhanced CVD (PECVD) which is performed under a plasma atmosphere in a low pressure state.

Looking at the configuration of the semiconductor manufacturing equipment of Novellus (Novellus) applied to perform the PECVD process of the various chemical vapor deposition methods described above.

The Novellus semiconductor manufacturing facility is provided with a process chamber through which a chemical vapor deposition process is performed, and a shower head to which a premixed reaction gas is supplied is formed at an inner upper side of the process chamber. In addition, a heater block is installed at an inner lower side of the process chamber to heat the seated wafer to a predetermined temperature when the wafer is seated. In addition, a high frequency radio frequency (HF RF), which is an energy source for dissociating the reaction gas supplied into the process chamber, is applied to the shower head, and a weak DC bias is applied to the heater block. Low frequency radio frequency (LF RF) is applied to cause a thin film to be deposited on the wafer so that some of the ions present in the process chamber are injected into the thin film.

The reaction gas injected into the process chamber is excited in a plasma state by radio frequency power applied between upper and lower electrode plates, and deposits a material film on the wafer using the energy of the plasma. will be. Here, the semiconductor plasma equipment for forming the plasma is basically provided with two electrode plates on the upper side and the lower side of the chamber, the wafer is placed on the lower electrode plate to apply a high frequency power to the upper and lower electrode plate and supplied therebetween. This is to guide the gas to a uniform plasma state. Therefore, in using the semiconductor plasma equipment, a step of preventing the wafer from leaving the electrode plate by vibration or the like under an environment of high temperature and high vacuum should be preceded. As an apparatus for fixing the wafer, A vacuum chuck may be used to secure the wafer using the characteristics. However, the vacuum chuck has a limitation in use because the pressure difference between the vacuum chuck and the external vacuum is not generated when the unit processes are performed under vacuum conditions, and the defect is impossible to precisely fix because the wafer is fixed by suction. have. Therefore, in recent years, electrostatic chucks (ESCs) that chuck wafers using dielectric polarization and electrostatic principles caused by potential differences are more commonly used. In addition, a ring-shaped wafer guard ring is formed around the electrostatic chuck so as to surround the side surface of the wafer mounted on the lower electrode plate so that the wafer is fixed to the lower electrode plate.

1 shows a conventional semiconductor plasma installation, and FIG. 2 shows a cross-sectional structure in the direction A-A 'of FIG. 1.

1 and 2, in the conventional semiconductor plasma equipment, a pedestal 12 on which a wafer is placed is disposed on an upper electrode plate 10, and a wafer 14 is seated on the pedestal 12. . A ring-shaped guard ring 16 surrounds the side surface of the wafer 14. In this case, the guard ring 16 is formed to surround the side surface of the wafer 14, so that only the upper surface of the wafer 14 is exposed to the plasma. An inclined groove 18 is formed on the upper surface of the guard ring 16 to guide and concentrate the ions of the plasma in the direction of the edge of the wafer 14. Therefore, the lifting pin 20 is lowered to the wafer 14 seated on the lifting pin 20 that can be lifted and lowered by the motor or pneumatic cylinder (not shown) through the pedestal 12. When a high frequency power is applied to the lower electrode plate 10 after being adsorbed by the rear helium cooling line 22 mounted on the pedestal 12 and installed on the pedestal 12, a thin film is deposited on the wafer 14. do.

However, when the thin film deposition process is performed using the semiconductor plasma equipment having the structure as described above, O-ring marks are formed on the bottom surface of the pedestal 12, which will be described with reference to FIGS. 3 and 4 below.

First, FIG. 3 shows the cross-sectional structure of the pedestal 12 and the lower electrode plate 10, and FIG. 4 shows the bottom bottom structure of the pedestal 12 with O-ring marks. 3 and 4, a pedestal 12 on which a wafer is seated is formed on the lower electrode plate 10. In addition, an O-ring 24 for firmly fixing the lower electrode plate 10 and the pedestal 12 is formed.

However, when the pedestal 12 is used once to proceed with the thin film deposition process, O-ring marks such as those indicated by reference numerals A and A` are formed on the lower underside of the pedestal. These O-ring marks (A, A`) are not completely removed even if the cleaning process is performed, and even if the O-ring is replaced, leakage occurs because the O-ring film exists on the bottom of the pedestal, which leads to a long PM (Prevent Maintenance) time. There is a problem. In addition, there is a problem in that the total production cost is increased by replacing the leaked pedestal.

An object of the present invention for solving the above problems is to provide a pedestal structure of a plasma equipment for manufacturing a semiconductor device to minimize the occurrence of leakage to shorten the PM time.

Another object of the present invention is to provide a pedestal structure of a plasma installation for manufacturing a semiconductor device, which makes it possible to reduce the production cost.

Plasma deposition equipment according to the present invention for achieving the above object, the lower electrode plate is applied a high frequency voltage for plasma generation; A pedestal positioned on an upper portion of the lower electrode plate, the lower surface of which a groove is formed to closely contact an O-ring; And an O-ring fitted into a groove formed in the lower surface of the pedestal to firmly fix the lower electrode plate and the pedestal to each other.

Preferably, the groove is formed in the center region and the edge region of the pedestal lower surface, respectively.

Hereinafter, with reference to the accompanying drawings will be described in detail the present invention. The present invention is not limited to the embodiments disclosed below, but can be embodied in various other forms without departing from the scope of the present invention, and only the embodiments allow the disclosure of the present invention to be complete and common knowledge It is provided to fully inform the person of the scope of the invention.

FIG. 5 is a cross-sectional view illustrating a pedestal structure of a plasma deposition apparatus according to a preferred embodiment of the present invention, and FIG. 6 is a structural diagram of a lower bottom surface of the depestal.

5 and 6, a pedestal 102 on which a wafer (not shown) is mounted is formed on the lower electrode plate 100 to which a high frequency voltage for plasma generation is applied. In addition, an O-ring 24 for firmly fixing the lower electrode plate 100 and the pedestal 102 is formed. In addition, as the core configuration of the present invention, grooves 106a and 106b are formed on the lower surface of the pedestal 102 to closely contact the O-rings 104 in the center region and the edge region, respectively.

As described above, in the present invention, the grooves 106a and 106b are formed in the center region and the edge region of the lower surface of the pedestal 102, thereby allowing the O-ring 104 to be more closely attached to the pedestal 102.

In addition, in the related art, O-ring marks are formed on the lower surface of the pedestal due to the O-ring positioned between the lower electrode plate and the pedestal, which causes a problem of leakage. However, in the present invention, the grooves 106a and 106b are formed in advance in the position where the O-ring 104 is to be disposed, thereby eliminating the problem that the pedestal is damaged due to the O-ring. As a result of eliminating the problem of damage to the pedestal, the cleaning process performed to remove the O-ring marks is unnecessary, thereby shortening the overall PM time. In addition, it is possible to solve the problem of increased production cost by replacing the leaked pedestal.

As described above, in the present invention, in implementing a plasma deposition apparatus for manufacturing a semiconductor device, grooves for O-ring adhesion are formed on the lower surface of the pedestal on which the wafer is seated. As a result, it is possible to solve the problem of O-ring marks on the pedestal lower surface due to the O-ring to shorten the PM time, it is possible to minimize the increase in production costs due to the leaked pedestal replacement.

Claims (6)

In the pedestal structure of the plasma deposition equipment for manufacturing a semiconductor device, A pedestal structure of a plasma deposition apparatus for manufacturing a semiconductor device, characterized in that a wafer is seated on an upper surface thereof, and a groove for an O-ring fitting is formed on a lower surface thereof. The pedestal structure of a plasma deposition apparatus for manufacturing a semiconductor device according to claim 1, wherein the grooves are formed in the center region and the edge region of the lower surface of the pedestal. In a plasma deposition apparatus for manufacturing a semiconductor device: A lower electrode plate to which a high frequency voltage for plasma generation is applied; And Plasma deposition equipment for manufacturing a semiconductor device, characterized in that located on top of the lower electrode plate, the lower surface includes a pedestal formed with a groove for O-ring contact. 4. The plasma deposition apparatus of claim 3, wherein the grooves are formed in the center region and the edge region of the pedestal lower surface, respectively. In a plasma deposition apparatus for manufacturing a semiconductor device: A lower electrode plate to which a high frequency voltage for plasma generation is applied; A pedestal positioned on an upper portion of the lower electrode plate, the lower surface of which a groove is formed to closely contact an O-ring; And And an O-ring fitting into a groove formed in the lower surface of the pedestal to firmly fix the lower electrode plate and the pedestal to each other. 6. The plasma deposition apparatus of claim 5, wherein the grooves are formed in the center region and the edge region of the pedestal lower surface, respectively.

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