KR20060019910A - Liquid crystal display device and thin film transistor array panel for the same - Google Patents

Abstract

A liquid crystal display device is provided. The liquid crystal display device includes a first insulating substrate, a gate line formed on the first insulating substrate, a gate insulating film formed on the gate line, a data line formed on the gate insulating film and formed in a dual wiring pattern, on the same layer as the gate line. A storage electrode wiring including an auxiliary storage electrode formed in a lower region between the sustain electrode formed adjacent to the pixel area and the dual wiring pattern of the data line, a protective film formed on the data line, and a pixel electrode formed on the protective film. And a second insulating substrate facing the first insulating substrate, and a reference electrode formed on the second insulating substrate. A thin film transistor substrate of a liquid crystal display device is also provided.

Liquid crystal display device, wiring for sustain electrode, coupling, misalignment

Description

Liquid crystal display device and thin film transistor array panel for the same

1 is a partial cross-sectional view of a liquid crystal display when the data lines are normally arranged.

2 is a partial cross-sectional view of the liquid crystal display when the data lines are misaligned.

3 is a layout view of a thin film transistor substrate for a liquid crystal display according to an exemplary embodiment of the present invention.

4 is a layout view of a color filter substrate for a liquid crystal display according to an exemplary embodiment of the present invention.

5 is a layout view of a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 6 is a cross-sectional view taken along line VI-VI 'of FIG. 5.

The present invention relates to a liquid crystal display device and a thin film transistor substrate thereof.

In general, a liquid crystal display device injects a liquid crystal material between an upper substrate on which a reference electrode and a color filter are formed, and a lower substrate on which a thin film transistor and a pixel electrode are formed. By applying a different potential to form an electric field to change the arrangement of the liquid crystal molecules, and through this to control the light transmittance is a device that represents the image.

Among them, the vertical alignment mode liquid crystal display in which the long axis of the liquid crystal molecules are arranged perpendicular to the upper and lower substrates without an electric field is applied, and thus, the contrast ratio is large and the wide viewing angle is easily realized.

Means for implementing a wide viewing angle in a vertical alignment mode liquid crystal display include a method of forming an incision pattern on the electrode and a method of forming protrusions. All of these are methods of securing a wide viewing angle by forming a fringe field to evenly distribute the tilting direction of the liquid crystal in four directions. Among these, the patterned vertically aligned (PVA) mode, which forms an incision pattern on the electrode, is recognized as a wide viewing angle technology that can replace the In Plane Switching (IPS) mode.

In addition, the PVA mode has relatively fast response characteristics compared to the twisted nematic (TN) method because the liquid crystal molecules do not twist and move only by elasticity that splays or bends in a direction perpendicular to the electric field direction.

Hereinafter, in the above-described vertical alignment mode liquid crystal display, the liquid crystal display according to the coupling between the data lines and the neighboring wirings and the degree of light transmission according to this will be described with reference to FIGS. 1 and 2.

1 and 2 are explanatory diagrams for explaining the liquid crystal and the transmission of light according to the liquid crystal that is coupled to the wiring adjacent to the data line in a direction perpendicular to the electric field direction, and FIG. 2 is a partial cross-sectional view of the liquid crystal display of FIG. 2 is a partial cross-sectional view of the liquid crystal display when the data line is misaligned.

In general, the black matrix 4 is formed on the color filter substrate so as to cover not only the thin film transistor but also the upper portion of the peripheral portion of the pixel region where the data line 1 is formed. This is to prevent light leakage caused by the coupling phenomenon between the data line 1 and the adjacent pixel electrode 3.

That is, as shown in FIG. 1, the data line 1 may be coupled to the adjacent sustain electrode line 2, but light transmitted in the liquid crystal array oriented by the generated electric field is applied to the upper black matrix 4. Is blocked by.

However, when the data line 1 is misaligned (hereinafter, referred to as miss alignment) as shown in FIG. 2, the data line 1 is coupled to the adjacent pixel electrode 3. Unwanted light leakage can occur. Therefore, since the margin of the black matrix 4 according to the misalignment must be secured widely, the aperture ratio of the liquid crystal display device is reduced.

In addition, if a misalignment occurs, the data line 1 may have a different degree of adjacency between adjacent pixel electrodes 3, and thus, a difference in coupling between adjacent pixels may occur, causing crosstalk. .

An object of the present invention is to provide a liquid crystal display and a thin film transistor substrate thereof to prevent light leakage and crosstalk due to misalignment of data lines.

Another object of the present invention is to provide a liquid crystal display device and a thin film transistor substrate thereof which minimize the margin width of a black matrix with respect to misalignment of data lines.

According to an aspect of the present invention, a liquid crystal display device includes: a first insulating substrate; A gate line formed on the first insulating substrate; A gate insulating film formed on the gate line; A data line formed on the gate insulating layer and formed in a dual wiring pattern; A storage electrode wiring formed on the same layer as the gate line and including a storage electrode formed adjacent to a pixel area and an auxiliary storage electrode formed in a lower region between the dual wiring pattern of the data line; A protective film formed on the data line; A pixel electrode formed on the passivation layer; A second insulating substrate facing the first insulating substrate; And a reference electrode formed on the second insulating substrate.

Here, the pixel electrode is preferably overlapped to cover a portion of the sustain electrode formed adjacent to each other.

In addition, a thin film transistor substrate of a liquid crystal display according to the present invention for achieving the above technical problem, an insulating substrate; A gate line formed on the insulating substrate; A data line insulated from and intersecting the gate line and formed in a dual wiring pattern; A storage electrode wiring formed on the same layer as the gate line and including a storage electrode formed adjacent to a pixel area and an auxiliary storage electrode formed in a lower region between the dual wiring pattern of the data line; A protective film formed on the data line; A pixel electrode formed on the passivation layer; And a thin film transistor formed in a pixel region defined by the gate line and the data line crossing each other and connected to the gate line, the data line, and the pixel electrode, respectively.

Specific details of other embodiments are included in the detailed description and the drawings.

Advantages and features of the present invention and methods for achieving them will be apparent with reference to the embodiments described below in detail with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but may be implemented in various forms. It is provided to fully convey the scope of the invention to those skilled in the art, and the present invention is defined only by the scope of the claims. Like reference numerals refer to like elements throughout.

Hereinafter, a structure of a liquid crystal display and a thin film transistor substrate thereof according to an exemplary embodiment of the present invention will be described with reference to FIGS. 3 to 6.

3 is a layout view of a thin film transistor substrate for a liquid crystal display according to an embodiment of the present invention, FIG. 4 is a layout view of a color filter substrate for a liquid crystal display according to an embodiment of the present invention, and FIG. FIG. 6 is a layout view of a liquid crystal display according to an exemplary embodiment, and FIG. 6 is a cross-sectional view taken along line VI-VI 'of FIG. 5.                     

The liquid crystal display includes liquid crystal molecules that are injected between the lower substrate 110 and the upper substrate 210 facing the lower substrate 110 and the lower substrate 110 and the upper substrate 210 and are oriented perpendicular to the substrates 110 and 210. It consists of the liquid crystal layer 3 containing.

On the lower substrate 110 made of a transparent insulating material such as glass, a pixel electrode made of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO) and having cutouts 191, 192, and 193 ( 190 is formed, and each pixel electrode 190 is connected to a thin film transistor to receive an image signal voltage. In this case, the thin film transistor is connected to the gate line 121 for transmitting the scan signal and the data line 171 for transmitting the image signal, respectively, to turn on and off the pixel electrode 190 according to the scan signal. . The lower polarizer 12 is attached to the lower surface of the lower substrate 110. Here, the pixel electrode 190 may not be made of a transparent material in the case of a reflective liquid crystal display, and in this case, the lower polarizer 12 is also unnecessary.

In addition, the lower surface of the upper substrate 210 made of a transparent insulating material such as glass, the black matrix 220 to prevent light leakage, and the red, green, blue color filter 230 and a transparent conductive material such as ITO or IZO. The reference electrode 270 is formed. Here, cutouts 271, 272, and 273 are formed in the reference electrode 270. The black matrix 220 may be formed not only at the periphery of the pixel region but also at the portion overlapping the cutouts 271, 272, and 273 of the reference electrode 270. This is to prevent light leakage caused by the cutouts 271, 272, and 273.

The thin film transistor substrate of the liquid crystal display according to the exemplary embodiment of the present invention will be described in more detail.

The gate line 121 is formed in the horizontal direction on the lower insulating substrate 110. The gate electrode 123 is formed in the form of a protrusion in the gate line 121, and a gate pad 125 is formed at one end thereof. The storage electrode line 131 is formed on the insulating substrate 110 in parallel with the gate line 121. The storage electrode line 131 is connected to the auxiliary storage electrode 133d formed in the vertical direction between the two storage electrodes 133a and 133b formed in the vertical direction and the data lines 171a and 171b in the dual wiring form. Two of these storage electrodes 133a and 133b are connected to each other by the horizontal storage electrode 133c.

The gate line 121, the gate electrode 123, the storage electrode line 131, and the storage electrode 133 are formed of a metal such as aluminum or chromium. At this time, they may be formed by a single layer, or may be formed by a double layer formed by successively laminating a chromium layer and an aluminum layer. In addition, a variety of metals may be used to form the gate wiring and the common wiring.

A gate insulating layer 140 made of silicon nitride (SiNx) or the like is formed on the gate line 121, the storage electrode line 131, and the storage electrode 133.

The data line 171 having a dual wiring form is formed on the gate insulating layer 140 in the vertical direction. That is, the data line 171 is formed in the pixel area in the form of two data wiring patterns 171a and 171b.

A source electrode 173 is formed in the data line 171 as a branch, a drain electrode 175 is formed adjacent to the source electrode 173, and a data pad 179 is formed at one end of the data line 171. Formed. In addition, a leg metal piece 172 overlapping the gate line 121 is formed on the gate insulating layer 140. The data line 171, the source electrode 173, the drain electrode 175, and the data pad 179 are also made of a material such as chromium and aluminum, similarly to the gate wiring. It can also be formed in a single layer or multiple layers.

An amorphous silicon layer 151, which is used as a channel portion of the thin film transistor, is formed under the source electrode 173 and the drain electrode 175, and the channel portion amorphous silicon layer 151 is vertically formed under the data line 171. The data line portion amorphous silicon layer 153 is formed to be connected to each other for a long time. A contact layer 161 is formed on the amorphous silicon layers 151 and 153 to reduce contact resistance between the source and drain electrodes 173 and 175 and the channel portion amorphous silicon layer 151. The contact layer 161 is formed using amorphous silicon heavily doped with n-type impurities.

Meanwhile, the amorphous silicon layers 151 and 153 and the contact layer 161 may not be formed together along the data line part according to the method of manufacturing the thin film transistor, but may be formed only in the channel part of the thin film transistor.

On the data line 171 or the like, a protective film 180 made of an inorganic insulator such as silicon nitride or an organic insulator such as resin is formed. In the passivation layer 180, a contact hole 181 exposing the drain electrode 175 is formed. Meanwhile, the passivation layer 180 may be formed to a thickness of 2 mm or more in consideration of the load of the data lines 171a and 171b of the dual wiring type. In addition, the thickness of the data lines 171a and 171b may be relatively thin in order to reduce the load of the data lines 171a and 171b.

The pixel electrode 190 having the cutouts 191, 192, and 193 is formed on the passivation layer 180. The pixel electrode 190 is formed using a transparent conductor such as indium tin oxide (ITO) or indium zinc oxide (IZO), or an opaque conductor having excellent light reflection characteristics such as aluminum (Al). The cutouts 191, 192, and 193 formed in the pixel electrode 190 may be divided into the horizontal cutout 192 formed in the horizontal direction at a position that half-divides the pixel electrode 190. It includes diagonal openings 191, 193 are formed in the diagonal direction in the upper and lower portions. In this case, the pixel electrode 190 has a form of a partial com that overlaps the neighboring storage electrode wiring 133 by about half. The form of the partial com means that the pixel electrode 190 is formed to partially cover the sustain electrode wiring 133 formed adjacent to minimize the coupling phenomenon between the pixel electrode 190 and the neighboring data line.

On the passivation layer 180, a storage wiring connecting leg 91 is formed to connect the storage electrode 133a and the storage electrode line 131 by crossing the gate line 121. The storage wiring connecting leg 91 is in contact with the storage electrode 133a and the storage electrode line 131 through the contact holes 183 and 184 formed over the passivation layer 180 and the gate insulating layer 140. The sustain wiring connection leg 91 overlaps the leg metal piece 172. The sustain wiring connection leg 91 serves to electrically connect the entire sustain wiring on the lower substrate 110. This holding wiring can be used to repair the defect of the gate line 121 or the data line 171, if necessary, and the leg metal piece 172 is held with the gate line 121 when irradiating a laser for such repair. It is formed to assist the electrical connection of the wiring connection bridge (91).

The auxiliary gate pad 95 and the auxiliary data pad 97 are formed on the passivation layer 180. The auxiliary gate pad 95 is connected to the gate pad 125 through a contact hole 182 formed over the passivation layer 180 and the gate insulating layer 140, and the auxiliary data pad 97 is connected to the passivation layer 180. It is connected to the data pad 179 through the contact hole 183 formed in the.

A black matrix 220 is formed on the upper insulating substrate 210 to prevent light leakage. Red, green, and blue color filters 230 are formed on the black matrix 220. A reference electrode 270 having cutouts 271, 272, and 273 is formed on the color filter 230. The reference electrode 270 is formed of a transparent conductor such as ITO or indium zinc oxide (IZO).

When the thin film transistor substrate and the color filter substrate having the above structure are aligned and combined, and a liquid crystal material is injected and vertically aligned therebetween, the basic structure of the liquid crystal display according to the present invention is provided. When the thin film transistor substrate and the color filter substrate are aligned, the cutouts 191, 192, and 193 of the pixel electrode 190 and the cutouts 271, 272, and 273 of the reference electrode 270 may include a plurality of small domains. Divide into

In one embodiment of the present invention, the data line 171 is formed in a dual wiring form, and has a structure in which the auxiliary storage electrode 133d is formed in a region between the dual wiring patterns 171a and 171b.                     

In such a structure, even if the data line 171 is adjacent to the pixel electrode 190 due to misalignment, an electric field is formed with the auxiliary storage electrode 133d formed relatively close to this. Accordingly, the unnecessary coupling phenomenon that the data line 171 occurs adjacent to the pixel electrode 190 can be minimized.

Therefore, the coupling of the data line and the pixel electrode prevents the liquid crystal from being splayed unnecessarily and prevents unwanted light leakage caused by light passing through the region other than the black matrix.

In addition, the coupling phenomenon between the data line and the pixel electrode may be different for each of the adjacent pixels according to the misalignment, thereby preventing a crosstalk phenomenon.

As a result, it is possible to minimize the margin width of the black matrix formed to cover the periphery of the pixel region in order to prevent unwanted light leakage in the area around the data line.

Although the embodiments of the present invention have been described above with reference to the accompanying drawings, the present invention is not limited to the above embodiments and can be variously modified and implemented by those skilled in the art without departing from the technical scope of the present invention.

As described above, according to the present invention, light leakage and crosstalk due to misalignment of data lines can be prevented. In addition, the margin of the black matrix with respect to the misalignment of the data lines can be minimized.

Claims (5)

A first insulating substrate; A gate line formed on the first insulating substrate; A gate insulating film formed on the gate line; A data line formed on the gate insulating layer and formed in a dual wiring pattern; A storage electrode wiring formed on the same layer as the gate line and including a storage electrode formed adjacent to a pixel area and an auxiliary storage electrode formed in a lower region between the dual wiring pattern of the data line; A protective film formed on the data line; A pixel electrode formed on the passivation layer; A second insulating substrate facing the first insulating substrate; And And a reference electrode formed on the second insulating substrate. In claim 1, And a black matrix formed between the second insulating substrate and the reference electrode to cover a circumferential portion of the pixel area. In claim 1, The pixel electrode is formed to overlap a portion of the sustain electrode formed adjacent to each other. Insulating substrate; A gate line formed on the insulating substrate; A data line insulated from and intersecting the gate line and formed in a dual wiring pattern; A storage electrode wiring formed on the same layer as the gate line and including a storage electrode formed adjacent to a pixel area and an auxiliary storage electrode formed in a lower region between the dual wiring pattern of the data line; A protective film formed on the data line; A pixel electrode formed on the passivation layer; And And a thin film transistor formed in a pixel region defined by the gate line and the data line crossing each other and connected to the gate line, the data line, and the pixel electrode, respectively. In claim 4, The pixel electrode is formed to overlap a portion of the sustain electrode wiring formed adjacent to the thin film transistor substrate.

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