KR20050088493A - Ｓｏｉ웨이퍼 및 그 제조 방법 - Google Patents

Ｓｏｉ웨이퍼 및 그 제조 방법 Download PDF

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Publication number
KR20050088493A
KR20050088493A KR1020057013008A KR20057013008A KR20050088493A KR 20050088493 A KR20050088493 A KR 20050088493A KR 1020057013008 A KR1020057013008 A KR 1020057013008A KR 20057013008 A KR20057013008 A KR 20057013008A KR 20050088493 A KR20050088493 A KR 20050088493A
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KR
South Korea
Prior art keywords
wafer
region
silicon
soi
single crystal
Prior art date
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Ceased
Application number
KR1020057013008A
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English (en)
Korean (ko)
Inventor
마사히로 사쿠라다
노부아키 미타무라
이즈미 후세가와
Original Assignee
신에쯔 한도타이 가부시키가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP2003015072A external-priority patent/JP4380162B2/ja
Priority claimed from JP2003015396A external-priority patent/JP2004265904A/ja
Application filed by 신에쯔 한도타이 가부시키가이샤 filed Critical 신에쯔 한도타이 가부시키가이샤
Publication of KR20050088493A publication Critical patent/KR20050088493A/ko
Ceased legal-status Critical Current

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Classifications

    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02—Elements
    • C30B29/06—Silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B15/00—Single-crystal growth by pulling from a melt, e.g. Czochralski method
    • C30B15/20—Controlling or regulating
    • C30B15/203—Controlling or regulating the relationship of pull rate (v) to axial thermal gradient (G)
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Element Separation (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
KR1020057013008A 2003-01-23 2004-01-22 Ｓｏｉ웨이퍼 및 그 제조 방법 Ceased KR20050088493A (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2003015072A JP4380162B2 (ja) 2003-01-23 2003-01-23 Ｓｏｉウエーハ及びその製造方法
JPJP-P-2003-00015396 2003-01-23
JP2003015396A JP2004265904A (ja) 2003-01-23 2003-01-23 Ｓｏｉウエーハ及びその製造方法
JPJP-P-2003-00015072 2003-01-23

Publications (1)

Publication Number Publication Date
KR20050088493A true KR20050088493A (ko) 2005-09-06

Family

ID=32775181

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020057013008A Ceased KR20050088493A (ko) 2003-01-23 2004-01-22 Ｓｏｉ웨이퍼 및 그 제조 방법

Country Status (5)

Country Link
US (1) US7407866B2 (https=)
EP (1) EP1589580B1 (https=)
KR (1) KR20050088493A (https=)
TW (1) TW200428637A (https=)
WO (1) WO2004066390A1 (https=)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7813634B2 (en) 2005-02-28 2010-10-12 Tessera MEMS Technologies, Inc. Autofocus camera
TW200428637A (en) * 2003-01-23 2004-12-16 Shinetsu Handotai Kk SOI wafer and production method thereof
JP4552857B2 (ja) * 2003-09-08 2010-09-29 株式会社Ｓｕｍｃｏ Ｓｏｉウェーハおよびその製造方法
FR2881573B1 (fr) 2005-01-31 2008-07-11 Soitec Silicon On Insulator Procede de transfert d'une couche mince formee dans un substrat presentant des amas de lacunes
US7838322B1 (en) * 2005-02-28 2010-11-23 Tessera MEMS Technologies, Inc. Method of enhancing an etch system
US8673248B2 (en) * 2006-05-19 2014-03-18 Memc Electronic Materials, Inc. Silicon material with controlled agglomerated point defects and oxygen clusters induced by the lateral surface
JP2008016534A (ja) * 2006-07-04 2008-01-24 Sumco Corp 貼り合わせウェーハの製造方法
FR2938118B1 (fr) * 2008-10-30 2011-04-22 Soitec Silicon On Insulator Procede de fabrication d'un empilement de couches minces semi-conductrices
CN112735964B (zh) * 2020-12-23 2023-12-22 武汉新芯集成电路制造有限公司 晶圆表面缺陷检测及表面修复方法

Family Cites Families (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5037503A (en) * 1988-05-31 1991-08-06 Osaka Titanium Co., Ltd. Method for growing silicon single crystal
JPH0719738B2 (ja) * 1990-09-06 1995-03-06 信越半導体株式会社 接合ウェーハ及びその製造方法
JPH08337490A (ja) * 1995-06-09 1996-12-24 Shin Etsu Handotai Co Ltd 結晶欠陥の少ないシリコン単結晶及びその製造方法
JPH1140786A (ja) 1997-07-18 1999-02-12 Denso Corp 半導体基板及びその製造方法
JP3955375B2 (ja) * 1998-01-19 2007-08-08 信越半導体株式会社 シリコン単結晶の製造方法およびシリコン単結晶ウエーハ
JP3932369B2 (ja) 1998-04-09 2007-06-20 信越半導体株式会社 剥離ウエーハを再利用する方法および再利用に供されるシリコンウエーハ
JP3943717B2 (ja) * 1998-06-11 2007-07-11 信越半導体株式会社 シリコン単結晶ウエーハ及びその製造方法
JP3762144B2 (ja) * 1998-06-18 2006-04-05 キヤノン株式会社 Ｓｏｉ基板の作製方法
JP3358550B2 (ja) 1998-07-07 2002-12-24 信越半導体株式会社 Ｓｏｉウエーハの製造方法ならびにこの方法で製造されるｓｏｉウエーハ
JP3601340B2 (ja) * 1999-02-01 2004-12-15 信越半導体株式会社 エピタキシャルシリコンウエーハおよびその製造方法並びにエピタキシャルシリコンウエーハ用基板
JP3911901B2 (ja) 1999-04-09 2007-05-09 信越半導体株式会社 Ｓｏｉウエーハおよびｓｏｉウエーハの製造方法
JP2001044398A (ja) 1999-07-30 2001-02-16 Mitsubishi Materials Silicon Corp 張り合わせ基板およびその製造方法
JP3994602B2 (ja) * 1999-11-12 2007-10-24 信越半導体株式会社 シリコン単結晶ウエーハおよびその製造方法並びにｓｏｉウエーハ
JP3901092B2 (ja) * 2000-06-30 2007-04-04 信越半導体株式会社 シリコン単結晶の製造方法
JP3994665B2 (ja) * 2000-12-28 2007-10-24 信越半導体株式会社 シリコン単結晶ウエーハおよびシリコン単結晶の製造方法
JP4092946B2 (ja) * 2002-05-09 2008-05-28 信越半導体株式会社 シリコン単結晶ウエーハ及びエピタキシャルウエーハ並びにシリコン単結晶の製造方法
US7129123B2 (en) * 2002-08-27 2006-10-31 Shin-Etsu Handotai Co., Ltd. SOI wafer and a method for producing an SOI wafer
JP4699675B2 (ja) * 2002-10-08 2011-06-15 信越半導体株式会社 アニールウェーハの製造方法
US7258744B2 (en) * 2002-12-27 2007-08-21 Shin-Etsu Handotai Co., Ltd. Graphite heater for producing single crystal, apparatus for producing single crystal, and method for producing single crystal
JP4207577B2 (ja) * 2003-01-17 2009-01-14 信越半導体株式会社 Ｐドープシリコン単結晶の製造方法
TW200428637A (en) * 2003-01-23 2004-12-16 Shinetsu Handotai Kk SOI wafer and production method thereof
JP2004259970A (ja) * 2003-02-26 2004-09-16 Shin Etsu Handotai Co Ltd Ｓｏｉウエーハの製造方法及びｓｏｉウエーハ
JP4854917B2 (ja) * 2003-03-18 2012-01-18 信越半導体株式会社 Ｓｏｉウェーハ及びその製造方法
JP2005015313A (ja) * 2003-06-27 2005-01-20 Shin Etsu Handotai Co Ltd 単結晶の製造方法及び単結晶
JP2005015312A (ja) * 2003-06-27 2005-01-20 Shin Etsu Handotai Co Ltd 単結晶の製造方法及び単結晶
JP4193610B2 (ja) * 2003-06-27 2008-12-10 信越半導体株式会社 単結晶の製造方法
JPWO2006040878A1 (ja) * 2004-10-13 2008-05-15 信越半導体株式会社 単結晶製造装置

Also Published As

Publication number Publication date
TW200428637A (en) 2004-12-16
TWI305953B (https=) 2009-02-01
US20060113594A1 (en) 2006-06-01
EP1589580B1 (en) 2012-08-15
EP1589580A1 (en) 2005-10-26
US7407866B2 (en) 2008-08-05
EP1589580A4 (en) 2010-01-20
WO2004066390A1 (ja) 2004-08-05

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