KR20030059352A - Board Dual Architecture In Compact PCI System - Google Patents

Abstract

PURPOSE: A duplicated board architecture on a compact PCI(Peripheral Component Interconnect) system is provided to distribute the power realizing the stable power supply and the power cut-off, and to realize the reliable duplicated switch of active/standby by connecting a power line with a signal needed for the duplication through a stacking connector. CONSTITUTION: The active/standby duplicated front board(10) is installed to a front surface of a back plane by centering it on a slot on the back plane. A pair of read boards(20A,20B) connecting to the duplicated front board(10) are respectively installed to a rear surface of the back plane by joining with each other through the stacking connector(25). The read board(20A,20B) comprising the pair connect the power line(Vcc and Ground) with the signal needed for the duplication by connecting and joining through the stacking connector(25), and are simultaneously installed or removed by joining with each other.

Description

Board Dual Architecture in Compact PC System

The present invention relates to board redundancy in a compact PCI system, and in particular, in the case of implementing a redundant board in an active / inactive structure, a compact power supply for the front board and the rear board can be performed and redundancy switching can be performed. A board redundancy structure in a PCI system.

Recently, in industrial systems such as factory automation, control, and measuring instruments, and communication control systems, the Compact Peripheral Component Interconnection (PCI) bus method is mainly adopted rather than the Versa Module Euro Card (VME) bus method, which has led the industrial module standard. The compact PCI bus method is emerging as a new standard. The rapid rise of the compact PCI bus method is not only cheaper than the existing VME bus method, but also a hot swap function for replacing various boards without powering down. Because it has.

This compact PCI bus method is a bus standard decided by the PCI Industrial Computer Manufacture Group (PCIMG), and is mainly applied to communication control systems requiring safety rather than system scalability, and easily installs a board mounted in a slot on a backplane. It is also applicable to high availability systems as it can be exchanged.

In addition, there is no information on board redundancy in the compact PCI specification that has been released to date, but the board redundancy is implemented in the VME bus method, in which signals necessary for redundancy are connected to each other through the backplane. .

However, in recent years, when looking at a structure to be duplicated in a compact PCI system, a front board (duplex board) mounted with an active / inactive structure is mounted on the front of the backplane, and a rear board (mounted rear board) is mounted on the backplane. In this case, the redundancy switching logic as in the VME bus method cannot be applied with respect to the board redundancy, and the conventional rear board has a problem in that the stable board redundancy cannot be implemented because the power is directly supplied from the backplane.

Disclosure of Invention The present invention has been made to solve the problems described above, and an object thereof is to stack a pair of rear boards coupled to a pair of rear boards connected to a redundant front board when implementing board redundancy in an active / inactive structure in a compact PCI system. By connecting the signals required for redundancy with the power line through the connector, it is possible to provide power distribution and reliable active / inactive redundancy switching with stable power supply and power off.

In addition, another object of the present invention, by enabling stable power distribution and reliable redundancy switching when implementing board redundancy, to implement a stable and reliable board redundancy, thereby implementing a compact PCI system having high reliability and high availability It is to make it possible.

1 is a diagram illustrating a board redundancy structure in a compact PCI system according to the present invention.

FIG. 2 is a diagram illustrating a portion of the front board transferring initial power to back-end power in FIG.

3 is a diagram illustrating a circuit configuration for switching board duplication in the present invention.

4 is a diagram showing a detailed internal structure of the redundant logic circuit in FIG.

Explanation of symbols on the main parts of the drawings

10, 30A, 30B: front board 11: hot swap controller

12: power MOSFET 20A, 20B: rear board

23: hot swap power management unit 25: stacking connector

31: redundant logic circuit section 31-1: register

31-2: inactive signal generator 31-3: active signal generator

31-4: redundant switching condition generator 31-5: enable signal generator

31-6: Shift register 31-7: Normal signal generator

31-8: Interrupt signal generator 32: CPU

Features of the present invention for achieving the object as described above, the front of the backplane centered on a slot on the backplane in a compact PCI system, the front panel is mounted in an active / inactive structure respectively; The present invention provides a board redundancy structure in a compact PC system including a pair of rear boards mounted on a rear surface of the backplane and connected to the redundant front boards while being coupled to each other through a stacking connector.

Here, the pair of rear boards are connected to and coupled with a stacking connector to connect power lines and signals necessary for redundancy.

The front board may further include: a power MOSFET supplying back end power to the rear board through a connector directly connected to the rear board; According to the board mounting, when the initial power is supplied and the board select pin is connected, it characterized in that it comprises a hot swap controller to open the gate terminal of the power MOSFET to supply the back-end power.

In addition, the rear board includes a hot-swap power management unit for supplying back-end power supplied through a connector directly connected to the front board to drive power of an internal circuit and simultaneously supplying a pair of other rear boards through a stacking connector. Characterized in that the hot swap power management unit provides only a unidirectional power flow from the front board to the rear board direction.

On the other hand, the redundant front board determines the active front board by sending and receiving the status information of the magnetic board and the status information of the partner board through the stacking connector coupling between the rear boards, and in the redundant transfer A redundant logic circuit section for generating a redundant switching interrupt signal after writing the board state information to a register; And a CPU for performing a process to be processed during redundancy according to the corresponding board state after reading the magnetic side board state information recorded in the register when the redundancy switching interrupt signal is generated by the redundancy logic circuit unit. It is done.

In addition, the redundant logic circuit unit may include an inactive signal generator configured to generate a signal indicating an inactive state of the magnetic board by combining a power reset signal and a signal indicating whether the magnetic board operates normally; An active signal generation unit for generating a signal indicating an active state of the magnetic board by combining a signal indicating whether the magnetic board is in normal operation with a signal indicating whether the counter board is in normal operation; A redundancy transfer condition generating unit generating a redundancy transfer condition by combining the redundancy state signal of the magnetic board and the counterpart board and the GA 0 signal; An enable signal generator configured to generate a shift enable signal by synchronizing a signal indicating whether an own board is activated and a signal indicating whether an opponent board is activated according to a clock signal; The signal indicating the inactive state of the magnetic board generated by the inactive signal generator is input to the preset stage, or the signal indicating the active state of the magnetic board generated by the active signal generator is input to the clear stage or the duplication is performed. A shift register which receives the redundancy switching condition generated by the switching condition generating unit to a CAI stage and outputs a signal indicating whether a magnetic board is active according to the shift enable signal and a clock signal; A normal signal generator which receives a reset signal, a watch dog related signal, and a hot swap related signal and generates and outputs a signal indicating whether a magnetic board operates normally; An interrupt signal generation unit which checks a signal indicating whether a magnetic board output from the shift register is active and generates and outputs an interrupt signal when a redundant switching is performed; And a register for receiving a signal indicating whether the magnetic board output from the shift register is activated and a signal indicating whether the magnetic board output from the normal signal generator is normally operated and storing corresponding state information. It features.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

The board redundancy structure in the compact PCI system according to the present invention does not use a backplane to implement board redundancy in an active / standby structure, as shown in FIG. 1, but is a slot on the backplane. In the front of the backplane, the front and rear dual (Front Board) (10) is mounted on the front, respectively, and the rear board (Rear Board, Transition Module) is connected to the redundant front board (10) ) 20A and 20B have a structure in which they are mounted in a state where they are coupled to each other by a stacking connector 25.

In addition, the pair of two rear boards 20A and 20B are connected and coupled to the stacking connector 25 to connect the power lines (VCC & Ground) and signals necessary for redundancy, and the two rear boards 20A, 20B) is combined to mount and hernia at the same time.

The operation description of the hardware structure in the case of implementing board redundancy with active / standby structure in the above-described compact PCI system is divided into a power distribution part and a redundancy switching part as follows.

First, the power distribution structure for the stable power supply and cut-off for the front board 10 and the rear board (20A, 20B) when implementing board redundancy in the compact PCI system according to the present invention will be described with reference to the accompanying drawings, FIG. 2 is a view specifically showing the front board 10 shown in FIG. 1 to show the power distribution structure of the front board 10 to satisfy the hot swap in the present invention, the initial power (Early Power) back end Part of the transmission to the back end power is shown in detail.

When describing the power-up sequence when the front board 10 is mounted, initial power is first supplied through the J1 connector when the front board 10 is mounted, and the board selection pin of the J1 connector ( / BD_SEL Pin) is connected, the hot swap controller 11 opens the gate (GATE) terminal of the power MOSFET 12 connected to it to supply the back-end power.

Then, the back end power supplied through the power MOSFET 12 is fronted through the J3 connector of the front board 10 and the RJ3 connector of the rear boards 20A and 20B (or the J5 connector of the front board and the RJ5 connector of the rear board). It is supplied to the rear board 20A directly connected to the board 10.

Accordingly, the hot swap power management unit 23 of the rear board 20A is coupled with itself through the stacking connector 25 while simultaneously supplying the back end power supplied from the front board 10 through the RJ3 connector to the driving power of the internal circuit. It is also supplied to the other rear board 20B, wherein the hot swap power management unit 23 of the rear boards 20A and 20B supplies initial power supplied from the J1 connector by the back end power of the currently mounted front board 10. In order to prevent supply through the RJ3 connector before supplying through, it must have a unidirectional current flow characteristic from the front board 10 to the rear boards 20A and 20B.

That is, when the hot swap power management unit 23 of the rear boards 20A and 20B has a bidirectional flow characteristic, the power supply sequence described above when the other front board is mounted while one front board 10 is mounted. Will not be able to perform

Next, referring to the accompanying drawings, a configuration for reliable redundancy switching when implementing board redundancy in a compact PCI system according to the present invention, FIG. 3 is a diagram illustrating a circuit configuration for board redundancy switching in the present invention. 4 is a diagram showing a detailed internal structure of the redundant logic circuit shown in FIG.

In this board redundancy switchover, signals required for redundancy (/ PACT, / PNOR, / SACT, / SNOR) are exchanged through a stacking connector 25 that couples the rear boards 20A and 20B. The redundant logic circuit 31 of each front board 30A, 30B can be implemented as a programmable logic device (PLC), and its own state information (/ SACT, / SNOR) and the other front board state information (/ PACT, / The PNOR is used to determine the front board that is active by generating a signal (/ SACT) indicating its active state.

Here, when the signals necessary for redundancy are described, the '/ SACT (Self_ACTive)' signal is a low active signal, indicating that the magnetic board is active, and the '/ SNOR (Self_NORmal)' signal is a low active signal, and the magnetic board is normally operated. '/ PACT (Pair_ACTive)' signal indicates that the other board is active as a low active signal, and '/ PNOR (Pair_NORmal)' signal indicates that the other board operates normally as a low active signal.

The redundant logic circuit 31 records the state information (active / inactive, normal / abnormal) of the corresponding front boards 30A and 30B in the register 31-1 when redundant switching occurs. Generates an interrupt signal (/ DUAL_IRQ) indicating a redundancy switching to the CPU 32, and the CPU 32 accesses the register 31-1 in the redundancy logic circuit 31 when the redundancy switching interrupt signal is generated. After reading the status information of (20A, 20B), according to the board status information, the process to be processed by software is performed.

In this case, the detailed internal structure of the redundant logic circuit unit 31 will be described with reference to FIG. 4. The inactive signal generator 31-2, the active signal generator 31-3, and the redundant transfer condition generator 31 are described. -4, enable signal generator 31-5, shift register 31-6, normal signal generator 31-7, interrupt signal generator 31-8 and register 31 -1).

The inactive signal generator 31-2 combines a power reset signal / PowerOn_Reset and a signal / SNOR indicating whether the magnetic board is in normal operation to generate a signal indicating the inactive state of the magnetic board (/ SACT). = High), and the active signal generator 31-3 combines a signal (/ SNOR) indicating whether the magnetic board is normally operated and a signal (/ PNOR) indicating the normal operation of the other board. Generate a signal (/ SACT = Low) indicating the board's active state.

The redundancy transfer condition generator 31-4 combines the redundancy status signals (/ SACT, / SNOR, / PACT, / PNOR) and the GA 0 (Geographic Address 0) signals of the magnetic board and the counterpart board to generate the redundant transfer condition. The enable signal generator 31-5 generates a signal (/ SACT) indicating whether the magnetic board is active and a signal (/ PACT) indicating whether the other board is activated according to the clock signal. Are combined to generate a shift enable signal.

The shift register 31-6 receives a signal (/ SACT = High) indicating the inactive state of the magnetic board generated by the inactive signal generator 31-2 as a preset stage, or receives an active signal generator ( The signal (/ SACT = Low) indicating the active state of the magnetic board generated in 31-3) is input to the clear stage, or the redundant transfer condition generated by the redundant transfer condition generator 31-4 is input. It is input to the CAAI (CAscade In) stage and outputs a signal (/ SACT) indicating whether the magnetic board is active according to the shift enable signal and the clock signal.

The normal signal generator 31-7 receives a reset signal (/ RESET), a watchdog signal, a hot swap signal, and other signals to receive a signal (/ SNOR) indicating whether the own board is in normal operation. The interrupt signal generator 31-8 checks a signal (/ SACT) indicating whether the magnetic board output from the shift register 31-6 is active and interrupt signal (/ DUAL_IRQ) during redundancy switching. Create and print

The register 31-1 receives a signal / SACT indicating whether the magnetic board is active and a signal / SNOR indicating whether the magnetic board operates normally, and stores corresponding state information.

The procedure for determining the active front board when implementing board redundancy in a compact PCI system having such a configuration will be described below.

First, two redundant front boards 30A and 30B cannot be active at the same time, and the active operation can be performed only when the magnetic board is normal (/ SACT = Low), and the magnetic board is abnormal ( If / SNOR = High, it is always inactive (/ SACT = High).

In addition, the normal operation refers to a state when the magnetic side board normally operates. When both of the redundant front boards 30A and 30B are inactive, the state transitions to the normal (/ SNOR = Low) state first. When the board becomes active and the two redundant front boards 30A and 30B are both inactive and at the same time transition to the normal state, the board with the GA 0 value '0' becomes active.

In addition, when the counter board is active (/ PACT = Low), the front board to be mounted later becomes abnormal (/ SNOR = High). When the counter board does not exist, a signal indicating whether the counter board is active (/ PACT) and a signal (/ PNOR) indicating whether the other board is in normal operation are pulled up to become high when the magnetic board is in a normal state.

In addition, the embodiment according to the present invention is not limited to the above-described embodiments, and various alternatives, modifications, and changes can be made within the scope apparent to those skilled in the art.

As described above, the present invention provides a signal required for power line and redundancy through a stacking connector that couples a pair of rear boards connected to a redundant front board when implementing board redundancy with an active / inactive structure in a compact PCI system. By connecting the power supply, power distribution and stable switching between active and inactive can be achieved with stable power supply and power off, and stable and reliable board redundancy can be realized, and high reliability and high availability The system can be implemented.

Claims (8)

A redundant front board mounted on a front surface of the backplane in a compact PCI system, each of which is mounted in an active / inactive structure; And a pair of rear boards mounted on a rear surface of the backplane and coupled to the redundant front boards while being coupled to each other through a stacking connector. The method of claim 1, The pair of rear boards are connected to and coupled with stacking connectors to connect power lines and signals required for redundancy. The method of claim 1, The front board includes: a power MOSFET supplying back end power to the rear board side through a connector directly connected to the rear board; Board redundancy structure in a compact PC system comprising a hot swap controller for supplying back-end power by opening the gate terminal of the power MOSFET when initial power is supplied and board selection pins are connected according to board mounting. . The method according to any one of claims 1 to 3, The rear board includes a hot swap power management unit for supplying back-end power supplied through a connector directly connected to the front board to drive power of an internal circuit and simultaneously supplying a pair of other rear boards through a stacking connector. Board redundancy structure in compact PC system. The method of claim 4, wherein The hot swap power management unit, the board duplex structure in the compact PC eye system, characterized in that to provide only one-way power flow from the front board to the rear board direction. The method of claim 1, The redundant front board determines the active front board by sending and receiving the state information of the magnetic board and the state board information through the stacking connector coupling between the rear boards, and the state of the magnetic board at the time of redundancy switching. A redundant logic circuit section for generating a redundant switching interrupt signal after writing information into a register; And a CPU for performing a process to be processed during redundancy according to the corresponding board state after reading the magnetic side board state information recorded in the register when the redundancy switching interrupt signal is generated by the redundancy logic circuit unit. Board redundancy structure in compact PC system. The method of claim 5, The redundancy logic circuit unit may include an inactive signal generator configured to generate a signal representing an inactive state of the magnetic board by combining a power reset signal and a signal indicating whether the magnetic board operates normally; An active signal generation unit for generating a signal indicating an active state of the magnetic board by combining a signal indicating whether the magnetic board is in normal operation with a signal indicating whether the counter board is in normal operation; A redundancy transfer condition generating unit generating a redundancy transfer condition by combining the redundancy state signal of the magnetic board and the counterpart board and the GA 0 signal; An enable signal generator configured to generate a shift enable signal by synchronizing a signal indicating whether an own board is activated and a signal indicating whether an opponent board is activated according to a clock signal; The signal indicating the inactive state of the magnetic board generated by the inactive signal generator is input to the preset stage, or the signal indicating the active state of the magnetic board generated by the active signal generator is input to the clear stage or the redundancy is performed. A shift register which receives the redundancy switching condition generated by the switching condition generating unit to a CAI stage and outputs a signal indicating whether a magnetic board is active according to the shift enable signal and a clock signal; A normal signal generator which receives a reset signal, a watch dog related signal, and a hot swap related signal and generates and outputs a signal indicating whether a magnetic board operates normally; An interrupt signal generation unit which checks a signal indicating whether a magnetic board output from the shift register is active and generates and outputs an interrupt signal when a redundant switching is performed; And a register for receiving a signal indicating whether the magnetic board output from the shift register is activated and a signal indicating whether the magnetic board output from the normal signal generator is normally operated and storing corresponding state information. Board redundancy in a compact PC system. The method of claim 1, The redundant front board is a board redundancy structure in the compact PC eye system, characterized in that the front board with the GA 0 signal value '0' transitions to an active state when all of the redundant front boards are inactive and simultaneously transition to the normal state.