KR20010057019A - Liquid Crystal Display Device and Method of Fabricating the Same - Google Patents

Abstract

PURPOSE: An LCD(liquid crystal display) and a fabricating method thereof are to reduce degeneration of contact resistant characteristic of a pixel electrode, and also reduce an etching time of the pixel electrode and prevent reduction of a size of the pixel electrode. CONSTITUTION: A thin film transistor is formed with a gate electrode, a gate insulating film(35), an activate layer(37), an ohmic contact layer(39), and a drain and source electrode(41,43) which are formed on a transparent substrate(31). A passivation layer(45) is formed on the gate insulating film to cover the thin film transistor. A contact hole(47) is formed on the passivation layer to expose the drain electrode. A pixel electrode(53) has the first electrode layer(49) formed of a conductive transparent material having a high etching rate, and the second electrode layer(51) formed of a conductive transparent material having a preferable ohmic characteristic so as to be contacted through the contact hole to the drain electrode. The first electrode layer is formed of IZO(indium zinc oxide) and has a thickness of 100-2000 angstrom. The second electrode layer is formed of ITO(indium tin oxide) and has a thickness of 20-1000 angstrom.

Description

Liquid Crystal Display Device and Method of Fabricating the Same

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device and a method for manufacturing the same, and more particularly, to a liquid crystal display device and a method for manufacturing the same in which a pixel electrode is formed of a laminated film.

The liquid crystal display device includes a switching element composed of a thin film transistor including a gate electrode, a gate insulating layer, an active layer, an ohmic contact layer, a source and a drain electrode, a lower plate on which a pixel electrode is formed, and an upper plate on which a color filter is formed. It consists of the injected liquid crystal.

The pixel electrode is connected to a thin film transistor, which is a switching element, to form a unit pixel. N × M (where N and M are natural numbers) are vertically and horizontally arranged in a matrix state. The pixel electrode is driven by the thin film transistor to control the liquid crystal to transmit or reflect the incident light. Therefore, the pixel electrode is formed of a transparent conductive material that can transmit light.

1A to 1D are manufacturing process diagrams of a liquid crystal display device according to the prior art.

Referring to FIG. 1A, a metal thin film is formed by depositing aluminum or copper (Cu) on the transparent substrate 11 by a method such as sputtering. The metal thin film is patterned to remain only in a predetermined portion of the transparent substrate 11 by a photolithography method including a wet method to form the gate electrode 13.

Referring to FIG. 1B, the gate insulating layer 15, the active layer 17, and the ohmic contact layer 19 are chemical vapor deposited to cover the gate electrode 13 on the transparent substrate 11. It is formed sequentially by the method). The gate insulating film 15 is formed by depositing an insulating material such as silicon oxide or silicon nitride, and the active layer 17 is formed of amorphous silicon or polycrystalline silicon that is not doped with impurities. In addition, the ohmic contact layer 19 is formed of amorphous silicon or polycrystalline silicon doped with N-type or P-type impurities at a high concentration.

Predetermined portions of the ohmic contact layer 19 and the active layer 17 are patterned to expose the gate insulating film 15 by a photolithography method. At this time, the active layer 17 and the ohmic contact layer 19 are allowed to remain only in the portion corresponding to the gate electrode 13.

Referring to FIG. 1C, a metal such as chromium (Cr), molybdenum (Mo), titanium, or tantalum, or a molybdenum alloy (Mo alloy) such as MoW, MoTa, or MoNb is formed on the gate insulating layer 15 to form an ohmic contact layer 19. ) Is deposited by CVD or sputtering. The deposited metal or metal alloy is in ohmic contact with the ohmic contact layer 19.

The metal or metal alloy is patterned by photolithography so that the gate insulating film 15 is exposed to form drains and source electrodes 21 and 23. At this time, the metal or metal alloy and the ohmic contact layer 19 of the portion corresponding to the gate electrode 13 between the drain and source electrodes 21 and 23 are also patterned to expose the active layer 17. The portion of the active layer 17 corresponding to the gate electrode 13 between the drain and the source electrodes 21 and 23 becomes a channel.

Referring to FIG. 1D, an inorganic insulating material such as silicon oxide or silicon nitride is deposited on the transparent substrate 11 to form the passivation layer 25. The passivation layer 25 may be formed of an organic insulating material having a low dielectric constant such as an acryl-based organic compound, Teflon, cytope, perfluorocyclobutane (PFCB), or benzocyclobuten (BCB). .

The passivation layer 25 is patterned to form contact holes 27 exposing the drain electrode 21. In addition, a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO) may be in contact with the drain electrode 21 through the contact hole 27 on the passivation layer 25. After deposition, the pixel electrode 29 is formed by patterning to complete the manufacture of the lower plate. In the pixel electrode 29, a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO) is etched by mixing HCl, (COOH) _2, or HCl + HNO ₃ . It is formed by patterning into solution.

However, in the method of manufacturing a liquid crystal display according to the related art, when the pixel electrode is formed of indium tin oxide (ITO), the etching rate is low, so that the pixel electrode is not only etched for a long time but isotropically etched, thereby reducing the size of the pixel electrode. As the etching time increases during patterning, the source and drain electrodes are damaged by etching through pinholes formed in the passivation layer. In addition, when the pixel electrode is formed of Indium Zinc Oxide (IZO), the sheet resistance is large, and thus the contact resistance characteristics of the pixel electrode are deteriorated.

Accordingly, an object of the present invention is to provide a liquid crystal display device which can prevent the contact resistance characteristic of the pixel electrode from being lowered.

Another object of the present invention is to provide a method of manufacturing a liquid crystal display device which can reduce the etching time of the pixel electrode and prevent the size of the pixel electrode from being reduced.

Another object of the present invention is to provide a liquid crystal display device which can prevent the drain and the source electrode from being etched and damaged during the pixel electrode patterning.

1A to 1D are manufacturing process diagrams of a liquid crystal display according to the related art.

2 is a cross-sectional view of a liquid crystal display according to the present invention.

3A to 3D are manufacturing process diagrams of the liquid crystal display device according to the present invention.

<Explanation of symbols for the main parts of the drawings>

31: transparent substrate 33: gate electrode

35 gate insulating film 37 active layer

39: ohmic contact layer

41, 43: drain and source electrodes

45: passivation layer 47: contact hole

49 and 51: first and second electrode layer

53: pixel electrode

The liquid crystal display device according to the present invention for achieving the above object comprises a thin film transistor comprising a gate electrode, a gate insulating film, an active layer, an ohmic contact layer, a drain and a source electrode on a transparent substrate, wherein the gate insulating film A passivation layer formed on the thin film transistor to cover the thin film transistor, a contact hole formed to expose the drain electrode on the passivation layer, a first electrode layer of a transparent conductive material having a large etching rate on the passivation layer, and a transparent material having good resistance characteristics And a pixel electrode formed of a second electrode layer made of a conductive material and being in contact with the drain electrode through the contact hole.

In the method of manufacturing a liquid crystal display device according to the present invention for achieving the above objects, a liquid crystal display device comprising a thin film transistor consisting of a gate electrode, a gate insulating film, an active layer, an ohmic contact layer, a drain and a source electrode on a transparent substrate. A method of manufacturing a semiconductor device, the method comprising: forming a passivation layer covering the thin film transistor on the gate insulating layer, forming a contact hole for exposing the drain electrode by patterning the passivation layer, and etching on the passivation layer And forming a pixel electrode by sequentially stacking and patterning a first electrode layer of a transparent conductive material having a large rate and a second electrode layer of a transparent conductive material having good resistance characteristics to contact the drain electrode through the contact hole.

Other objects and features of the present invention in addition to the above objects will become apparent from the following description of the embodiments with reference to the accompanying drawings.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

2 is a cross-sectional view of a liquid crystal display device according to the present invention.

In the liquid crystal display according to the present invention, a gate electrode 33 made of aluminum (Al) or copper (Cu) is formed on a predetermined portion of the transparent substrate 31, and silicon nitride or silicon oxide is formed on the transparent substrate 31. The gate insulating film 35 is formed to cover the gate electrode 33.

An active layer 37 made of amorphous silicon or polycrystalline silicon that is not doped with impurities is formed in a portion corresponding to the gate electrode 33 on the gate insulating film 35. Then, ohmic contact layers 39 made of amorphous silicon or polycrystalline silicon doped with N-type or P-type impurities at high concentrations are formed on both sides of the active layer 37 except for the middle portion.

The drain and source electrodes 41 and 43 made of a metal such as chromium (Cr), molybdenum (Mo), titanium or tantalum, or a molybdenum alloy such as MoW, MoTa or MoNb on the ohmic contact layer 39. ) Is formed. The drain and source electrodes 41 and 43 are in ohmic contact with the ohmic contact layer 39.

The passivation layer 45 covering the above-described structure is formed on the gate insulating film 35. The passivation layer 45 is an inorganic insulating material such as silicon oxide or silicon nitride, or an acrylic organic compound, Teflon, cytotop, perfluorocyclobutane (BCC), or benzocyclobuten (BCB). The dielectric constant of is formed of small organic organic insulating material.

A contact hole 47 exposing the drain electrode 41 is formed in the passivation layer 45. In addition, a pixel electrode 53 is formed in contact with a predetermined portion on the passivation layer 45 through the contact hole 47 to be electrically connected to the drain electrode 41. The pixel electrode 53 is composed of first and second electrode layers 49 and 51 made of a transparent conductive material.

In order to prevent the size of the pixel electrode 53 from being reduced, the first electrode layer 49 is formed with a thickness of about 100-2000 μs of indium zinc oxide (IZO) having a large etching rate. In addition, in order to prevent the contact resistance of the pixel electrode 53 from deteriorating, the second electrode layer 51 is formed with an indium tin oxide (ITO) having excellent resistance characteristics to a thickness of about 20-1000 Å. Therefore, the liquid crystal display according to the present invention can prevent the decrease in the size of the pixel electrode 53 and the deterioration of the contact resistance characteristics.

3A to 3D are manufacturing process diagrams of the liquid crystal display device according to the present invention.

Referring to FIG. 3A, a metal thin film is formed on a transparent substrate 31 by sputtering or the like to deposit aluminum or copper (Cu) or the like on a metal with good conductive properties. The metal thin film is patterned to remain only in a predetermined portion of the transparent substrate 31 by a photolithography method including a wet method to form the gate electrode 33.

Referring to FIG. 3B, the gate insulating layer 35, the active layer 37, and the ohmic contact layer 39 are sequentially formed on the transparent substrate 31 to cover the gate electrode 33. The gate insulating layer 35 is formed by depositing an insulating material such as silicon oxide or silicon nitride, and the active layer 37 is formed of amorphous silicon or polycrystalline silicon that is not doped with impurities. In addition, the ohmic contact layer 39 is formed of amorphous silicon or polycrystalline silicon doped with N-type or P-type impurities at a high concentration.

The ohmic contact layer 39 and the active layer 37 are patterned to expose the gate insulating layer 35 by a photolithography method including anisotropic etching except for a predetermined portion corresponding to the gate electrode 33.

Referring to FIG. 3C, a metal such as chromium (Cr), molybdenum (Mo), titanium, or tantalum, or a molybdenum alloy (Mo alloy) such as MoW, MoTa, or MoNb is deposited on the gate insulating film 35 by a CVD method or sputtering ( It is deposited to cover the ohmic contact layer 39 by a sputtering method. The deposited metal or metal alloy is in ohmic contact with the ohmic contact layer 39.

The metal or metal alloy is patterned by a photolithography method so that the gate insulating film 35 is exposed to form drains and source electrodes 41 and 43. At this time, the metal or metal alloy and the ohmic contact layer 39 are also patterned to expose the active layer 37 of the portion corresponding to the gate electrode 33 between the drain and source electrodes 41 and 43. The portion of the active layer 37 corresponding to the gate electrode 33 between the drain and the source electrodes 41 and 43 becomes a channel.

Referring to FIG. 3D, an inorganic insulating material such as silicon oxide or silicon nitride is deposited on the transparent substrate 31 to form the passivation layer 45. The passivation layer 45 may be formed of an organic insulating material having a low dielectric constant such as an acryl-based organic compound, Teflon, cytope, perfluorocyclobutane (PFCB), or benzocyclobuten (BCB). .

The passivation layer 45 is patterned to form contact holes 47 exposing the source electrode 43. The first electrode layer 49 is formed by depositing indium zinc oxide (IZO) having a large etching rate on the passivation layer 45 to be in contact with the drain electrode 41 through the contact hole 47. Subsequently, indium tin oxide (ITO) having excellent resistance characteristics is deposited on the first electrode layer 49 to form a second metal layer 51. In the above, the first electrode layer 49 flows argon (Ar) and oxygen (O ₂ ) about 0-300SCCM and 0-100SCCM, respectively, at a temperature of about 0.1-3 Pa and about 0.5-3KW at room temperature of about -300 ° C. Deposit a thickness of about 100-2000Å at a temperature of. Then, the second electrode layer 51 flows argon (Ar) and oxygen (O ₂ ) about 0-300SCCM and 0-100SCCM, respectively, at a pressure of about 0.1-3 Pa and about 100-300 ° C. at a power of about 0.2-3KW. Deposit a thickness of about 20-1000Å at a temperature of.

The first and second electrode layers 49 and 51 are patterned by a photolithography method including wet etching to form the pixel electrode 53 to complete manufacturing of the lower plate. The pixel electrode 53 is formed by patterning a mixture of HCl, (COOH) ₂ or HCl + HNO ₃ with an etching solution in the first and second electrode layers 49 and 51. Since the etching rate of the first electrode layer 49 is large, the etching time is not only reduced, but the size of the pixel electrode 53 is prevented from being reduced. In addition, since the etching time is reduced during the patterning of the pixel electrode 53, the drain and the source electrodes 41 and 43 may be prevented from being etched through the pinholes of the passivation layer 45.

As described above, the liquid crystal display according to the present invention forms the pixel electrode as two layers of the first electrode layer having a large etch rate and the second electrode layer having excellent resistance characteristics, thereby preventing the contact resistance characteristics from deteriorating. It is possible to reduce the etching time and to reduce the size of the pixel electrode during patterning. In addition, since the etching time is reduced when the pixel electrode is patterned, the drain and the source electrode may be prevented from being etched.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (11)

A liquid crystal display comprising a thin film transistor comprising a gate electrode, a gate insulating film, an active layer, an ohmic contact layer, a drain, and a source electrode on a transparent substrate. A passivation layer formed on the gate insulating layer to cover the thin film transistor; A contact hole formed to expose the drain electrode in the passivation layer; The passivation layer includes a first electrode layer of a transparent conductive material having a large etch rate and a second electrode layer of a transparent conductive material having good resistance characteristics, and includes a pixel electrode formed to contact the drain electrode through the contact hole. Liquid crystal display device. The method according to claim 1, And the first electrode layer is formed of indium zinc oxide (IZO). The method according to claim 2, And the first electrode layer is formed to a thickness of 100-2000Å. The method according to claim 1, And the second electrode layer is formed of indium tin oxide (ITO). The method according to claim 4, And the second electrode layer is formed to a thickness of 20-1000Å. In the manufacturing method of a liquid crystal display device comprising a thin film transistor comprising a gate electrode, a gate insulating film, an active layer, an ohmic contact layer, a drain and a source electrode on a transparent substrate, Forming a passivation layer covering the thin film transistor on the gate insulating film; Patterning the passivation layer to form contact holes exposing the drain electrode; A pixel electrode is formed by sequentially stacking and patterning a first electrode layer of a transparent conductive material having a large etch rate and a second electrode layer of a transparent conductive material having good resistance characteristics to contact the drain electrode through the contact hole on the passivation layer. A method of manufacturing a liquid crystal display device, comprising the step of: The method according to claim 6, And forming the first electrode layer from indium tin oxide (ITO). The method according to claim 7, Argon (Ar) and oxygen (O ₂ ) in the first electrode layer flowing 0-300SCCM and 0-100SCCM, respectively, at a pressure of 0.1-3 Pa and a power of 0.5-3KW at a room temperature of -300 ° C. and a thickness of 100-2000 kPa Method for manufacturing a liquid crystal display device, characterized in that formed by vapor deposition. The method according to claim 6, And forming the second electrode layer from indium zinc oxide (IZO). The method according to claim 9, Argon (Ar) and oxygen (O ₂ ) flowing through the second electrode layer at 0-300SCCM and 0-100SCCM, respectively, at a pressure of 0.1-3 Pa and a power of 0.2-3KW at a temperature of 100-300 ° C. A method of manufacturing a liquid crystal display device, characterized in that formed by depositing at a thickness. The method according to claim 6, And etching the first and second electrode layers with a mixture of HCl, (COOH) ₂ or HCl + HNO ₃ to form the first electrode layer.