KR19990033213A - Ball Grid Array Semiconductor Package Using Silicon Substrate - Google Patents

Abstract

The present invention relates to a ball grid array semiconductor package using a silicon substrate, by using a silicon formed with a predetermined circuit pattern as a substrate to maximize the heat release rate from the semiconductor chip, the maximum moisture infiltration to suppress the electrical performance of the package And a semiconductor chip having a plurality of input / output pads formed on a surface thereof to improve reliability and to implement a package having a multichip module function. On the upper surface of the semiconductor chip, a plurality of circuit patterns are formed on the surface of the bottom surface of the semiconductor chip, and solder ball lands are formed to be connected to the circuit patterns, and a protective film is provided to protect the circuit patterns from an external environment. The coated silicon suprate; Connecting means for connecting the circuit pattern of the silicon substrate and the input / output pad of the semiconductor chip to each other so as to be electrically connected to each other; Encapsulation means for encapsulating the semiconductor chip, the connecting means and the like from an external environment; Ball grid array semiconductor package using a silicon substrate, characterized in that it comprises a plurality of solder balls fused for use as an input / output terminal to the motherboard on the bottom of the substrate substrate.

Description

Ball Grid Array Semiconductor Package Using Silicon Substrate

The present invention relates to a ball grid array semiconductor package using a silicon substrate, to be described in more detail, by using a silicon having a predetermined circuit pattern as a substrate to maximize the heat release rate from the semiconductor chip, the maximum moisture infiltration The present invention relates to a ball grid array semiconductor package using silicon substrate with a multichip module function to improve electrical performance and reliability of the package.

The Ball Grid Array Semiconductor Package (abbreviated as BGA Package) was developed to accommodate the needs of high-density semiconductor chips and multi-pinning, and has a uniform shape on the bottom for mounting to the main board. One type of surface mount (SMT) package with multiple solder balls arranged. Named a plastic BGA package in the late 1980s, it was first developed and is mainstream to date, and is now available in ceramic BGA packages, tape BGAs to meet the need for high yields and multipinning in assembling processes. Various variants of packages, metal BGA packages, etc. are being developed. Among the various BGA packages, the structure of a conventional BGA package (PKG ') according to the plastic BGA package will be described below.

First, as shown in FIG. 1, a semiconductor chip 4 ′, in which various electronic circuits and wirings are stacked and performing a predetermined electrical function, is positioned at the center thereof, and aluminum (Al) is disposed on an upper surface of the semiconductor chip 4 ′. ), A plurality of input / output pads 2 'are formed.

The bottom surface of the semiconductor chip 4 'is provided with a substrate 18' for transmitting electrical signals of the semiconductor chip 4 'to the main board and for fixing and supporting the semiconductor chip 4'. And the substrate 18 'includes a plurality of polymer resin layers 14', a copper circuit pattern 10 'formed on each of the polymer resin layers 14', and the copper circuit pattern 10 '. ) A conductive via hole 16 ′ connecting each other to each other and a solder mask 12 ′ coated on the top or bottom of the polymer resin layer 14 ′ to protect the copper circuit pattern 10 ′ exposed to the outside. consist of. The substrate 18 'may also be referred to as a printed circuit board (PCB).

On the other hand, an adhesive 6 'is applied to the upper surface of the substrate 18' to bond and fix the semiconductor chip 4 'and to the input / output pad 2' of the semiconductor chip 4 '. Is bonded with a conductive wire 8 'to a predetermined copper circuit pattern 10' exposed on the substrate 18 'surface.

In order to protect the semiconductor chip 4 'and the conductive wire 8' from an external mechanical, chemical and electrical environment, an encapsulation means 22 ', that is, an epoxy mold compound or a liquid encapsulant ( Glob Top) and the like. In addition, a solder ball land 22 'connected to a copper circuit pattern 10' is formed on a bottom surface of the substrate 18 ', and the solder ball land 22' serves as a signal / input / output terminal to the main board. 20 'is fused.

This conventional BGA package (PKG ') is a copper circuit pattern 10 formed between the input / output pad 2', the conductive wire (8 '), a plurality of polymer resin layer 14' of the semiconductor chip (4 '). '), The conductive via hole 16', the solder ball 20 'land, and the solder ball 20' allow the semiconductor chip 4 'and the main board to communicate with each other and also serve as a power supply and ground. have.

The conventional BGA package (PKG ') as described above is a semiconductor due to the thickening means 22' surrounding the semiconductor chip 4 'and the polymer resin layer 14' composed of multiple layers as the substrate 18 '. The heat generated from the chip 4 'is hard to be released to the outside effectively. Moreover, in recent years, the semiconductor chip 4 'has been highly functionalized and a clock frequency of several hundred MHz has been used to effectively dissipate heat generated at this time.

In addition, the substrate 18 'has a structure that easily absorbs moisture due to the characteristics of the polymer resin layer 14' (moisture easily penetrates due to its incomplete atomic or molecular structure) and is mounted on a main board. When the water is absorbed when the operation is vaporized there is a problem that tends to cause pop corn phenomenon. In addition, since the coefficient of thermal expansion differs from that of the semiconductor chip 4 'or the copper circuit pattern 10', the BGA package is frequently bent due to a large coefficient of thermal expansion. ) Solder ball 20 'on the bottom causes a short circuit.

On the other hand, such a substrate 18 'has a structure in which a plurality of multilayered polymer resin layers 14' and a plurality of copper circuit patterns 10 'and via holes 16' are formed therebetween. In the end, there are various problems such as raising the production cost of BGA packages.

Therefore, the present invention has been made to solve the above-mentioned problems, and maximizes the heat release rate from the semiconductor chip to significantly improve the electrical function of the semiconductor chip, and to suppress the moisture penetration as much as possible to remove the popcorn phenomenon to improve the reliability In addition, by using a substrate that has a similar coefficient of thermal expansion as a semiconductor chip, the present invention provides a BGA package using a silicon substrate that can improve the reliability by eliminating warpage.

Another object of the present invention is to bond a semiconductor chip to the substrate by using a flip chip technology and to bond another semiconductor chip using a wire bonding technology to provide a silicon substrate having a function of a multi chip module. To provide a BGA package used.

1 is a cross-sectional view showing a conventional general plastic ball grid array semiconductor package.

Fig. 2 is a cross-sectional view showing a ball grid array semiconductor package using silicon substrate as a first embodiment of the present invention.

3 is a cross-sectional view showing a ball grid array semiconductor package using silicon substrate as a second embodiment of the present invention.

4 is a cross-sectional view showing a ball grid array semiconductor package using silicon substrate as a third embodiment of the present invention.

-Explanation of symbols for the main parts of the drawings-

PKG '; Conventional Common Ball Grid Array Package

PKG; Ball Grid Array Semiconductor Package Using Silicon Substrate

2 ; Input / output pad 4; Semiconductor chip

6; Silicon 8; Circuit pattern

10; Solder borland 11; Shield

12; Silicon suprate 14; Connection

15; Sealing means 16; Solder ball

18; Bumpland

In order to achieve the above object, a BGA package using a silicon substrate according to the present invention includes a semiconductor chip having a plurality of input / output pads formed on a surface thereof, and a plurality of surfaces of the bottom surface of the semiconductor chip based on silicon. A circuit pattern of the silicon substrate is formed and the solder bores are connected to the circuit pattern, the protective layer is coated to protect the circuit pattern from the external environment, and the circuit pattern of the silicon substrate Connecting means for connecting the input / output pads of the semiconductor chip to each other electrically, sealing means for sealing the semiconductor chip, the connecting means, and the like from the outside environment, and a solder borland on the bottom of the substrate. Comprising multiple solder balls fused for use as input / output terminals It is characterized by.

Hereinafter, with reference to the accompanying drawings, preferred embodiments of the BGA package (PKG) using the silicon substrate according to the present invention so that those skilled in the art can easily carry out the present invention in detail. If you explain it as follows.

First, as shown in FIGS. 2 to 4, a semiconductor chip 4 having a plurality of power supply, grounding, and signal input / output pads 2 is formed on a surface thereof, and an upper surface of the semiconductor chip 4 is provided. Silicon substrates 12 are located.

The silicon substrate 12 has a fine circuit pattern 8 formed on the bottom surface thereof based on silicon 6 (Si), which is a base material of the semiconductor chip 4, and the circuit pattern 8 To be connected to the lower solder ball land 10 is formed. In addition, a protective film 11 is formed on the bottom of the silicon 6 by using a solder mask or an oxide film generated from the silicon 6 itself to protect the circuit pattern 8 from the external environment. have. The circuit pattern 8 can be formed using a metal process, which is one of the semiconductor fabrication processes, preferably by vacuum evaporation, and the metal used here has good electrical conductivity and easy access to silicon 6. Aluminum (Al) having adhesion was used. It is also possible to use aluminum mixed with copper (Cu) or silicon (Si), which is not limiting but optional. The solder ball land 10 formed at the end of the circuit pattern 8 was formed using aluminum.

Since the silicon substrate 12 is a core part of the present invention, since the thermal conductivity is similar to that of metals, the silicon substrate 12 is easily transmitted to the outside by effectively receiving heat generated during operation of the semiconductor chip 4 without additional heat dissipation means. It also plays a role of releasing and it has a hard crystal structure, so it is hard to penetrate moisture, which can solve various problems caused by moisture penetration such as popcorn phenomenon of BGA package (PKG). Moreover, since the coefficient of thermal expansion is the same as that of the semiconductor chip 4, the flatness is always kept constant by preventing the BGA package (PKG) from being bent or deformed on either side due to the high heat generated during the operation of the semiconductor chip 4. By doing so, the reliability can be greatly improved.

Meanwhile, the circuit pattern 8 of the silicon substrate 12 and the input / output pad 2 of the semiconductor chip 4 are connected to each other by connecting means 14 so as to be electrically connected to each other. As 14, gold wire and aluminum wire may be used as shown in FIG. 3, or bumps may be used as shown in FIG. When the gold wire or the aluminum wire is used as the connecting means 14, the circuit pattern 8 of the input / output pad 2 and the silicon 6 of the semiconductor chip 4 using a wire bonding device. ). Reference numeral 22 in the figure denotes a means for directly bonding the semiconductor chip 4 to the surface of the silicon 6 as an adhesive. On the other hand, when the bump is used as the connecting means 14, the bump land 18 is formed in the circuit pattern 8 at the corresponding position of the input / output pad 2 of the semiconductor chip 4, and the input / output pad ( 2) bumps are formed on the bumps or the bump lands 18 and then bonded using flip chip technology. Here, the flip chip technology is to form bumps on the semiconductor chip 4 or the bump lands 18 and turn the input / output pads 2 and the bump lands 18 on the semiconductor chip 4 in a face down state. It refers to a technique of bonding a plurality of input / output pads 2 to a circuit pattern or a printed circuit board at the same time by contacting each other and immediately reflowing in a high temperature environment. The bump may be any one selected from the group consisting of gold (Au), silver (Ag), and solder (Solder), which is not limited and optional.

The semiconductor chip 4, the connecting means 14, and the like are encapsulated with an encapsulation means 15, such as an epoxy mold compound or a liquid encapsulant, in order to protect it from external mechanical, electrical, and chemical environments. Here, the encapsulation means 15 may further improve the heat dissipation rate by encapsulating the bottom surface of the semiconductor chip 4 when the bump is used as the connecting means 14 as shown in FIG. 2. As shown in FIG. 3, when the connecting means 14 is a conductive wire, the semiconductor chip 4 and the entire conductive wire are encapsulated so that the conductive wire is not exposed to the outside.

In addition, the solder ball 16 formed of tin (Sn) and lead (Pb) is fused in a high temperature environment in order to use it as an input / output terminal to the main board. have.

Meanwhile, as shown in FIG. 4, a plurality of semiconductor chips 4 may be disposed on the bottom of the silicon substrate 12 to implement a BGA package (PKG) serving as a multi chip module. At this time, as the connecting means 14 of the input / output pad 2 and the circuit pattern 8, the connection using a conductive wire and the connection using a bump can be simultaneously performed. Using different kinds of connection means 14 may be arbitrarily manufactured by the size of the semiconductor chip 4, the number of input / output pads 2 or the shape of the circuit pattern 8 and the necessity of those skilled in the art. to be.

As described above, although the present invention has been described with reference to the above embodiments, various modifications may be made by those skilled in the art without departing from the scope and spirit of the present invention.

Therefore, according to the present invention, by using a silicon-based substrate centered on silicon without a separate heat dissipation means, the heat release rate is maximized to significantly improve the electrical function of the semiconductor chip, and moisture intrusion is suppressed to the maximum, thereby eliminating popcorn phenomena. The thermal expansion coefficient of the semiconductor chip is similar to that of the semiconductor chip, thereby eliminating the warpage of the package, thereby providing a BGA package using the silicon substrate.

In addition, by bonding a semiconductor chip to the substrate by using a flip chip technology and by bonding another semiconductor chip using a wire bonding technology, there is an effect of providing a BGA package using a silicon substrate having a function of a multi-chip module.

Claims (4)

A semiconductor chip having a plurality of input / output pads formed on a surface thereof; On the upper surface of the semiconductor chip, a plurality of circuit patterns are formed on the surface of the bottom surface of the semiconductor chip, and solder ball lands are formed to be connected to the circuit patterns, and a protective film is provided to protect the circuit patterns from an external environment. The coated silicon suprate; Connecting means for connecting the circuit pattern of the silicon substrate and the input / output pad of the semiconductor chip to each other so as to be electrically connected to each other; Encapsulation means for encapsulating the semiconductor chip, the connecting means and the like from an external environment; BGA package using a silicon substrate, characterized in that it comprises a plurality of solder balls fused for use as an input / output terminal to the motherboard on the lower solder ball land. According to claim 1, wherein the connecting means is a BGA package using a silicon substrate, characterized in that the gold wire. According to claim 1, wherein the connecting means is a BGA package using a silicon substrate, characterized in that the bump. The BGA package according to claim 1, wherein a plurality of semiconductor chips are positioned on a bottom surface of the silicon substrate, and an input / output pad thereof is connected to a circuit pattern by a connecting means.