KR102465117B1 - Method for manufacturing printed circuit board - Google Patents

Abstract

The present invention relates to a method for manufacturing a printed circuit board, and the method for manufacturing a printed circuit board according to the present invention includes the steps of forming a seed layer on one surface of a carrier member to manufacture a transfer film; and a first circuit on the seed layer. Forming a pattern; Forming an insulating core layer and a metal layer on the first circuit pattern; Forming a conductive part electrically connecting the first circuit pattern and the metal layer; And, the metal layer patterning to form a second circuit pattern; and transferring the first circuit pattern to the insulating core layer by removing the transfer film.

Description

Printed circuit board manufacturing method {METHOD FOR MANUFACTURING PRINTED CIRCUIT BOARD}

The present invention relates to a method for manufacturing a printed circuit board, and more particularly, to a method for manufacturing a printed circuit board capable of easily manufacturing a multilayer printed circuit board using a transfer film having a seed layer and implementing a precise microcircuit pattern. it's about

In general, a printed circuit board (Printed Circuit Board) is a board-type electronic component that mounts various electronic components and electrically connects them.

There are several types of printed circuit boards, such as single-layer, double-sided, multi-layer, etc., depending on the circuit pattern layer of the wiring structure. In the early days of the application of printed circuit boards, products with relatively simple structures such as those with printed wiring on one side were the main products. , As electronic products are gradually reduced in weight, miniaturized, multifunctional, and multifunctional, the wiring density is increasing and the structure is becoming more complex.

Among such printed circuit boards, a typical manufacturing method of a double-sided printed circuit board will be described by taking a double-sided flexible printed circuit board as an example.

After preparing a copper clad laminate (CCL) film fabric in which thin copper (Cu) is laminated on both sides of an insulating film such as a polyimide film or a polyester film, the copper In order to electrically connect the part where the circuit pattern of the (Cu) layer is to be formed, a via hole is formed at a predetermined position of the CCL film using a drill or the like, and then plating is performed on the via hole to electrically connect the copper (Cu) layer to each other. make it connect Then, by using a photosensitive film or applying liquid to the copper (Cu) layer on both sides of the CCL film, each copper (Cu) layer is processed into a predetermined circuit pattern through exposure, development, etching, and peeling processes. fabrication of flexible circuit boards.

However, the conventional manufacturing method as described above has a problem in that manufacturing cost increases because an expensive copper foil film must be used. In particular, there is a problem in that it is difficult to finely form a circuit when manufacturing a multilayer printed circuit board.

Patent Document 1: Korean Patent Publication No. 10-2016-0076964 (2016.07.01)

Accordingly, an object of the present invention is to solve such conventional problems, and to manufacture a printed circuit board capable of easily manufacturing a multi-layer printed circuit board using a transfer film having a seed layer formed thereon and implementing a precise fine circuit pattern. is to provide a way

The above object, according to the present invention, by forming a first seed layer on one surface of the carrier member to prepare a transfer film; forming a first circuit pattern on the first seed layer; forming an insulating core layer and a metal layer on the first circuit pattern; forming a conductive part electrically connecting the first circuit pattern and the metal layer; patterning the metal layer to form a second circuit pattern; and removing the transfer film to transfer the first circuit pattern to the insulating core layer.

The manufacturing of the transfer film may further include forming a bonding control layer between the carrier member and the first seed layer.

After the step of manufacturing the transfer film, a bonding step of bonding the carrier members of the pair of transfer films to both sides of the bonding layer may be further performed.

The manufacturing of the transfer film may further include forming a second seed layer different from the first conductive material forming the first seed layer.

The manufacturing of the transfer film may include forming a bonding control layer between the carrier member and the first seed layer, and forming a second seed layer different from the first conductive material forming the first seed layer. It may further include steps to do.

In the step of manufacturing the transfer film, the first seed layer may be formed of two or more layers having different etching rates.

A bonding force between the carrier member and the first seed layer may be set to be relatively low compared to a bonding force between the first seed layer and the first circuit pattern.

The forming of the first circuit pattern may include forming a photosensitive layer on the first seed layer, forming a pattern groove on the photosensitive layer, and filling a portion exposed through the pattern groove with a conductive material. and filling the conductive material to form the first circuit pattern and removing the photoresist layer.

In the step of forming the insulating core layer and the metal layer on the first circuit pattern, before forming the metal layer, further comprising forming an additional transfer film, wherein the additional transfer film comprises a carrier member and a first seed layer. A transfer film comprising a carrier member, a transfer film comprising a first seed layer and a second seed layer may be used.

The forming of the additional transfer film may include bonding the additional transfer film onto the insulating core layer so that the first seed layer of the additional transfer film contacts the insulating core layer, and the carrier of the additional transfer film. and transferring the first seed layer to the insulating core layer by removing the member, and the metal layer may be formed on the first seed layer transferred to the insulating core layer.

The forming of the additional transfer film may include bonding the additional transfer film onto the insulating core layer such that the second seed layer of the additional transfer film contacts the insulating core layer, and the carrier of the additional transfer film. By removing the member, the second seed layer of the additional transfer film is in contact with the insulating core layer, and the first seed layer of the additional transfer film is in contact with the second seed layer of the additional transfer film. And transferring a second seed layer and a first seed layer to the insulating core layer, wherein the metal layer is transferred to the insulating core layer and formed on the first seed layer in contact with the second seed layer. have.

The forming of the additional transfer film may include bonding the additional transfer film onto the insulating core layer such that the second seed layer of the additional transfer film contacts the insulating core layer, and the carrier of the additional transfer film. By removing the member, the second seed layer of the additional transfer film is in contact with the insulating core layer, and the first seed layer of the additional transfer film is in contact with the second seed layer of the additional transfer film. and transferring a second seed layer and a first seed layer to the insulating core layer, wherein the metal layer is transferred to the insulating core layer and transfers the first seed layer formed on the second seed layer to the first seed layer. After selectively etching away using an etching solution capable of dissolving only the seed layer, it may be formed on the second seed layer transferred to the insulating core layer.

The transferring of the first circuit pattern to the insulating core layer may include separating the carrier member from the first seed layer and removing the first seed layer.

The first seed layer is made of a first conductive material, the first circuit pattern is made of a second conductive material different from the first conductive material, and in the step of removing the first seed layer, the first circuit pattern is made of a second conductive material different from the first conductive material. Excluding the pattern, only the first seed layer may be selectively removed using an etching solution capable of dissolving only the first seed layer.

In the step of transferring the first circuit pattern to the insulating core layer,

Using an etching solution capable of dissolving only the first seed layer, only the first seed layer in contact with the insulating core layer and the first circuit pattern is selectively removed by etching, and only the first seed layer is etched. The carrier member in contact with the first seed layer may come off from the first seed layer, and the transfer film may be removed.

On the other hand, an object of the present invention is to prepare a carrier substrate having a second seed layer and a first seed layer formed on a bonding layer; forming a first circuit pattern on the first seed layer; forming an insulating core layer and a metal layer on the first circuit pattern; forming a conductive part electrically connecting the first circuit pattern and the metal layer; patterning the metal layer to form a second circuit pattern; And it is also achieved by a printed circuit board manufacturing method comprising a peeling step of peeling the carrier substrate.

The manufacturing of the carrier substrate may further include forming a bonding control layer between the bonding layer and the second seed layer.

The manufacturing of the carrier substrate may include manufacturing a transfer film by forming a first seed layer and a second seed layer on one surface of a carrier member, and bonding a bonding layer to the second seed layer of the transfer film. and a transfer step of transferring the first seed layer and the second seed layer to the bonding layer by removing the carrier member.

The manufacturing of the carrier substrate may include manufacturing a transfer film by forming a first seed layer and a second seed layer on one surface of a carrier member, and manufacturing a pair of transfer films after the manufacturing of the transfer film. A bonding step of bonding two seed layers to both sides of the bonding layer, respectively, and removing the carrier member of the pair of transfer films, so that the second seed layer is in contact with both sides of the bonding layer, respectively, and each of the second seed layers A transfer step of transferring the first and second seed layers to each of both surfaces of the bonding layer so that the first seed layer is in contact with each other may be included.

In the manufacturing of the carrier substrate, first and second seed layers are formed on both sides of the carrier member to prepare a double-sided transfer film, and a bonding layer is disposed between the plurality of double-sided transfer films, respectively. A bonding step of post-bonding, removing the carrier member, respectively, so that the second seed layer is in contact with both sides of the bonding layer and the first seed layer is in contact with each of the second seed layer, respectively, on both sides of the bonding layer Including a transfer step of transferring the first and second seed layers, a plurality of carrier substrates may be manufactured.

In the step of manufacturing the carrier substrate, the first seed layer may be formed of two or more layers having different etching rates.

The forming of the first circuit pattern may include forming a photoresist layer on the first seed layer, forming a pattern groove on the photoresist layer, and removing the first seed layer exposed through the pattern groove. a conductive material filling step of forming a first circuit pattern by filling a conductive material in a portion exposed through the pattern groove; removing the photoresist layer; and removing the photoresist layer and then exposed first seed It may include removing the layer.

The peeling step of peeling the carrier substrate may include peeling the bonding layer from the second seed layer and removing the second seed layer.

In the step of forming the insulating core layer and the metal layer on the first circuit pattern, the step of forming an additional transfer film prior to the formation of the metal layer is further included, wherein the additional transfer film comprises a carrier member and a first seed layer. A transfer film including a transfer film or a carrier member, a transfer film including a first seed layer and a second seed layer may be used.

The forming of the additional transfer film may include bonding the additional transfer film onto the insulating core layer such that the first seed layer of the additional transfer film contacts the insulating core layer, and the carrier of the additional transfer film and transferring the first seed layer to the insulating core layer by removing the member, and the metal layer may be formed on the first seed layer transferred to the insulating core layer.

The forming of the additional transfer film may include bonding the additional transfer film onto the insulating core layer such that the second seed layer of the additional transfer film contacts the insulating core layer, and the carrier of the additional transfer film. By removing the member, the second seed layer of the additional transfer film is in contact with the insulating core layer, and the first seed layer of the additional transfer film is in contact with the second seed layer of the additional transfer film. And transferring a second seed layer and a first seed layer to the insulating core layer, wherein the metal layer is transferred to the insulating core layer and formed on the first seed layer in contact with the second seed layer. have.

The metal layer is transferred to the insulating core layer and the first seed layer formed on the second seed layer is selectively etched away using an etching solution capable of dissolving only the first seed layer, and then applied to the insulating core layer. It may be formed on the transferred second seed layer.

The first seed layer is made of a first conductive material, the first circuit pattern and the second seed layer are made of a second conductive material different from the first conductive material, and the first circuit pattern and the second seed layer are made of a second conductive material. Excluding the seed layer, only the first seed layer may be selectively removed using an etching solution capable of dissolving only the first seed layer.

The first seed layer may be formed of a silver (Ag) material.

The second seed layer may be formed of copper or aluminum.

Meanwhile, an object of the present invention is to prepare a core substrate on which first seed layers are respectively formed on both sides of an insulating core layer; a drilling step of forming a via hole penetrating the core substrate; a circuit pattern forming step of forming a first circuit pattern and a second circuit pattern on both sides of the core substrate, and forming a conductive part electrically connecting the first circuit pattern and the second circuit pattern on both sides to the via hole; and removing the first seed layer exposed through the portion where the first circuit pattern and the second circuit pattern are not formed.

The preparing of the core substrate may further include forming a bonding control layer in contact with the first seed layer before sequentially stacking the first seed layers on both sides of the insulating core layer.

Meanwhile, an object of the present invention is to prepare a core substrate in which a second seed layer and a first seed layer are sequentially stacked on both sides of an insulating core layer; a drilling step of forming a via hole penetrating the core substrate; a circuit pattern forming step of forming a first circuit pattern and a second circuit pattern on both sides of the core substrate, and forming a conductive part electrically connecting the first circuit pattern and the second circuit pattern on both sides to the via hole; removing the first seed layer exposed through the portion where the first circuit pattern and the second circuit pattern are not formed; and removing the second seed layer exposed through the portion where the first circuit pattern and the second circuit pattern are not formed.

The preparing of the core substrate may further include forming a bonding control layer in contact with the first seed layer before sequentially stacking second and first seed layers on both sides of the insulating core layer, respectively.

Meanwhile, an object of the present invention is to prepare a core substrate in which a second seed layer and a first seed layer are sequentially stacked on both sides of an insulating core layer; removing the first seed layer; a drilling step of forming a via hole penetrating the core substrate; a circuit pattern forming step of forming a first circuit pattern and a second circuit pattern on both sides of the core substrate, and forming a conductive part electrically connecting the first circuit pattern and the second circuit pattern on both sides to the via hole; and removing the second seed layer exposed through the portion where the first circuit pattern and the second circuit pattern are not formed.

The preparing of the core substrate may further include forming a bonding control layer in contact with the first seed layer before sequentially stacking second and first seed layers on both sides of the insulating core layer, respectively.

The step of preparing the core substrate includes the step of forming a first seed layer and a second seed layer on one surface of a carrier member to prepare a transfer film, and after the step of preparing the transfer film, the step of preparing a pair of transfer films. A bonding step of bonding two seed layers to both sides of the insulating core layer, respectively, and removing the carrier member of the pair of transfer films, so that the second seed layer is in contact with both sides of the insulating core layer, respectively, and the second seed layer A transfer step of transferring the first and second seed layers to each of both surfaces of the insulating core layer so that the first seed layer comes into contact with each layer may be included.

The bonding strength between the carrier member and the first seed layer may be set to be relatively low compared to the bonding strength between the first seed layer and the second seed layer.

In the preparing of the core substrate, first and second seed layers are formed on both sides of the carrier member to prepare a double-sided transfer film, and an insulating core layer is disposed between the plurality of double-sided transfer films. and a bonding step of bonding after bonding, removing the carrier member, respectively, so that the second seed layer is in contact with both sides of the insulation core layer and the first seed layer is in contact with each of the second seed layer, the insulation core layer A plurality of core substrates may be manufactured by including a transfer step of transferring the first and second seed layers to each of both surfaces.

The bonding strength between the carrier member and the first seed layer may be set to be relatively low compared to the bonding strength between the first seed layer and the second seed layer.

In the step of manufacturing the core substrate, the first seed layer may be formed of two or more layers having different etching rates.

In the step of removing the first seed layer, the first seed layer may be dissolved using an etching solution capable of dissolving only the first seed layer.

The circuit pattern forming step includes a photosensitive layer forming step of forming a photosensitive layer on the first seed layer located on both sides of the insulating core layer, and partially removing the photosensitive layer to form the via hole and the first circuit pattern and a pattern groove forming step of forming a pattern groove in a portion where a second circuit pattern is to be formed, and filling a portion exposed through the pattern groove with a conductive material to form a first circuit in the first seed layer on both sides of the insulating core layer. The method may include forming a pattern and a second circuit pattern, respectively, a conductive material filling step of forming a conductive part on an inner wall surface of the via hole, and a photoresist layer removing step of removing the photoresist layer.

In the circuit pattern forming step, prior to the photoresist layer forming step, a conductive film forming step of forming a conductive film on an outer surface of the first seed layer and an inner wall surface of the via hole may be further performed.

The circuit pattern forming step may include forming a photosensitive layer on the second seed layer located on both sides of the insulating core layer, and partially removing the photosensitive layer to form the via hole, the first circuit pattern, and the second A first circuit pattern and a second circuit pattern are formed in a second seed layer on both sides of the insulating core layer by forming a pattern groove in a portion where a circuit pattern is to be formed, and filling a portion exposed through the pattern groove with a conductive material. A step of forming each via hole and filling the via hole with a conductive material to form a conducting part on an inner wall surface of the via hole and removing the photoresist layer may be included.

In the circuit pattern forming step, prior to the photoresist layer forming step, a step of forming a conductive film on an outer surface of the second seed layer and an inner wall surface of the via hole may be further performed.

The method may further include forming a build-up layer on the first circuit pattern and the second circuit pattern.

The forming of the build-up layer may include forming an insulating layer and an additional seed layer on the first and second circuit patterns, and the addition of the additional seed layer so that portions of the first and second circuit patterns are exposed. Forming a via hole penetrating the seed layer and the insulating layer; Forming a photosensitive layer on the additional seed layer; Forming a pattern groove on the photosensitive layer; Forming a pattern groove on the photosensitive layer; A conductive material filling step of forming a circuit pattern by filling the portion exposed through the groove with a conductive material, a photoresist layer removal step of removing the photoresist layer, and an additional seed layer exposed through the portion where the circuit pattern is not formed. It may include the step of removing.

In the step of forming the buildup layer, prior to the step of forming the photoresist layer, a step of forming a conductive film on an outer surface of the additional seed layer and an inner wall surface of the via hole may be further performed.

According to the present invention, an object of the present invention is to solve such conventional problems, and a multilayer printed circuit board can be easily manufactured using a transfer film on which a seed layer is formed, and printing capable of implementing precise microcircuit patterns A method for manufacturing a circuit board is provided.

1 is a cross-sectional view showing various types of transfer films applied to the present invention;
2 to 3 are cross-sectional views for each process of a method for manufacturing a printed circuit board according to a first embodiment of the present invention;
4 and 5 are cross-sectional views of each process of a method for manufacturing a printed circuit board according to a first modified example of the first embodiment of the present invention.
6 and 7 are cross-sectional views of each process of a printed circuit board manufacturing method according to a second modified example of the first embodiment of the present invention.
8 to 9 are cross-sectional views for each process of a printed circuit board manufacturing method according to a third modified example of the first embodiment of the present invention;
10 to 11 are cross-sectional views for each process of a method for manufacturing a printed circuit board according to a second embodiment of the present invention;
12 to 13 are cross-sectional views for each process of a printed circuit board manufacturing method according to a first modified example of the second embodiment of the present invention;
14 is a cross-sectional view for each process of a printed circuit board manufacturing method according to a second modified example of the second embodiment of the present invention;
15 to 16 are cross-sectional views for each process of a method for manufacturing a printed circuit board according to a third embodiment of the present invention;
17 to 18 are cross-sectional views of each process of forming a build-up layer in a method for manufacturing a printed circuit board according to a third embodiment of the present invention;
19 to 20 are cross-sectional views for each process of a method for manufacturing a printed circuit board according to a first modified example of the third embodiment of the present invention;
21 and 22 are cross-sectional views for each process of a method for manufacturing a printed circuit board according to a fourth embodiment of the present invention;
23 to 24 are cross-sectional views of each process of forming a build-up layer in a method for manufacturing a printed circuit board according to a fourth embodiment of the present invention;
25 is a cross-sectional view of each process of manufacturing a core substrate of the printed circuit board manufacturing method according to the third and fourth embodiments of the present invention.

Prior to description, in various embodiments, components having the same configuration are typically described in the first embodiment using the same reference numerals, and in other embodiments, components different from those of the first embodiment will be described. do.

Hereinafter, a method for manufacturing a printed circuit board according to a first embodiment of the present invention will be described in detail with reference to the accompanying drawings.

Among the accompanying drawings, FIG. 1 is a cross-sectional view showing various forms of a transfer film applied to the present invention, and FIGS. 2 and 3 are cross-sectional views of each process of a printed circuit board manufacturing method according to a first embodiment of the present invention.

As shown in FIGS. 2 and 3, the method for manufacturing a printed circuit board according to the first embodiment of the present invention includes a step of manufacturing a transfer film (S110), a step of forming a first circuit pattern (S120), and an insulating core layer. and forming a metal layer (S130), forming a conducting part (S140), forming a second circuit pattern (S150), and transferring (S160).

In the step of manufacturing the transfer film (S110), the transfer film 10 may be composed of a carrier member 11 and a first seed layer 12 as shown in (a) of FIG. 1, and the carrier member ( 11) is preferably made of a material that can be easily separated from the first seed layer 12 while having excellent smoothness.

On the other hand, the first seed layer 12 of the transfer film 10 may be formed of one layer as shown in FIG. 1 (a), or two layers or two layers as shown in FIG. 1 (b). The above multi-layer configuration may also be possible. Here, pinhole formation may be suppressed when forming a plurality of layers by coating a plurality of times.

In addition, as in (b) of FIG. 1, when formed in two layers, it is preferable that the two layers are formed with different characteristics.

The lower first seed layer 12b formed on the carrier member 11 has an initial attachment holding force when the carrier member 11 and the lower first seed layer 12b are initially attached, and the lower first seed layer 12b later. It is preferable to implement a layer having excellent characteristics in peeling/release force when the carrier member 11 is peeled from the first seed layer 12b.

Unlike this, the upper first seed layer 12a in contact with the first circuit pattern 30 and the insulating core layer 40 is a layer having a faster etching rate and lower resistance than the lower first seed layer 12b. It is desirable to implement Also, the upper first seed layer 12a may preferably have a higher surface reflectance than the lower first seed layer 12b.

As such, so that the upper and lower first seed layers 12a and 12b have different characteristics, different layers may be formed by varying the content of both binder resins in the two layers, and different types of binder resins may be selected differently. A layer may be formed using a binder resin of a binder resin, a layer may be formed using pure silver (Ag) ink without a binder resin, and each layer may have different hardness or thickness.

Specifically, when the upper and lower first seed layers 12a and 12b are formed of silver (Ag) paste prepared by dispersing silver (Ag) nanoparticles in a binder resin, the upper and lower first seed layers 12b By minimizing the binder resin content of the first seed layer 12a, it is possible to configure the upper first seed layer 12a as a layer that can be removed more quickly than the lower first seed layer 12b during etching by differentiating the two layers. . In addition, in this case, since the content of the binder resin is small, after removing the first seed layer 12 through the seed layer removing step (S162, see (j) of FIG. 3), the insulating core layer 40 and the first circuit pattern ( 30), it is possible to prevent contamination of the first circuit pattern 30 by being cleanly removed without leaving any residue of the binder resin.

Alternatively, as described above, by varying the hardness of each layer, deformation of the upper and lower first seed layers 12a and 12b in a substrate manufacturing process such as hot press can be minimized, and the thickness of each layer can be minimized Alternatively, characteristics such as improved release force and selective etching force may be secured.

On the other hand, the transfer film 10 may be composed of a carrier member 11, an adhesion control layer 14 and a first seed layer 12, as shown in (c) of FIG. 1, and (d) of FIG. As in, it may be composed of a carrier member 11, a first seed layer 12 and a second seed layer 13, and as shown in (e) of FIG. 1, the carrier member 11 and the adhesion control layer 14 ), it may be composed of a first seed layer 12 and a second seed layer 13.

Here, the carrier member 11 may be made of polyimide (PI) and/or nylon, or may be formed of a metal carrier layer. This metal carrier layer may be various types of metal sheets, such as copper and aluminum, for example, preferably a copper (Cu) sheet, but is not limited thereto, and preferably has a thickness of 18 μm, but is limited thereto. It is not, and may be applicable in various thicknesses.

Here, the adhesion control layer 14 is a step of separating the carrier member 11 later while maintaining the adhesiveness to the extent that the carrier member 11 and the first seed layer 12 are adhered to each other during the manufacturing process. It is a layer formed to secure the release force that can be well separated from the The adhesion control layer 14 may be formed by including, for example, a polymer resin such as a urethane resin, an epoxy resin, a polyimide resin, an ester resin, and an additive and a filler for controlling a release force. The release force (tensile peel strength) of the adhesion control layer may be 0.005 kgf/cm to 0.5 kgf/cm, preferably 0.01 kgf/cm to 0.05 kgf/cm.

On the other hand, in the case of the second seed layer 13 in (d) and (e) of FIG. 1, the layer may be formed of various metals, but may be formed of copper (Cu) as an example, and is not limited thereto. , The thickness is preferably 1 to 5 μm, but is not limited thereto, and may be applicable to various thicknesses.

As an example of the step of manufacturing the transfer film 10, in the step of manufacturing the transfer film (S110) as shown in (a) of FIG. 2, the carrier member 11 having excellent surface smoothness is made of silver (Ag) material The first seed layer 12 is formed by coating a first conductive material made of.

The first seed layer 12 may be formed on the carrier member 11 by a method such as coating, screen printing, sputtering, chemical vapor deposition, electrolytic plating, or electroless plating, and the first conductive material is silver (Ag). ) may be made of a silver (Ag) paste prepared by dispersing nanoparticles in a thermosetting resin. Here, the first seed layer 12 is formed of silver (Ag), but it is not limited thereto, and the metal forming the first seed layer 12 is of a different type from the metal forming the circuit pattern in consideration of later etching. If it is a metal, it can be applied in various ways.

In the first circuit pattern forming step ( S120 ), a first circuit pattern 30 is formed on the first seed layer 12 .

Specifically, the first circuit pattern forming step (S120) includes forming the photosensitive layer 20 on the first seed layer 12 (S121), and pattern grooves 21 in the photosensitive layer 20. ) (S122), filling the pattern grooves 21 with a conductive material (S123), and removing the photosensitive layer (S124).

In the step of forming the photosensitive layer (S121), the photosensitive layer 20 is formed on the seed layer 12 as shown in FIG. 2(b). The photoresist layer 20 is a preliminary step for forming a circuit pattern on the first seed layer 12 . In the step of forming the photosensitive layer (S121), through a process widely known in the art, such as a method of laminating a general photosensitive dry film and a method of applying and forming a photosensitive etching resist ink. A photosensitive layer 20 may be formed.

In the pattern groove forming step (S122), the photosensitive layer 20 is partially removed through an exposure and development process as shown in FIG. .

Here, after forming the photosensitive layer 20 on the first seed layer 12 made of silver (Ag), the photosensitive layer 20 is partially removed through exposure and development processes, etc., as shown in (c) of FIG. Thus, a pattern groove 21 may be formed in a portion where a circuit pattern is to be formed. In this case, since the first seed layer 12 made of silver (Ag) has very good reflection efficiency under the UV curing condition of the photosensitive layer 20, the reflection efficiency is specifically a basic self-property of silver (Ag) As the surface roughness of silver (Ag) is high and the surface roughness of silver (Ag) is excellent, the straightness is improved because the specular reflection efficiency is excellent under UV curing conditions, so that the pattern grooves 21 are very smooth and uniform, and the straightness is very good. can

Unlike the prior art in which it was difficult to implement a fine circuit pattern because the circuit pattern was formed in a non-uniform and non-straight way, for example, in the form of an oblique line when forming a circuit pattern in a conventional method, according to the present invention, as described above, As the second conductive material such as copper having excellent electrical conductivity can be filled in the pattern groove 21 having a very smooth, uniform and straightness shape, a very smooth, uniform and straightness fine first The circuit pattern 30 can be formed very easily.

In the step of filling the conductive material (S123), as shown in (d) of FIG. 2, a second conductive material such as copper having excellent electrical conductivity is filled in the pattern groove 21 through an electroplating process to form the first circuit pattern. (30) can be formed. Here, it may be preferable to fill the pattern grooves 21 with a conductive material through electroplating, and screen printing, inkjetting, or electroless plating may be performed alone, or two or more methods may be selected from these to be used together. Filling is also possible.

In the step of removing the photosensitive layer (S124), the photosensitive layer 20 formed on the seed layer 12 is peeled off and removed as shown in (e) of FIG.

In the insulating core layer and metal layer forming step (S130), the insulating core layer 40 and the metal layer 50 are sequentially laminated on the first circuit pattern 30 as shown in FIG.

For the insulating core layer 40, a prepreg sheet impregnated with a thermosetting resin in glass epoxy and provided in a semi-cured state, a bonding sheet, or a hot-melt thermosetting resin may be used. . In addition, after the insulating core layer 40 and the metal layer 50 are laminated, heat and pressure may be simultaneously applied in the thickness direction of the substrate through a hot press process for complete bonding.

The metal layer 50 is for forming the second circuit pattern 51 and may be made of a copper material having excellent electrical conductivity. The metal layer 50 may be formed by various methods such as sputtering, coating, or plating, or the metal layer 50 may be formed by transferring the metal copper layer onto the insulating core layer 40 using a transfer film on which the metal copper layer is formed. may be

Meanwhile, in the insulating core layer and metal layer forming step (S130), after the insulating core layer 40 is formed, the insulating core layer 40 is formed using the transfer film shown in (a) to (e) of FIG. ) It is also possible to form an additional transfer film 10 on. For example, after laminating the transfer film 10 of FIGS. 1 (a) to (e) on the insulating core layer 40, applying heat and pressure simultaneously in the thickness direction of the substrate through a hot press process to bond them; , by peeling the carrier member 11 of the transfer film 10 shown in (a) to (e) of FIG. 1 or the carrier member 11 on which the adhesion control layer 14 is formed, the first seed layer 12 ; or a first seed layer (12a, 12b) formed of two layers; Alternatively, a step of transferring the first and second seed layers 12 and 13 to the insulating core layer 40 may be further performed.

In the steps of laminating the transfer film 10 of FIGS. 1 (a) to (e) on the insulating core layer 40, the first seed layer 12 is laminated in contact with the insulating core layer 40, or The first seed layers 12a and 12b of the layer are stacked in contact with the insulating core layer 40, or the second seed layer 13 of the first and second seed layers 12 and 13 is stacked on the insulating core layer 40. It can be stacked in contact with.

And, the first seed layer 12; or a first seed layer (12a, 12b) formed of two layers; or the first and second seed layers 12 and 13; after the step of transferring the insulating core layer 40, the first seed layer 12 transferred to the insulating core layer 40; or two layers of first seed layers 12a and 12b; or the first seed layer 12 of the first and second seed layers 12 and 13; the first seed layer 12 while being maintained without removing; or two layers of first seed layers 12a and 12b; or the first seed layer 12 of the first and second seed layers 12 and 13; A metal layer 50 may be formed thereon. or the first seed layer 12 transferred to the insulating core layer 40; or two layers of first seed layers 12a and 12b; Alternatively, the metal layer 50 may be formed after removing only the first seed layer 12 of the first and second seed layers 12 and 13 by selective etching with an etching solution capable of removing only the first and second seed layers 12 and 13 .

In the conductive part forming step (S140), a via hole forming step of forming a via hole (V) penetrating the metal layer 50 and the insulating core layer 40 as shown in (g) of FIG. 3, and the via hole (V) and a conductive material filling step of forming a conductive part 60 electrically connecting the first circuit pattern 30 and the metal layer 50 by filling the conductive material into the conductive material. In the conductive material filling step, the conducting portion 60 may be formed of a conductive material having excellent electrical conductivity such as copper through an electroplating process. Here, it may be preferable to fill the conductive material through electroplating, and it is also possible to fill the conductive material by performing screen printing, ink jetting, or electroless plating alone or by using two or more methods selected from these. .

In the second circuit pattern forming step ( S150 ), the second circuit pattern 51 may be formed by patterning the metal layer 50 as shown in (h) of FIG. 3 . Patterning of the metal layer 50 may be performed through a photolithography process.

The transfer step (S160) includes a carrier member peeling step (S161) and a seed layer removing step (S162).

In the carrier member peeling step (S161), the first seed layer 12 and the first circuit pattern 30 formed on the carrier member 11 are transferred to the insulating core layer 40 as shown in FIG. 3 (i). To do this, the carrier member 11 is separated from the first seed layer 12. When the carrier member 11 is separated from the first seed layer 12, the first seed layer 12 and the first circuit pattern 30 are transferred to the insulating core layer 40 side. At this time, the bonding strength between the carrier member 11 and the first seed layer 12 is the bonding strength between the first seed layer 12 and the first circuit pattern 30 or between the first seed layer 12 and the insulating core layer ( 40) is set relatively low compared to the binding force. Therefore, the carrier member 11 can be easily separated from the first seed layer 12, and at the same time, in the process of peeling the carrier member 11, the first seed layer 12 and the first circuit pattern 30 It is possible to prevent the bonding surface of the peeling or the bonding surface of the first seed layer 12 and the insulating core layer 40 from being peeled off.

In the seed layer removal step (S162), the first seed layer 12 exposed after the peeling of the carrier member 11 may be removed by etching or the like, as shown in (j) of FIG. At this time, since the first seed layer 12 is composed of a first conductive material different from the second conductive material constituting the first circuit pattern 30, an etching solution capable of selectively dissolving the first conductive material is used. The first seed layer 12 may be selectively removed. Therefore, it is possible to prevent the first circuit pattern 30 from being damaged in the process of removing the first seed layer 12 . Unlike conventional methods in which the first circuit pattern 30 is damaged, for example, the damage phenomenon in which the first circuit pattern 30 digs into the inside, according to the present invention, the first seed layer 12 Only the first seed layer 12 can be cleanly removed without damaging the first circuit pattern 30 formed of a different metal from the first seed layer 12 by selective etching. Accordingly, as only the first seed layer 12 is cleanly removed without damaging the bottom surface of the first circuit pattern 30 based on the cross-section of the drawing, which borders the first seed layer 12, excellent contact resistance is obtained during circuit connection. be able to provide

According to the present embodiment as described above, it is possible to manufacture a printed circuit board in which the first circuit pattern 30 is formed on one side of the insulating core layer 40 by a pattern embedded trace substrate (ETS) method. The one-circuit pattern 30 can also be formed by a semi-additive process (SAP).

Among the accompanying drawings, FIGS. 4 and 5 are cross-sectional views of each process of manufacturing a printed circuit board according to a first modified example of the first embodiment of the present invention.

The first modified example of the first embodiment of the present invention shown in FIGS. 4 and 5 includes a step of manufacturing a transfer film (S110), a step of forming a first circuit pattern (S120), and a step of forming an insulating core layer and a metal layer (S130). ), conductive part forming step (S140), second circuit pattern forming step (S150), transfer step (S160), and in the step of manufacturing the transfer film (S110), the transfer shown in (b) of FIG. There is a difference from the first embodiment of FIGS. 2 and 3 in that the film is manufactured.

That is, in the step of manufacturing the transfer film (S110), the transfer film 10 includes the carrier member 11, the lower first seed layer 12b and the upper first seed layer (as shown in FIG. 1 (b)) 12a) may include a first seed layer 12 .

Here, the lower first seed layer 12b is a layer for maintaining the adhesion and release force of the substrate layer, and the upper first seed layer 12a has a higher surface reflectance or minimizes the content of the binder, so that it is more effective than selective etching. It can be composed of layers that can be quickly removed.

In addition, by varying the hardness of the lower first seed layer 12b and the upper first seed layer 12a, it is possible to minimize deformation of the first seed layer 12 in a substrate manufacturing process such as hot press, and By varying the thickness of the first seed layer 12b and the upper first seed layer 12a, it is possible to secure characteristics such as improved release force and selective etching force.

The transfer film 10 configured as described above includes a first circuit pattern forming step (S120), an insulating core layer and a metal layer forming step (S130), a conductive part forming step (S140), and a second circuit pattern forming step (S150). After roughening, it may be removed through the carrier member peeling step (S161) and the seed layer removing step (S162) of the transfer step (S160).

In the carrier member peeling step (S161), the carrier member 11 may be peeled by applying physical force as shown in FIG. 5(i).

In addition, in the seed layer removal step (S162), as shown in FIG. 1 The seed layer 12 may be removed. Specifically, the lower first seed layer 12b made of copper may be removed using a copper etching solution, and the upper first seed layer 12a made of silver may be removed using a silver etching solution.

At this time, since the upper first seed layer 12a made of the silver material can be manufactured by using pure Ag ink, without a binder, by lowering the binder content, or by changing the type of binder resin, the upper first seed layer ( It is possible to prevent binder resin residues from remaining on the exposed circuit pattern 30 after removal of 12a).

Among the accompanying drawings, FIGS. 6 and 7 are cross-sectional views of each process of a method of manufacturing a printed circuit board according to a second modified example of the first embodiment of the present invention.

In the second modified example of the first embodiment of the present invention shown in FIGS. 6 and 7, as in the first embodiment, a step of manufacturing a transfer film (S110), a step of forming a first circuit pattern (S120), and an insulating core layer And a metal layer forming step (S130), a conductive part forming step (S140), a second circuit pattern forming step (S150), and a transfer step (S160). There is a difference from the first embodiment of FIGS. 2 and 3 in that the transfer film shown in c) is manufactured.

That is, in the step of manufacturing the transfer film (S110), the transfer film 10 is a carrier member 11 as shown in FIG. layer 12. Of course, the material of the carrier member 11 may be formed of various materials described above in addition to the copper sheet.

The transfer film 10 configured as described above includes a first circuit pattern forming step (S120), an insulating core layer and a metal layer forming step (S130), a conductive part forming step (S140), and a second circuit pattern forming step (S150). After roughening, it may be removed through the carrier member peeling step (S161) and the seed layer removing step (S162) of the transfer step (S160).

Meanwhile, in the first circuit pattern forming step (S120), after forming the photosensitive layer 20 on the first seed layer 12 made of silver (Ag), the photosensitive layer 20 is formed through exposure and development processes. When the pattern groove 21 is formed in the portion where the circuit pattern is to be formed by partially removing the first seed layer 12 made of silver (Ag), the reflection efficiency of the photosensitive layer 20 under UV curing conditions is Since it is very good, specifically, the reflection efficiency is high as a basic self-property of silver (Ag), and the surface roughness of silver (Ag) is excellent, and the regular reflection efficiency is excellent under UV curing conditions, so the straightness is improved and the pattern The groove 21 can be formed in a shape that is very smooth, uniform, and has excellent straightness.

Unlike the prior art in which it was difficult to implement a fine circuit pattern because the circuit pattern was formed in a non-uniform and non-straight way, for example, in the form of an oblique line when forming a circuit pattern in a conventional method, according to the present invention, as described above, As the second conductive material such as copper having excellent electrical conductivity can be filled in the pattern groove 21 having a very smooth, uniform and straightness shape, a very smooth, uniform and straightness fine first The circuit pattern 30 can be formed very easily.

In addition, in the carrier member peeling step (S161), the carrier member 11 may be peeled off by applying physical force as shown in (i) of FIG. It is peeled off from the first seed layer 12 together.

In the seed layer removal step (S162), the first seed layer 12 may be removed from the insulating core layer 40 using an etching solution as shown in (j) of FIG.

Next, a method for manufacturing a printed circuit board according to a third modified example of the first embodiment of the present invention will be described.

Among the accompanying drawings, FIGS. 8 and 9 are cross-sectional views of each process of manufacturing a printed circuit board according to a third modified example of the first embodiment of the present invention.

In the method for manufacturing a printed circuit board according to the third modified example of the first embodiment of the present invention, as shown in FIGS. 8 and 9, manufacturing a transfer film (S110), bonding step (S111), and a first circuit pattern It includes a forming step (S120), an insulating core layer and a metal layer forming step (S130), a conducting part forming step (S140), a second circuit pattern forming step (S150), and a transfer step (S160). Between the step (S110) and the first circuit pattern forming step (S120), a bonding step (S111) of bonding the carrier member 11 of the pair of transfer films 10 using the bonding layer 70 is performed, It is different from the first embodiment of FIGS. 2 and 3 in providing a film having the first seed layer 12 formed on both sides.

Specifically, in the bonding step (S111), the bonding layer 70 is placed between the carrier members 11 of the pair of transfer films 10 as shown in (b) of FIG. A double-sided film having one seed layer 12 formed thereon may be provided.

Here, the bonding layer 70 may be a prepreg sheet impregnated with a thermosetting resin in glass epoxy and provided in a semi-cured state, a bonding sheet, or a hot-melt thermosetting resin. For complete bonding, a hot press process that simultaneously provides heat and pressure in the thickness direction of the substrate may be used.

Meanwhile, since the remaining steps except for the bonding step (S111) are the same as those of the first embodiment, detailed descriptions of the same steps will be omitted.

According to the third modified example, after the bonding step (S111), the first circuit pattern forming step (S120), the insulating core layer and the metal layer forming step (S130), the conducting part forming step (S140), and the second circuit pattern forming step. (S150) is performed individually or simultaneously on both sides of the film having the first seed layer 12 formed on both sides, so that printed circuit boards are formed on both sides of the film having the first seed layer 12 formed on both sides.

That is, since two printed circuit boards can be manufactured through one process, production efficiency can be improved.

Next, a method for manufacturing a printed circuit board according to a second embodiment of the present invention will be described.

Among the accompanying drawings, FIGS. 10 and 11 are cross-sectional views of each process of a method for manufacturing a printed circuit board according to a second embodiment of the present invention.

10 to 11, the method for manufacturing a printed circuit board according to the second embodiment of the present invention includes manufacturing a carrier substrate (S200), forming a first circuit pattern (S230), insulating core layer and A metal layer forming step (S240), a conductive part forming step (S250), a second circuit pattern forming step (S260), and a peeling step (S270) are included.

The step of manufacturing the carrier substrate (S200) includes a step of manufacturing a transfer film (S210), a bonding step (S211), and a transfer step (S220).

In the step of manufacturing the transfer film (S210), as shown in FIG. 10 (a), a first seed layer 12 made of a silver (Ag) material is formed on the carrier member 11 having excellent surface smoothness, and the A transfer film 10 is manufactured by forming a second seed layer 13 having a thickness of 1 to 5 μm made of copper (Cu) on the first seed layer 12 . As such, in this embodiment, as shown in (d) of FIG. 1, the carrier member 11 made of a polyimide (PI) film or a metal sheet such as a copper sheet, the first seed layer 12, and the second seed A transfer film 10 composed of a layer 13 may be used. In addition, as shown in (e) of FIG. 1, a carrier member 11 made of a polyimide (PI) film or a metal sheet such as a copper sheet, an adhesion control layer 14, a first seed layer 12, and a second seed layer A transfer film 10 composed of (13) may also be used.

The transfer film 10 is configured in a form in which a single first seed layer 12 is laminated on a carrier member 11 as shown in (a) and (c) of FIG. 1, or (d) and (e) of FIG. ), the first seed layer 12 and the second seed layer 13 may be stacked on the carrier member 11.

The first seed layer 12 is coated with a first conductive material made of silver (Ag) paste prepared by dispersing silver (Ag) nanoparticles in a thermosetting resin, screen printing, sputtering, chemical vapor deposition, electroplating, electroless It can be formed on the carrier member 11 by a plating method or the like.

The second seed layer 13 may be formed on the first seed layer 12 through a plating process. At this time, since the first seed layer 12 serves as an electrode, the second seed layer 13 made of copper may be electroplated on the first seed layer 12 . Meanwhile, in this embodiment, it has been described that the second seed layer 13 is formed through an electroplating process, but it may be possible to form the second seed layer 13 through an electroless plating process, sputtering, coating, or the like. Here, unlike forming a layer by directly plating copper on a general substrate, the smoothness is not good, according to the present invention, on the first seed layer 12 made of silver (Ag) material, for example, copper plating When the second seed layer 13 is formed, it is possible to easily form the second seed layer 13 having good smoothness while preventing the aforementioned issues from occurring.

In the bonding step (S211), the second seed layer 13 of the transfer film 10 is bonded to the bonding layer 70 as shown in FIG. 10(b).

Specifically, a transfer film 10 having a first seed layer 12 and a second seed layer 13 formed on one surface of the carrier member 11 is prepared, and the bonding layer 70 is applied to the transfer film 10. The second seed layer 13 of the transfer film 10 may be bonded to the bonding layer 70 by arranging to face the second seed layer 13 and then bonding. Here, the bonding layer 70 may be a prepreg sheet impregnated with a thermosetting resin in glass epoxy and provided in a semi-cured state, a bonding sheet, or a hot-melt thermosetting resin. For complete bonding, a hot press process that simultaneously provides heat and pressure in the thickness direction of the substrate may be used. On the other hand, by further disposing an adhesion control layer providing a release force between the bonding layer 70 and the second seed layer 13, the bonding layer 70 is the second seed layer in the peeling step (S270). It would be desirable to make it easily peelable from (13). Of course, an adhesion control layer may or may not be further formed between the bonding layer 70 and the second seed layer 13 .

In the transfer step (S220), the carrier member 11 of the transfer film 10 is removed to form a first seed layer 12 and a second seed layer 12 on one surface of the bonding layer 70, as shown in FIG. Each seed layer 13 is transferred.

At this time, the bonding force between the carrier member 11 and the first seed layer 12 is the first seed layer 12 and the second seed layer 13 or the second seed layer 13 and the bonding layer 70 It is set relatively low compared to the binding force of Therefore, the carrier member 11 can be easily separated from the first seed layer 12, and at the same time, in the process of peeling the carrier member 11 from the first seed layer 12, the first seed layer 12 It is possible to prevent the bonding surface of the second seed layer 13 from being peeled off or the bonding surface of the second seed layer 13 and the bonding layer 70 from being peeled off.

In this way, in the step of manufacturing the carrier substrate (S200), a carrier substrate in which the second seed layer 13 and the first seed layer 12 are sequentially stacked on one surface of the bonding layer 70 may be manufactured.

On the other hand, in the transfer film manufacturing step (S210), the first seed layer 12 made of a silver (Ag) material is formed on both sides of the carrier member 11 having excellent surface smoothness, respectively, and the first seed layer 12 It is possible to manufacture a double-sided transfer film 10 as shown in (a) of FIG.

In this embodiment, it has been described as an example that the transfer film 10 shown in FIG. 1 (a) is applied, but the first seed layer 12 has different etching rates as shown in FIG. 1 (b). It may be formed in two or more layers, and the upper first seed layer 12a may be implemented as a layer having a faster etching rate and lower resistance than the lower first seed layer 12b.

Subsequently, in the bonding step (S211), after disposing the bonding layer 70 between the plurality of double-sided transfer films 10, respectively, they are bonded by providing heat and pressure in the thickness direction, and in the transfer step (S220), the transfer The carrier member 11 of the film 10 is removed, and the first seed layer 12 and the second seed layer 13 are transferred to both surfaces of the bonding layer 70, respectively.

As described above, if the bonding layer 70 is placed between the plurality of double-sided transfer films 10, respectively, bonded by applying heat and pressure in the thickness direction of the substrate, and then the carrier member 11 is removed, in one step A plurality of carrier substrates in which the first seed layer 12 and the second seed layer 13 are laminated on both sides of the bonding layer 70 may be manufactured.

The first circuit pattern forming step (S230) includes forming the photosensitive layer 20 on the first seed layer 12 (S231) and forming the pattern groove 21 in the photosensitive layer 20. (S232), removing the first seed layer exposed through the pattern grooves (21) (S233), filling the pattern grooves (21) with a conductive material (S234), and the photoresist. A step of removing the layer (S235) and a step of removing all of the remaining first seed layer exposed after the photoresist layer is removed (S236).

Here, the step of forming the photosensitive layer (S231), the step of forming the pattern groove (S232), the step of filling the conductive material (S234), and the step of removing the photosensitive layer (S235) are the steps of the first embodiment. Forming a photoresist layer on the seed layer (S121, see FIG. 2(b)), forming pattern grooves on the photoresist layer (S122, see FIG. 2(c)), and conducting conductivity in the pattern grooves Since the step of filling the material (S123, see FIG. 2(d)) and the step of removing the photosensitive layer (S124, see FIG. 2(e)) are performed in the same manner, a detailed description thereof will be omitted. .

In the step of removing the first seed layer exposed through the pattern groove (S233), the first seed layer 12 exposed through the pattern groove 21 formed in the photosensitive layer 20 as shown in FIG. 10(f). ) is removed. At this time, since the first conductive material constituting the first seed layer 12 is made of a different material from the second conductive material constituting the second seed layer 13, the first conductive material can be selectively dissolved. The first seed layer 12 may be selectively removed using an etching solution. Therefore, it is possible to prevent the second seed layer 13 from being damaged in the process of removing the first seed layer 12 .

In addition, in step S236 of removing all remaining first seed layers exposed after removing the photoresist layer, the first seed layer 12 exposed to the outside is removed as shown in (i) of FIG. 10 . Even at this time, the first seed layer 12 may be removed using an etching solution capable of selectively dissolving the first conductive material constituting the first seed layer 12 . Therefore, in the process of removing the first seed layer 12, the first circuit pattern 30 and the second seed layer 13 made of copper can be prevented from being damaged.

In particular, in this embodiment, the photosensitive layer 20 is formed on the first seed layer 12 made of silver (Ag), and pattern grooves 21 are formed through exposure and development processes. At this time, since the first seed layer 12 made of silver (Ag) has very good reflection efficiency under UV curing conditions of the photosensitive layer 20, specifically, the reflection efficiency is a basic characteristic of silver (Ag). As the surface roughness of silver (Ag) is high and the surface roughness of silver (Ag) is excellent, the straightness is improved because the specular reflection efficiency is excellent under UV curing conditions, so that the pattern grooves 21 are very smooth and uniform, and can be formed in a form with very excellent straightness. have.

On the other hand, the insulating core layer and metal layer forming step (S240), conducting part forming step (S250), and second circuit pattern forming step (S260) are the insulating core layer and metal layer forming step (S130 of FIG. 3 (S130) of the first embodiment). f)), the conducting part forming step (S140, see FIG. 3 (g)), and the second circuit pattern forming step (S150, see FIG. 3 (h)). is omitted.

The peeling step (S270) may include a bonding layer removing step (S271) and a second seed layer removing step (S272).

In the bonding layer removing step (S271), the second seed layer 13 and the first circuit pattern 30 formed on the bonding layer 70 are transferred to the insulating core layer 40 as shown in FIG. 11(m). To do this, the bonding layer 70 is separated from the second seed layer 13.

Next, in the second seed layer removing step (S272), the second seed layer 13 is removed from the surface of the insulating core layer 40 on which the first circuit pattern 30 is formed, as shown in FIG. 11(n). . The second seed layer 13 may be removed through a process such as soft etching.

According to the present embodiment as described above, it is possible to manufacture a printed circuit board in which the first circuit pattern 30 is formed on one side of the insulating core layer 40 by a pattern embedded trace substrate (ETS) method. The one-circuit pattern 30 can also be formed by a semi-additive process (SAP).

Among the accompanying drawings, FIGS. 12 and 13 are cross-sectional views of each process of a method of manufacturing a printed circuit board according to a first modified example of the second embodiment of the present invention.

The first modified example of the second embodiment of the present invention is made of the same steps as the second embodiment of FIGS. 10 and 11, and in the bonding step (S211), a pair of transfer films 10 as shown in FIG. ) by attaching the second seed layer 13 to both sides of the bonding layer 70, respectively, and removing the carrier member 11 of the transfer film 10 as shown in (c) of FIG. 12 in the transfer step (S220). , It has a difference from the second embodiment of FIGS. 10 and 11 in that the first seed layer 12 and the second seed layer 13 are laminated on both sides of the bonding layer 70, respectively.

Meanwhile, since the remaining steps except for the bonding step (S211) and the transfer step (S220) are the same as those of the second embodiment, a detailed description of the same steps will be omitted.

According to the first modified example of the second embodiment, after the transfer step (S220), the first circuit pattern forming step (S230), the insulating core layer and metal layer forming step (S240), the conducting part forming step (S250), the second circuit By performing the pattern forming step (S260) separately or simultaneously on both sides of the bonding layer 70 and then performing the peeling step (S270), a pair of printed circuit boards can be manufactured through one process, thereby increasing production efficiency. can improve

Among the accompanying drawings, FIG. 14 is a cross-sectional view of each process of a method of manufacturing a printed circuit board according to a second modified example of the second embodiment of the present invention.

A second modified example of the second embodiment of the present invention is a step of manufacturing a transfer film (S210), a bonding step (S211), a transfer step (S220), a first circuit pattern forming step (S230), an insulating core layer and additional transfer. It includes a film bonding step (S241), a carrier member peeling step (S242), a metal layer forming step (S243), a conducting part forming step (S250), a second circuit pattern forming step (S260), and a peeling step (S270).

Here, the step of manufacturing the transfer film (S210), the bonding step (S211), the transfer step (S220), and the first circuit pattern forming step (S230) are the same as the first modified example of the second embodiment shown in FIG. Since it is made to do so, a detailed description of the same step is omitted.

In the step of bonding the insulating core layer and the additional transfer film (S241), the insulating core layer 40 and the additional transfer film 10 are laminated on the first circuit pattern 30 as shown in FIG. 14(j) and then bonded. do.

For the insulating core layer 40, a prepreg sheet impregnated with a thermosetting resin in glass epoxy and provided in a semi-cured state, a bonding sheet, or a hot-melt thermosetting resin may be used. .

As the additional transfer film 10, the transfer film 10 in which the carrier member 11, the first seed layer 12, and the second seed layer 13 are sequentially stacked may be applied as shown in (d) of FIG. In addition, the second seed layer 13 of the additional transfer film 10 is stacked so as to be in close contact with the insulating core layer 40.

As described above, after the additional transfer film 10 is laminated on the insulating core layer 40, heat and pressure may be simultaneously applied in the thickness direction of the substrate through a hot press process for complete bonding.

In the carrier member separation step (S242), the carrier member 11 is separated from the first seed layer 12 as shown in FIG. 14(k). At this time, the bonding strength between the carrier member 11 and the first seed layer 12 is the bonding strength between the first seed layer 12 and the second seed layer 13 or the bonding strength between the second seed layer 12 and the insulating core layer ( 40) is preferably set relatively low compared to the binding force. When the carrier member 11 is separated from the first seed layer 12, the first seed layer 12 and the second seed layer 13 are transferred to the insulating core layer 40 side.

In the metal layer forming step (S243), the second seed layer 13 is stacked on the insulating core layer 40 as shown in FIG. In the state in which (12) is stacked, a metal layer 90 is formed on the first seed layer 12. The metal layer 90 is for forming the second circuit pattern 51 and may be made of a copper material having excellent electrical conductivity. Here, the metal layer 90 is formed on the first seed layer 12, but after the separation of the carrier member 11, the second seed layer 13 is laminated on the insulating core layer 40, and the second seed layer With the first seed layer 12 stacked on (13), only the first seed layer 12 is etched away using an etching solution capable of etching only the first seed layer 12, thereby forming a second seed layer 12. A metal layer 90 may be formed on the layer 13 .

As such, in FIG. 14, the transfer film including the carrier member 11, the first seed layer 12, and the second seed layer 13 of FIG. 1 (d) was used, but in FIG. It is possible to use an additional transfer film including the carrier member 11 and the first seed layer 12 shown in ), in which case the metal layer 90 is transferred to the insulating core layer 40, the first seed layer ( 12) is formed on Of course, in the bonding step (S241) of the insulating core layer and the additional transfer film of FIG. 14, the transfer film shown in (b), (c) and (e) of FIG. 1 may be used.

Meanwhile, in the conducting part forming step (S250), the second circuit pattern forming step (S260), and the peeling step (S270), the second circuit pattern 51 includes the second seed layer 13 and the first seed layer 12 ) and the metal layer 90, the process of forming the conductive part 60 and the second circuit pattern 51 and peeling the transfer film 10 is shown in FIGS. Since it is performed in the same way as the first modified example of the second embodiment shown in FIG. 14, a detailed description of the same steps will be omitted.

Next, a method for manufacturing a printed circuit board according to a third embodiment of the present invention will be described.

Among the accompanying drawings, FIGS. 15 and 16 are cross-sectional views of each process of a method for manufacturing a printed circuit board according to a third embodiment of the present invention.

As shown in FIGS. 15 and 16, the method for manufacturing a printed circuit board according to the third embodiment of the present invention includes preparing a core board (S300), punching step (S330), circuit pattern and conductive part forming step ( S340), removing the first seed layer (S350), and removing the second seed layer (S360).

The step of preparing the core substrate (S300) includes a step of manufacturing a transfer film (S310), a bonding step (S311), and a transfer step (S320), and through these processes, both sides of the insulating core layer 40 A core substrate in which the second seed layer 13 and the first seed layer 12 are sequentially stacked may be manufactured.

Here, since the step of manufacturing the transfer film (S310) is the same as the step of manufacturing the transfer film of the second embodiment (S210, see (a) in FIG. 10), a detailed description thereof will be omitted.

In the bonding step (S311), the second seed layer 13 of the pair of transfer films 10 may be bonded to both sides of the insulating core layer 40, respectively, as shown in FIG. 15(b).

In the transfer step (S320), the first seed layer 12 and the second seed layer 12 are formed on both sides of the insulating core layer 40 by removing the carrier member 11 of the transfer film 10 as shown in FIG. 15(c). It is different from the second embodiment of FIGS. 10 and 11 in that the core substrate CS in which the seed layer 13 is stacked is provided.

On the other hand, in the bonding step (S311) and the transfer step (S320), the first seed layer 12 and the second seed layer 13 are transferred to both sides of the insulating core layer 40, respectively, as shown in FIGS. 10 and 11. There is only a difference from the second embodiment of, the bonding method and the transfer method are the bonding step (S211, see Fig. 10 (b)) and the transfer step (S220, see Fig. 10 (c)) of the second embodiment. Since it is the same as, a detailed description thereof is omitted.

In the drilling step (S330), via holes passing through the insulating core layer 40 and the first seed layer 12 and the second seed layer 13 laminated on both sides thereof, respectively, as shown in (d) of FIG. 15 ( Via Hole, V) is formed. These via holes (V) are formed to implement interlayer connection, and may be formed through a mechanical drilling process or a drilling process using a laser.

In the circuit pattern and conductive part forming step (S340), a conductive film (C) is formed on the outer surface of the first seed layer 12 and the inner wall surface of the via hole (V) as shown in (e) to (i) of FIG. The forming step (S341), the step of forming the photosensitive layer 20 on the first seed layer 12 (S342), and partially removing the photosensitive layer 20 to form the via hole (V) Forming pattern grooves 21 in the formed portion and the portion where the first circuit pattern 30 and the second circuit pattern 51 are to be formed (S343), and the pattern groove 21 and the via hole (V) are conductive A conductive material filling step (S344) of forming the first circuit pattern 30 and the second circuit pattern 51 by filling the material and at the same time forming the conducting part 60 in the via hole (V) and removing the photosensitive layer It includes a step (S345) of doing.

In the step of forming the conductive film (S341), a conductive film (C) is formed on the outer surface of the first seed layer 12 and the inner wall surface of the via hole through an electroless copper plating process, as shown in FIG. 16(e). . Here, although the conductive film (C) is formed through electroless plating, it may be formed through electrolytic plating, or it may be formed by printing a metal paste as another method. As an example, it may be formed by printing silver (Ag) paste on the inner wall of the via hole (V).

In the step of forming the photosensitive layer (S342), the photosensitive layer 20 is formed on the conductive film (C) as shown in FIG. 16(f). In the step of forming the photosensitive layer (S342), through a process widely known in the art, such as a method of laminating a general photosensitive dry film and a method of applying and forming a photosensitive etching resist ink. A photosensitive layer may be formed.

In the step of forming the pattern groove (S343), the photosensitive layer 20 is partially removed through exposure and development processes as shown in FIG. 51) to form a pattern groove 21 in the portion to be formed.

In the conductive material filling step (S344), as shown in FIG. 16 (h), a conductive material such as copper having excellent electrical conductivity is applied to the outer surface of the conductive film (C) exposed through the pattern grooves 21 through an electroplating process. plating to form the first circuit pattern 30 and the second circuit pattern 51, and at the same time plating the inner wall surface of the via hole (V) to electrically connect the first circuit pattern 30 and the second circuit pattern 51. To form a conductive portion 60 connected to. Here, the conductive material filling step (S344) has been described as an example of forming the first circuit pattern 30, the second circuit pattern 51, and the conducting part 60 through an electroplating process, but electroless plating can be formed through Alternatively, the first and second circuit patterns 30 and 51 and the conducting portion 60 may be formed by printing a metal paste.

In the photosensitive layer removing step (S345), the photosensitive layer 20 formed on the conductive film (C) is peeled and removed as shown in FIG. 16(i).

In the step of removing the first seed layer (S350), the portion where the first circuit pattern 30 and the second circuit pattern 51 are not formed after the photoresist layer 20 is peeled off, as shown in FIG. 16(j). The exposed first seed layer 12 is removed through the. Meanwhile, prior to removing the first seed layer 12, a conductive film made of copper formed on the surface of the first seed layer 12 through a process such as flash etching or soft etching. A process of removing C) may be additionally performed. Here, the conductive film (C) and the first seed layer 12 may be etched sequentially, respectively, or may be etched together in one step.

Meanwhile, since the first seed layer 12 is composed of a first conductive material different from the second conductive material constituting the first circuit pattern 30 and the second circuit pattern 51, the first conductive material is selectively used. The first seed layer 12 may be removed using an etching solution capable of dissolving it. In this case, it is possible to prevent the first circuit pattern 30 and the second circuit pattern 51 from being damaged in the process of removing the first seed layer 12 .

In the removing of the second seed layer (S360), the second seed layer 13 exposed after the removal of the first seed layer 12 is removed as shown in (k) of FIG. 16 . To remove the second seed layer 13, a method such as flash etching or soft etching may be used.

According to the present embodiment as described above, the first circuit pattern 30 and the second circuit pattern 51 are formed on both surfaces, and the first circuit pattern 30 and the second circuit pattern 51 are conductive parts 80 ) It is possible to manufacture a double-sided printed circuit board 100 electrically connected through.

In addition, as shown in (k) of FIG. 16, the printed circuit board 100 on which the first circuit pattern 30 and the second circuit pattern 51 are formed on both sides can be used as a core circuit board of a multilayer printed circuit board, and build Through the step of forming the up-layer, a single-layer or multi-layer build-up layer may be formed on both sides of the core circuit board.

On the other hand, in this embodiment, the printed circuit board is printed using the transfer film 10 composed of the carrier member 11, the first seed layer 12, and the second seed layer 13 shown in (d) of FIG. Although described as an example of manufacturing, the transfer film 10 composed of the carrier member 11 and the first seed layer 12 shown in FIG. 1 (a) or the transfer film 10 shown in FIG. 1 (e) It is also possible to manufacture a printed circuit board using the transfer film 10 composed of the carrier member 11, the adhesion control layer 14, the first seed layer 12 and the second seed layer 13. In the case of manufacturing a printed circuit board using the transfer film 10 shown in FIG. 1 (a), since the second seed layer 13 does not exist in the transfer film 10, the second seed layer The removing step (S360) may be omitted.

In addition, the first seed layer 12 may be formed of two or more layers having different etching rates, and the upper first seed layer 12a has a faster etching rate than the lower first seed layer 12b and a lower etching rate. It is preferably implemented as a layer having resistance characteristics.

Among the accompanying drawings, FIGS. 17 to 18 are cross-sectional views of each process of forming a build-up layer in a method for manufacturing a printed circuit board according to a third embodiment of the present invention.

As shown in FIGS. 17 and 18 , the forming of the build-up layer is performed by forming an insulating layer 81 and an additional seed layer 82 on the first circuit pattern 30 and the second circuit pattern 51 . Forming step (S371), and the via hole (V) passing through the additional seed layer 82 and the insulating layer 81 to expose a part of the first circuit pattern 30 and the second circuit pattern 51 Forming a step (S372), forming a conductive film 83 on the outer surface of the additional seed layer 82 and the inner wall surface of the via hole (V) (S373), on the conductive film 83 Forming the photosensitive layer 84 (S374), forming pattern grooves 84a in the photosensitive layer 84 (S375), and applying a conductive material to the portion exposed through the pattern grooves 84a. Filling the conductive material to form the circuit pattern 85 (S376), removing the photosensitive layer 84 (S377), and additional seed exposed through the portion where the circuit pattern 85 is not formed and removing the layer 82 (S378).

In the step of forming the insulating layer and the additional seed layer (S371), as shown in FIG. 17(a), the insulating layer 81 is formed on the first circuit pattern 30 and the second circuit pattern 51, Additional seed layers 82 are sequentially stacked and bonded.

The insulating layer 81 may be a prepreg sheet impregnated with a thermosetting resin in glass epoxy and provided in a semi-cured state, a bonding sheet, or a hot-melt thermosetting resin. In addition, after the insulating layer 81 and the additional seed layer 82 are laminated, heat and pressure may be simultaneously applied in the thickness direction of the substrate through a hot press process for complete bonding.

The additional seed layer 82 may be formed of a copper (Cu) thin film having a thickness of 1 to 5 μm.

In the step of forming the via hole (S372), a via hole V penetrating the additional seed layer 82 and the insulating layer 81 is formed as shown in FIG. 17(b). After forming the via hole (V), parts of the first circuit pattern 30 and the second circuit pattern 51 may be exposed through the via hole (V).

In the step of forming the conductive film (S373), as shown in (c) of FIG. 17, a conductive film 83 is formed on the outer surface of the additional seed layer 82 and the inner wall surface of the via hole V through a plating process. form Here, it may be preferable to form the conductive film 83 through an electroplating process or an electroless plating process, but it may be formed by performing screen printing or inkjetting alone or by using two or more methods selected from these. have.

In the step of forming the photosensitive layer (S374), a photosensitive layer 84 is formed on the conductive film 83 as shown in FIG. 17(d). The photoresist layer 84 is a preliminary step for forming a circuit pattern on the conductive film 83 . In the step of forming the photosensitive layer (S374), through a process widely known in the art, such as a method of laminating a general photosensitive dry film and a method of forming by applying a photosensitive etching resist ink. A photosensitive layer may be formed.

In the step of forming the pattern groove (S375), the photosensitive layer 84 is partially removed through exposure and development processes, as shown in FIG. form

In the conductive material filling step (S376), as shown in FIG. 18(f), a conductive material such as copper having excellent electrical conductivity is filled in the pattern grooves 84a through an electroplating process to form a circuit pattern 85. At the same time, the circuit pattern 85 is electrically connected to the first circuit pattern 30 or the second circuit pattern 51 exposed through the via hole V. As another method for filling the conductive material, a method of printing a metal paste may be used. Alternatively, coating, screen printing, electroplating, electroless plating, and inkjetting may be performed alone or two or more methods may be selected from among them.

In step S377 of removing the photoresist layer, the photoresist layer 84 formed on the conductive film 83 is peeled off and removed, as shown in FIG. 18(g).

In the step of removing the additional seed layer (S378), as shown in FIG. and the additional seed layer 82 are removed. Since the conductive film 83 and the additional seed layer 82 are made of the same copper material, the conductive film 83 and the additional seed layer ( 82) can be removed at the same time. Of course, it is also possible to remove each one sequentially.

Among the accompanying drawings, FIGS. 19 to 20 are cross-sectional views for each process of a method for manufacturing a printed circuit board according to a first modified example of the third embodiment of the present invention.

In the first modified example of the third embodiment of the present invention, as in the above-described third embodiment, preparing a core substrate (S300), drilling step (S330), forming circuit patterns and conductive parts (S340), It includes removing the seed layer (S350) and removing the second seed layer (S360), and in the step of manufacturing the transfer film (S310) of the preparing the core substrate (S300) There is a difference from the third embodiment of FIGS. 15 and 16 in that the transfer film 10 shown in e) is manufactured.

That is, in the step of manufacturing the transfer film (S310), the transfer film 10 includes the carrier member 11, the adhesion control layer 14, the first seed layer 12, and the first seed layer 12 as shown in (a) of FIG. The second seed layer 13 may be sequentially stacked. That is, in this embodiment, it can be manufactured and used in the form of a transfer film shown in (e) of FIG.

The transfer film 10 configured as described above may be bonded to both sides of the insulating core layer 40 through a bonding step (S311), respectively, as shown in (b) of FIG. 19, and the carrier member 11 of the transfer film 10 ) and the adhesion control layer 14 may be removed from the first seed layer 12 through the transfer step (S320) as shown in (c) of FIG. Specifically, in the transfer step (S320), the carrier member 11 may be separated from the first seed layer 12 by applying a physical force to the carrier member 11, and in this process, the adhesion control layer 14 is the carrier member It can be peeled off from the first seed layer 12 together with (11).

In this way, in the step of preparing the core substrate (S300), the second seed layer on both sides of the insulating core layer 40 through the step of manufacturing a transfer film (S310), the bonding step (S311), and the transfer step (S320). A core substrate CS in which (13) and the first seed layer 12 are sequentially stacked may be provided.

On the other hand, after the step of preparing the core substrate (S300), the drilling step (S330), the circuit pattern and conducting part formation step (S340), the step of removing the first seed layer (S350), and the second seed layer Since the removing step (S360) is the same as the third embodiment of FIGS. 15 to 16 described above, a detailed description thereof will be omitted.

Next, a method for manufacturing a printed circuit board according to a fourth embodiment of the present invention will be described.

Among the accompanying drawings, FIGS. 21 and 22 are cross-sectional views of each process of a method for manufacturing a printed circuit board according to a fourth embodiment of the present invention.

As shown in FIGS. 21 and 22, the method for manufacturing a printed circuit board according to the fourth embodiment of the present invention includes preparing a core substrate (S400), removing a first seed layer (S450), and punching a step. (S430), forming a circuit pattern and conducting part (S440), and removing the second seed layer (S460), and preparing the core substrate (S400) is a step of manufacturing a transfer film (S410). ) and a bonding step (S411) and a transfer step (S420).

15 described above in that the method of manufacturing a printed circuit board according to the fourth embodiment of the present invention performs a step (S450) of removing the first seed layer after the transfer step (S420) as shown in FIG. 21. to the third embodiment of FIG. 16.

That is, in the above-described third embodiment, the first circuit pattern 30 and the second circuit pattern 51 are formed through the circuit pattern and conductive part forming step (S340, see (e) to (i) of FIG. 16). Then, unlike removing the first seed layer 12 exposed to the outside in the first seed layer removal step (S350, see (j) of FIG. 16), in the fourth embodiment, after the transfer step (S420) By performing the step of removing the first seed layer (S450), there is a difference in that the entire first seed layer 12 is removed prior to forming the first circuit pattern 30 and the second circuit pattern 51. Accordingly, unlike the third embodiment in which a part of the first seed layer 12 is embedded inside the circuit in FIG. 16 (k), in the fourth embodiment, in FIG. 22 (j), the first seed layer ( 12) is not built into the circuit. On the other hand, since the entire first seed layer 12 is removed prior to forming the first circuit pattern 30 and the second circuit pattern 51, the first seed layer 12 made of, for example, silver (Ag) As it can be recovered and recycled, manufacturing costs can be reduced and environmental issues can be prevented.

In the step of preparing the core substrate (S400), the insulating core layer through the step of manufacturing a transfer film (S410), bonding step (S411), and transfer step (S420) as shown in (a) to (c) of FIG. A core substrate (CS) in which the second seed layer 13 and the first seed layer 12 are sequentially stacked on both surfaces of (40) can be manufactured.

Then, in the first seed layer removal step (S450), the first seed layer 12 exposed after the peeling of the carrier member 11 may be removed by a method such as etching, as shown in FIG. 21(d). At this time, since the first seed layer 12 is composed of a first conductive material different from that of the second seed layer 13, the first seed layer 12 is formed by using an etching solution capable of selectively dissolving the first conductive material. can be removed. Therefore, it is possible to prevent the second seed layer 13 from being damaged in the process of removing the first seed layer 12 .

In this way, through the step of manufacturing the transfer film (S410), the bonding step (S411), the transfer step (S420), and the first seed layer removal step (S450), for example, the copper second seed layer 13 is removed from the carrier member 11 ), but formed on the first seed layer 12 of silver (Ag) having good smoothness, for example, and instead of the existing pickling and soft etching, the first seed layer of a first conductive material different from the second seed layer 13 ( 12) is selectively etched and removed, the excellent smoothness of the second seed layer 13 is secured, and one surface is covered and protected by the first seed layer 12 and transferred to the insulating core layer 40. As the second seed layer 13 is contaminated and oxidized in the conventional method, as the subsequent process of forming the circuit proceeds, very smooth, uniform, and fine first and second circuits with excellent straightness The patterns 30 and 51 can be easily implemented. That is, it is possible to implement a fine circuit pattern very easily. In addition, as described above, since the smoothness of the second copper seed layer 13 is good, for example, high resolution can be implemented by regular reflection of copper.

Meanwhile, the punching step (S430) and circuit pattern and conductive part forming step (S440) of the fourth embodiment are the punching step (S330, see FIG. 15(d)), circuit pattern and conductive part forming step (S340) of the third embodiment. , See (e) to (i) of FIG. 16), the detailed description of the same steps is omitted.

In the step of removing the second seed layer ( S460 ), the second seed layer 13 exposed after the removal of the photoresist layer 20 is removed as shown in (j) of FIG. 22 . To remove the second seed layer 13, a method such as flash etching or soft etching may be used. Meanwhile, since the copper foil layer (C) formed on the second seed layer 13 is made of the same copper material as the second seed layer 13, in the process of removing the second seed layer 13, the second seed layer (13) can be removed. As such, in the present embodiment, since the first seed layer 12 is removed in the first seed layer removal step (S450) and then the perforation step (S430) is performed, the second seed layer is removed (S460). In this case, the first seed layer 12 does not exist. That is, since the second seed layer 13 and the copper foil layer (C) are made of the same material, they can be removed at once through one etching process, thereby reducing manufacturing man-hours and improving manufacturing cost and productivity.

On the other hand, in this embodiment, the printed circuit board is printed using the transfer film 10 composed of the carrier member 11, the first seed layer 12, and the second seed layer 13 shown in (d) of FIG. It has been described as an example of manufacturing, but the transfer consisting of the carrier member 11, the adhesion control layer 14, the first seed layer 12 and the second seed layer 13 shown in (e) of FIG. It is also possible to manufacture a printed circuit board using the film 10 .

Among the accompanying drawings, FIGS. 23 to 24 are cross-sectional views of each process of forming a build-up layer in a method for manufacturing a printed circuit board according to a fourth embodiment of the present invention.

As shown in FIGS. 23 to 24, the double-sided printed circuit board 100 manufactured in the fourth embodiment can be used as a core circuit board, and the steps of forming the build-up layer described in the third embodiment (FIG. 17 and 18), a single layer or multi-layered build-up layer may be formed on the first circuit pattern 30 and the second circuit pattern 51 of the double-sided printed circuit board 100. Since the process of forming the buildup layer (S461 to S468) is the same as the step of forming the buildup layer in the third embodiment, a detailed description thereof will be omitted.

Among the accompanying drawings, FIG. 25 is a cross-sectional view for each process of manufacturing a core substrate in a method for manufacturing a printed circuit board according to third and fourth embodiments of the present invention.

The core substrate (CS, see FIG. 15 (c)) of the third embodiment, the core substrate (CS, see FIG. 19 (c)) of the first modified example of the third embodiment, and the core substrate (CS, see FIG. 19 (c)) of the fourth embodiment. Referring to (c) of FIG. 21), as shown in FIG. 25, it may be manufactured through a step of manufacturing a core substrate.

The step of manufacturing the core substrate includes a step of manufacturing a transfer film (S11), a bonding step (S12), and a transfer step (S13).

Specifically, in the step of manufacturing the transfer film (S11), as shown in FIG. 25 (a), the first seed layer 12 made of silver (Ag) material is applied to both sides of the carrier member 11 having excellent surface smoothness The double-sided transfer film 10 may be manufactured by forming a second seed layer 13 having a thickness of 1 to 5 μm made of copper (Cu) on the first seed layer 12, respectively.

The step of manufacturing such a transfer film (S11) is a step of manufacturing the transfer film of the third embodiment in that the first seed layer 12 and the second seed layer 13 are formed on both sides of the carrier member 11, respectively. Although different from (S310, see (a) of FIG. 15), the process of sequentially forming the first seed layer 12 and the second seed layer 13 on the surface of the carrier member 11 is similar to that of the third embodiment. Since they are the same, a detailed description thereof will be omitted.

Subsequently, in the bonding step (S12), as shown in (b) of FIG. 25, after disposing the insulating core layer 40 between the plurality of double-sided transfer films 10, respectively, they are bonded by applying heat and pressure in the thickness direction, , In the transfer step (S13), the carrier member 11 of the transfer film 10 is removed as shown in (c) of FIG. Each layer 13 is transferred.

Here, the insulating core layer 40 is made of the same material as the insulating core layer 40 of the third embodiment, and the bonding step (S12) and the transfer step (S13) are the bonding step (S311, FIG. 15 (b)) and the transfer step (S320, see (c) of FIG. 15) are performed in the same manner, so a detailed description thereof is omitted.

As described above, when the insulating core layer 40 is placed between the plurality of double-sided transfer films 10, respectively, bonded by applying heat and pressure in the thickness direction of the substrate, and then the carrier member 11 is removed, the insulating core layer A core substrate CS in which the first seed layer 12 and the second seed layer 13 are stacked on both sides of the surface 40 may be provided.

For example, as shown in FIG. 25 (b), the insulating core layer 40 is bonded between four double-sided transfer films 10, respectively, and then the carrier member 11 is removed as shown in FIG. 25 (c). If so, three core substrates (CS) can be manufactured.

That is, in the case of manufacturing three core substrates (CS) using the single-sided transfer film 10, six single-sided transfer films are required, and only one core substrate (CS) can be manufactured through each manufacturing process. However, in the case of using the double-sided transfer film 10 as described above, three core substrates CS can be simultaneously manufactured with four double-sided transfer films 10.

On the other hand, in this embodiment, it has been described as an example of manufacturing three core substrates (CS) using four double-sided transfer films 10, but a larger number of double-sided transfers according to the bonding environment in the bonding step (S12). It will also be possible to manufacture the core substrate CS using the film 10 .

Therefore, since a plurality of core substrates can be manufactured through a single manufacturing process, productivity can be improved and the manufacturing process can be simplified, and consumption of a carrier member can be reduced compared to using a single-sided transfer film.

The scope of the present invention is not limited to the above-described embodiments, but may be implemented in various forms of embodiments within the scope of the appended claims. Anyone skilled in the art without departing from the subject matter of the present invention claimed in the claims is considered to be within the scope of the claims of the present invention to various extents that can be modified.

10: transfer film, 11: carrier member, 12: first seed layer,
13: second seed layer, 14: junction control layer, 20: photosensitive layer,
21: pattern groove, 30: first circuit pattern, 40: insulating core layer,
50,90: metal layer, 51: second circuit pattern, 60: conductive part,
70: bonding layer, 81: insulating layer, 82: additional seed layer,
83: conductive film, 84: photosensitive layer, 84a: pattern groove,
85: circuit pattern C: conductive film, V: via hole, CS: core substrate

Claims (49)

manufacturing a transfer film by forming a first seed layer made of a silver (Ag) material having regular reflection characteristics on one surface of a carrier member having a smooth surface;
forming a first circuit pattern on the first seed layer through a photolithography process;
forming an insulating core layer and a metal layer on the first circuit pattern;
forming a conductive part electrically connecting the first circuit pattern and the metal layer;
patterning the metal layer to form a second circuit pattern; and
and removing the transfer film to transfer the first circuit pattern to the insulating core layer. According to claim 1,
The step of manufacturing the transfer film,
The method of manufacturing a printed circuit board further comprising forming a bonding control layer between the carrier member and the first seed layer. According to claim 1,
After the step of manufacturing the transfer film, a bonding step of bonding the carrier member of the pair of transfer films to both sides of the bonding layer, respectively, is further performed. According to claim 1,
The step of manufacturing the transfer film,
The method of manufacturing a printed circuit board, further comprising forming a second seed layer different from the first conductive material forming the first seed layer. According to claim 1,
The step of manufacturing the transfer film,
Forming a bonding control layer between the carrier member and the first seed layer, and forming a second seed layer different from the first conductive material forming the first seed layer. A method for manufacturing a printed circuit board. According to claim 1,
In the step of manufacturing the transfer film,
The method of manufacturing a printed circuit board, characterized in that the first seed layer is formed of two or more layers having different etching rates. According to claim 1,
A bonding force between the carrier member and the first seed layer is set to be relatively low compared to a bonding force between the first seed layer and the first circuit pattern. According to claim 1,
In the first circuit pattern forming step,
forming a photosensitive layer on the first seed layer;
Forming a pattern groove on the photosensitive layer;
a conductive material filling step of filling a portion exposed through the pattern groove with a conductive material to form the first circuit pattern;
A method of manufacturing a printed circuit board comprising the step of removing the photosensitive layer. According to any one of claims 1 to 8,
In the step of forming an insulating core layer and a metal layer on the first circuit pattern,
Before forming the metal layer, further comprising forming an additional transfer film,
The additional transfer film is a printed circuit board manufacturing method, characterized in that using a transfer film comprising a carrier member and a first seed layer or a transfer film comprising a carrier member, a first seed layer and a second seed layer. According to claim 9,
Forming the additional transfer film,
bonding the additional transfer film onto the insulating core layer so that the first seed layer of the additional transfer film contacts the insulating core layer;
And removing the carrier member of the additional transfer film to transfer the first seed layer to the insulating core layer,
The method of manufacturing a printed circuit board, characterized in that the metal layer is formed on the first seed layer transferred to the insulating core layer. According to claim 9,
Forming the additional transfer film,
Bonding the additional transfer film onto the insulating core layer so that the second seed layer of the additional transfer film contacts the insulating core layer;
The carrier member of the additional transfer film is removed so that the second seed layer of the additional transfer film is in contact with the insulating core layer, and the first seed layer of the additional transfer film is in contact with the second seed layer of the additional transfer film. , transferring the second seed layer and the first seed layer of the additional transfer film to the insulating core layer,
The method of manufacturing a printed circuit board, characterized in that the metal layer is formed on the first seed layer that is transferred to the insulating core layer and contacts the second seed layer. According to claim 9,
Forming the additional transfer film,
Bonding the additional transfer film onto the insulating core layer so that the second seed layer of the additional transfer film contacts the insulating core layer;
The carrier member of the additional transfer film is removed so that the second seed layer of the additional transfer film is in contact with the insulating core layer, and the first seed layer of the additional transfer film is in contact with the second seed layer of the additional transfer film. , transferring the second seed layer and the first seed layer of the additional transfer film to the insulating core layer,
The metal layer is transferred to the insulating core layer and the first seed layer formed on the second seed layer is selectively etched away using an etching solution capable of dissolving only the first seed layer, and then applied to the insulating core layer. A method of manufacturing a printed circuit board, characterized in that formed on the transferred second seed layer. According to any one of claims 1 to 8,
The step of transferring the first circuit pattern to the insulating core layer,
The method of manufacturing a printed circuit board comprising the steps of peeling the carrier member from the first seed layer and removing the first seed layer. According to claim 13,
The first seed layer is made of a first conductive material, the first circuit pattern is made of a second conductive material different from the first conductive material,
In the step of removing the first seed layer, only the first seed layer is selectively removed using an etching solution capable of dissolving only the first seed layer, excluding the first circuit pattern. manufacturing method. According to any one of claims 1 to 8,
In the step of transferring the first circuit pattern to the insulating core layer,
Using an etching solution capable of dissolving only the first seed layer, only the first seed layer in contact with the insulating core layer and the first circuit pattern is selectively removed by etching, and only the first seed layer is etched. The method of manufacturing a printed circuit board, characterized in that the carrier member in contact with the first seed layer is detached from the first seed layer and the transfer film is removed. A first seed layer made of a silver (Ag) material having regular reflection characteristics and a second seed layer made of a conductive material different from the first seed layer are formed on a carrier member having a smooth surface, and a bonding layer on the second seed layer manufacturing a carrier substrate having a second seed layer and a first seed layer formed on the bonding layer by bonding and then removing the carrier member;
forming a first circuit pattern on the first seed layer through a photolithography process;
forming an insulating core layer and a metal layer on the first circuit pattern;
forming a conductive part electrically connecting the first circuit pattern and the metal layer;
patterning the metal layer to form a second circuit pattern; and
A method for manufacturing a printed circuit board comprising a peeling step of peeling off the carrier substrate. According to claim 16,
The step of manufacturing the carrier substrate,
The method of manufacturing a printed circuit board further comprising forming a bonding control layer between the bonding layer and the second seed layer. According to claim 16,
The step of manufacturing the carrier substrate,
Preparing a transfer film by forming a first seed layer and a second seed layer on one surface of a carrier member;
A bonding step of bonding a bonding layer to the second seed layer of the transfer film;
and a transfer step of removing the carrier member and transferring the first seed layer and the second seed layer to the bonding layer. According to claim 16,
The step of manufacturing the carrier substrate,
Preparing a transfer film by forming a first seed layer and a second seed layer on one surface of a carrier member;
After the step of manufacturing the transfer film, a bonding step of bonding the second seed layer of the pair of transfer films to both sides of the bonding layer, respectively;
The carrier member of the pair of transfer films is removed, respectively, so that the second seed layer is in contact with both sides of the bonding layer and the first seed layer is in contact with each of the second seed layer, so that each side of the bonding layer is in contact with each other. The printed circuit board manufacturing method comprising a transfer step of transferring the first and second seed layers. According to claim 16,
The step of manufacturing the carrier substrate,
Preparing a double-sided transfer film by forming first and second seed layers on each of both sides of the carrier member;
A bonding step of bonding after arranging bonding layers between the plurality of double-sided transfer films, respectively;
The carrier member is removed, respectively, so that the second seed layer is in contact with both sides of the bonding layer and the first seed layer is in contact with each of the second seed layer, so that the first and second seed layers are in contact with each of the bonding layer. A method of manufacturing a printed circuit board comprising a transfer step of transferring a seed layer, wherein a plurality of carrier substrates are manufactured. According to claim 16,
In the step of manufacturing the carrier substrate,
The method of manufacturing a printed circuit board, characterized in that the first seed layer is formed of two or more layers having different etching rates. According to claim 16,
In the first circuit pattern forming step,
forming a photosensitive layer on the first seed layer;
Forming a pattern groove on the photosensitive layer;
removing the first seed layer exposed through the pattern groove;
A conductive material filling step of forming a first circuit pattern by filling a conductive material in a portion exposed through the pattern groove;
removing the photosensitive layer; and
The printed circuit board manufacturing method comprising the step of removing the exposed first seed layer after removing the photosensitive layer. According to claim 16,
The peeling step of peeling the carrier substrate,
Peeling the bonding layer from the second seed layer;
The method of manufacturing a printed circuit board comprising the step of removing the second seed layer. The method of any one of claims 16 to 23,
In the step of forming an insulating core layer and a metal layer on the first circuit pattern,
Prior to the formation of the metal layer, further comprising forming an additional transfer film,
The additional transfer film is a printed circuit board manufacturing method, characterized in that using a transfer film comprising a carrier member and a first seed layer or a transfer film comprising a carrier member, a first seed layer and a second seed layer. 25. The method of claim 24,
Forming the additional transfer film,
bonding the additional transfer film onto the insulating core layer so that the first seed layer of the additional transfer film contacts the insulating core layer;
And removing the carrier member of the additional transfer film to transfer the first seed layer to the insulating core layer,
The method of manufacturing a printed circuit board, characterized in that the metal layer is formed on the first seed layer transferred to the insulating core layer. 25. The method of claim 24,
Forming the additional transfer film,
bonding the additional transfer film onto the insulating core layer so that the second seed layer of the additional transfer film contacts the insulating core layer;
The carrier member of the additional transfer film is removed so that the second seed layer of the additional transfer film is in contact with the insulating core layer, and the first seed layer of the additional transfer film is in contact with the second seed layer of the additional transfer film. , transferring the second seed layer and the first seed layer of the additional transfer film to the insulating core layer,
The method of manufacturing a printed circuit board, characterized in that the metal layer is formed on the first seed layer that is transferred to the insulating core layer and contacts the second seed layer. 27. The method of claim 26,
The metal layer is transferred to the insulating core layer and the first seed layer formed on the second seed layer is selectively etched away using an etching solution capable of dissolving only the first seed layer, and then applied to the insulating core layer. A method of manufacturing a printed circuit board, characterized in that formed on the transferred second seed layer. The method of any one of claims 19 to 23,
The first seed layer is made of a first conductive material, the first circuit pattern and the second seed layer are made of a second conductive material different from the first conductive material,
The printed circuit board manufacturing method of claim 1 , wherein only the first seed layer is selectively removed using an etching solution capable of dissolving only the first seed layer, excluding the first circuit pattern and the second seed layer. delete 29. The method of claim 28,
The second seed layer is a printed circuit board manufacturing method, characterized in that formed of copper or aluminum. Preparing a transfer film by forming a first seed layer made of a silver (Ag) material having regular reflection characteristics on one surface of a carrier member having a smooth surface, and using the first seed layer of the pair of transfer films as an insulating core layer Through a bonding step of bonding to both sides, respectively, and a transfer step of removing the carrier member of the pair of transfer films and transferring the first seed layer to each of both sides of the insulation core layer, the first seed layer is transferred to both sides of the insulation core layer. preparing a core substrate on which one seed layer is respectively formed;
a drilling step of forming a via hole penetrating the core substrate;
through the photolithography process. A conductive part for forming a first circuit pattern and a second circuit pattern on the first seed layer disposed on both sides of the core substrate and electrically connecting the first circuit pattern and the second circuit pattern on both sides to the via hole. forming a circuit pattern; and
and removing the first seed layer exposed through the portion where the first circuit pattern and the second circuit pattern are not formed. 32. The method of claim 31,
Preparing the core substrate
The method of manufacturing a printed circuit board, characterized in that it further comprises the step of forming a bonding control layer in contact with the first seed layer before sequentially stacking the first seed layer on both sides of the insulating core layer. Preparing a transfer film by forming a first seed layer made of a silver (Ag) material having a regular reflection property and a second seed layer made of a conductive material different from the first seed layer on a carrier member having a smooth surface; A bonding step of bonding the second seed layer of the pair of transfer films to both sides of the insulating core layer, respectively, and removing the carrier member of the pair of transfer films, respectively, to attach the first and second seed layers to both sides of the insulating core layer, respectively. preparing a core substrate in which a second seed layer and a first seed layer are sequentially stacked on both sides of the insulating core layer through a transfer step of transferring the second seed layer;
a drilling step of forming a via hole penetrating the core substrate;
A first circuit pattern and a second circuit pattern are formed on the first seed layer disposed on both sides of the core substrate through a photolithography process, and the first circuit pattern and the second circuit pattern on both sides are electrically connected to the via hole. a circuit pattern forming step of forming a conductive part to be connected;
removing the first seed layer exposed through the portion where the first circuit pattern and the second circuit pattern are not formed; and
and removing the second seed layer exposed through the portion where the first circuit pattern and the second circuit pattern are not formed. 34. The method of claim 33,
Preparing the core substrate
The printed circuit board manufacturing method further comprising forming a bonding control layer in contact with the first seed layer before sequentially stacking the second and first seed layers on both sides of the insulating core layer, respectively. Preparing a transfer film by forming a first seed layer made of a silver (Ag) material having a regular reflection property and a second seed layer made of a conductive material different from the first seed layer on a carrier member having a smooth surface; A bonding step of bonding the second seed layer of the pair of transfer films to both sides of the insulating core layer, respectively, and removing the carrier member of the pair of transfer films, respectively, to attach the first seed layer to each of the both sides of the insulating core layer. and preparing a core substrate in which the second seed layer and the first seed layer are sequentially stacked on both sides of the insulating core layer through a transfer step of transferring the second seed layer;
removing the first seed layer;
a drilling step of forming a via hole penetrating the core substrate;
A first circuit pattern and a second circuit pattern are formed on the second seed layer disposed on both sides of the core substrate through a photolithography process, and the first circuit pattern and the second circuit pattern on both sides are electrically connected to the via hole. a circuit pattern forming step of forming a conductive part to be connected; and
and removing the second seed layer exposed through the portion where the first circuit pattern and the second circuit pattern are not formed. 36. The method of claim 35,
Preparing the core substrate
The printed circuit board manufacturing method further comprising forming a bonding control layer in contact with the first seed layer before sequentially stacking the second and first seed layers on both sides of the insulating core layer, respectively. 37. The method of any one of claims 33 to 36,
In the step of manufacturing the transfer film, on one side of the carrier member A method for manufacturing a printed circuit board comprising forming a first seed layer and a second seed layer. 38. The method of claim 37,
The method of manufacturing a printed circuit board, characterized in that the bonding force between the carrier member and the first seed layer is set relatively low compared to the bonding force between the first seed layer and the second seed layer. 37. The method of any one of claims 33 to 36,
Preparing the core substrate,
Preparing a double-sided transfer film by forming first and second seed layers on each of both sides of the carrier member;
A bonding step of arranging an insulating core layer between the plurality of double-sided transfer films and then bonding them;
By removing the carrier member, the first and second seed layers are in contact with both sides of the insulating core layer, respectively, and the first seed layer is in contact with each of the second seed layers. A method of manufacturing a printed circuit board, comprising manufacturing a plurality of core substrates, including a transfer step of transferring the second seed layer. 39. The method of claim 38,
The method of manufacturing a printed circuit board, characterized in that the bonding force between the carrier member and the first seed layer is set relatively low compared to the bonding force between the first seed layer and the second seed layer. 37. The method of any one of claims 31 to 36,
In the step of manufacturing the core substrate,
The method of manufacturing a printed circuit board, characterized in that the first seed layer is formed of two or more layers having different etching rates. 37. The method of any one of claims 31 to 36,
In the step of removing the first seed layer, the first seed layer is dissolved using an etching solution capable of dissolving only the first seed layer. The method of any one of claims 31 to 34,
In the circuit pattern forming step,
A photosensitive layer forming step of forming a photosensitive layer on the first seed layer located on both sides of the insulating core layer;
a pattern groove forming step of partially removing the photosensitive layer to form pattern grooves at the portion where the via hole is formed and at the portion where the first circuit pattern and the second circuit pattern are to be formed;
A conductive material is filled in the portion exposed through the pattern groove to form a first circuit pattern and a second circuit pattern on the first seed layer on both sides of the insulating core layer, respectively, and a conducting portion is formed on the inner wall surface of the via hole. A conductive material filling step and
A method for manufacturing a printed circuit board comprising a photosensitive layer removing step of removing the photosensitive layer. 44. The method of claim 43,
In the circuit pattern forming step,
Prior to the photosensitive layer forming step, a conductive film forming step of forming a conductive film on an outer surface of the first seed layer and an inner wall surface of the via hole is further performed. The method of claim 35 or 36,
In the circuit pattern forming step,
Forming a photosensitive layer on the second seed layer located on both sides of the insulating core layer;
partially removing the photosensitive layer to form pattern grooves at the portion where the via hole is formed and at the portion where the first circuit pattern and the second circuit pattern are to be formed;
A conductive material is filled in the portion exposed through the pattern groove to form a first circuit pattern and a second circuit pattern on the second seed layer on both sides of the insulating core layer, respectively, and a conducting portion is formed on the inner wall surface of the via hole. A conductive material filling step;
A method of manufacturing a printed circuit board comprising the step of removing the photosensitive layer. 46. The method of claim 45,
In the circuit pattern forming step, prior to the photoresist layer forming step, a step of forming a conductive film on an outer surface of the second seed layer and an inner wall surface of the via hole is further performed. 37. The method of any one of claims 31 to 36,
The method of manufacturing a printed circuit board further comprising forming a build-up layer on the first circuit pattern and the second circuit pattern. 48. The method of claim 47,
Forming the build-up layer,
forming an insulating layer and an additional seed layer on the first circuit pattern and the second circuit pattern;
forming a via hole penetrating the additional seed layer and the insulating layer to expose portions of the first circuit pattern and the second circuit pattern;
A photosensitive layer forming step of forming a photosensitive layer on the additional seed layer;
a pattern groove forming step of forming a pattern groove on the photosensitive layer;
A conductive material filling step of forming a circuit pattern by filling a conductive material in a portion exposed through the pattern groove;
A photosensitive layer removing step of removing the photosensitive layer;
The printed circuit board manufacturing method comprising the step of removing the additional seed layer exposed through the portion where the circuit pattern is not formed. 49. The method of claim 48,
Forming the build-up layer,
Prior to the step of forming the photosensitive layer, a step of forming a conductive film on an outer surface of the additional seed layer and an inner wall surface of the via hole is further performed.

Images