KR101908513B1 - Organic light emitting diode display device for sensing pixel current and method for sensing pixel current thereof - Google Patents

Organic light emitting diode display device for sensing pixel current and method for sensing pixel current thereof Download PDF

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KR101908513B1
KR101908513B1 KR1020120079801A KR20120079801A KR101908513B1 KR 101908513 B1 KR101908513 B1 KR 101908513B1 KR 1020120079801 A KR1020120079801 A KR 1020120079801A KR 20120079801 A KR20120079801 A KR 20120079801A KR 101908513 B1 KR101908513 B1 KR 101908513B1
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line
data
voltage
switch
measurement
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KR1020120079801A
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KR20130024744A (en
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세이치 미즈코시
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엘지디스플레이 주식회사
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Priority claimed from US13/596,919 external-priority patent/US9236011B2/en
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Abstract

The present invention relates to an OLED display device capable of measuring a pixel current at a high speed with a simple circuit for correcting luminance non-uniformity and a method of measuring a pixel current thereof. In the OLED display device of the present invention, A display panel including a pixel circuit for independently driving the display panel; A data line for supplying a data voltage to the pixel circuit in the display panel after driving the pixel circuit using a data voltage in a measurement mode, a reference line for supplying a reference voltage to the pixel circuit, And a data driver for measuring and outputting the pixel current of the pixel circuit flowing in the current measurement line as a voltage.

Description

TECHNICAL FIELD [0001] The present invention relates to an organic light emitting diode (OLED) display device for measuring a pixel current, and a method for measuring a pixel current of the OLED display device.

The present invention relates to an active matrix organic light emitting diode (AMOLED) display device, and more particularly, to an AMOLED display device capable of measuring a current of each pixel with a simple structure at high speed, And a method of measuring a pixel current thereof.

The AMOLED display is a self-luminous device that emits an organic light-emitting layer by recombination of electrons and holes, and is expected to be a next-generation display device because of its high luminance, low driving voltage and ultra thin film.

Each of the plurality of pixels constituting the AMOLED display device includes an organic light emitting diode (OLED) composed of an organic light emitting layer between the anode and the cathode, and a pixel circuit for independently driving the OLED. The pixel circuit mainly includes a switching thin film transistor (hereinafter referred to as a TFT) and a capacitor and a driving TFT. The switching TFT charges the capacitor corresponding to the data signal in response to the scan pulse and controls the magnitude of the current supplied to the OLED according to the magnitude of the voltage charged in the capacitor to control the amount of light emitted from the OLED. The amount of light emission of the OLED is proportional to the current supplied from the driving TFT.

However, in the OLED display device, a characteristic difference such as a threshold voltage (Vth) and a mobility of a driving TFT is generated for each pixel for the reason of process variation and the like, so that the amount of current for driving the OLED is varied, . In general, a difference in characteristics between the initial driving TFTs generates spots and patterns on the screen, and a characteristic difference due to the deterioration of the driving TFTs generated while driving the OLEDs causes a problem that the life of the AMOLED display panel is reduced or after- have.

To solve this problem, prior arts such as U.S. Patent No. 7,834,825 disclose a data compensation method for measuring the current of each pixel and compensating the input data according to the measurement result. However, the prior art uses a method of measuring the current flowing to the power supply line (VDD or VSS line) of the panel while lighting each pixel, so that when the resolution increases, the current measurement time is shortened due to parasitic capacitors existing in parallel to the power supply line There is a problem in that high-speed measurement is difficult.

Although a plurality of current measuring circuits can simultaneously measure the currents of a plurality of pixels and measure them at a high speed, the circuit scale becomes large, which is not realistic. Therefore, in the prior art patent, the characteristic deviation between the initial driving TFTs can be compensated by measuring the deviation of the driving TFTs before the product is shipped. However, the characteristic deviation due to the deterioration of the driving TFTs generated while driving the OLED after the product is shipped, There is a problem that compensation is difficult.

SUMMARY OF THE INVENTION The present invention has been made in order to solve the conventional problems, and it is an object of the present invention to provide an OLED display device capable of measuring a current of each pixel with a simple structure at high speed, And to provide a measurement method.

According to an aspect of the present invention, there is provided an OLED display device for measuring a pixel current according to an embodiment of the present invention includes: a display panel including pixels each including a light emitting element and a pixel circuit for independently driving the light emitting element; A reference line for supplying a reference voltage to the data line and the pixel circuit in the display panel after driving a data line connected to the pixel circuit using a data voltage in a measurement mode, And a data driver which uses one of the first power supply lines to supply a current as a current measurement line and measures and outputs a voltage corresponding to a pixel current of the pixel circuit flowing to the current measurement line; The data driver includes a driving unit for driving the data line, and a measuring unit for measuring and outputting a voltage of the current measuring line.

Wherein the driver of the data driver includes a digital-to-analog converter for supplying a data voltage to the data line through an output channel; A sampling and holding circuit connected in parallel to the digital-analog converter and the output channel for sampling and holding the voltage of the current measurement line and outputting the measured voltage as the measurement voltage; And an analog-to-digital converter for converting the measured voltage from the sampling and holding circuit into digital data and outputting the digital data.

Wherein the measuring unit of the data driver includes: a shift register for sequentially outputting sampling signals in the measurement mode; And a multiplexer for sequentially outputting a plurality of outputs of the sampling and holding circuit to the analog-to-digital converter in response to the sampling signal.

Further comprising a power switch for connecting the second power line connected to the cathode of the light emitting element to the low potential power source or the high potential power source; The driving unit of the data driver further comprises a first switch connected between the digital-analog converter and the output channel on a channel-by-channel basis; Wherein the measuring unit of the data driver further comprises a second switch connected between the output channel and the sampling and holding circuit on a channel-by-channel basis; Wherein the power switch connects the low potential power supply to the power supply line in the display mode and connects the high potential power supply to the power supply line in the measurement mode, And said second switch connects said output channel to said sampling and holding circuit during a measurement period of said measurement mode, as opposed to said first switch, said digital-to-analog converter being connected to said output channel in a supply period.

The display panel includes a third switch connected between the output channel of the data driver and the data line on a channel-by-channel basis, a fourth switch connected between the output channel and the reference line for each channel, And a fifth switch connected between the common line and the reference line on a channel-by-channel basis, wherein the third switch connects the output channel with the data line in the display mode and the data supply period of the measurement mode , The fourth switch connects the output channel to the reference line in the measurement period of the measurement mode, and the fifth switch connects the reference common line in the display mode and the data supply period of the measurement mode Connect to the reference line.

The second, fourth, and fifth switches are turned on and connected to the sampling and holding circuit in the precharge period existing between the data supply period and the measurement period of the measurement mode, Precharges to the reference voltage from the line.

The pixel circuit including a driving TFT connected between the first and second power lines in series with the light emitting element to drive the light emitting element; To the first node connected to the gate electrode of the driving TFT; A second switching TFT for supplying the reference voltage from the reference line to a second node connected between the driving TFT and the light emitting element in response to a second scan signal of the second scan line; And a storage capacitor which charges the voltage between the first and second nodes and supplies the charged voltage to the driving voltage of the driving TFT; In the measurement mode, the first switching TFT is turned on only in a data supply period, and in the measurement mode, the second switching TFT is turned on from the data supply period to the measurement period, The pixel current from the driving TFT flows to the reference line and the measuring unit measures and outputs a voltage rising in proportion to the pixel current through the reference line and the output channel in the measurement period.

Wherein the pixel circuit comprises: a driving TFT connected between the first and second power supply lines in series with the light emitting element to drive the light emitting element; and a driver circuit for receiving the reference from the reference line in response to a first scan signal of the first scan line, A first switching TFT for supplying a voltage to a first node connected to a gate electrode of the driving TFT; A second switching TFT for supplying the data voltage from the data line to a second node connected between the driving TFT and the light emitting element in response to a second scan signal of the second scan line; And a storage capacitor which charges the voltage between the first and second nodes and supplies the charged voltage to the driving voltage of the driving TFT; In the measurement mode, the first switching TFT is turned on only in the data supply period, and in the measurement mode, the second switching TFT is turned on from the data supply period of the measurement mode to the measurement period, And the measuring unit measures and outputs a voltage rising in proportion to the pixel current through the data line and the output channel in the measurement period.

The first switch is turned on in a precharge period existing between the data supply period and the measurement period of the measurement mode, and supplies the precharge voltage from the digital-analog converter to the data line.

An OLED display device for measuring a pixel current according to another embodiment of the present invention includes a plurality of pixels each including a light emitting element, a pixel circuit for independently driving the light emitting element, a data line connected to the pixel circuit, A display panel including a line; A data driver for supplying a data voltage to the data lines in a display mode and a measurement mode; And supplies a high-potential power supply to the first power supply line for driving the pixel circuit in the display mode and the measurement mode, and stops supply of the high-potential power supply to the first power supply line in the measurement period of the measurement mode And a measuring unit for measuring and outputting a voltage corresponding to a pixel current of the pixel circuit using the first power supply line as a current measuring line.

Wherein the measuring unit comprises: a first switch connected between the high potential power supply common line for supplying the high potential power and the first power supply line for each channel; An analog-to-digital converter for measuring a voltage on the first power supply line, converting the measured voltage into digital data, and outputting the digital data; The first switch is turned off only during the measurement period of the measurement mode.

The measuring unit may include: a high-potential power supply common line for supplying the high-potential power supply; a first switch connected between the first power supply line and the first switch; A sampling and holding circuit connected to the first power supply line on a channel-by-channel basis, for sampling and holding a voltage of the first power supply line in the measurement mode and outputting the measured voltage as the measurement voltage; A shift register for sequentially outputting sampling signals in the measurement mode; A multiplexer for sequentially outputting a plurality of outputs of the sampling and holding circuit in response to the sampling signal; And an analog-to-digital converter for converting an output voltage of the multiplexer into digital data and outputting the digital data.

The measurement unit is embedded in the data driver.

Wherein the pixel circuit includes a p-type driver TFT connected between the first power supply line and the second power supply line in series with the light emitting element to drive the light emitting element, An n-type switching TFT for supplying a voltage to a first node connected to a gate electrode of the driving TFT; And a storage capacitor for charging a voltage between the first node and a second node connected in common between the first power supply line and the drive TFT and supplying the voltage to the drive voltage of the drive TFT.

Wherein the display panel further comprises a reference line for supplying a reference voltage to the pixel circuit, wherein the pixel circuit is connected between the first power supply line and the second power supply line in series with the light emitting element to drive the light emitting element A first switching TFT for supplying the data voltage from the data line to a first node connected to the gate electrode of the driving TFT in response to a scan signal of the scan line; A second switching TFT for supplying the reference voltage from the reference line to a second node connected between the driving TFT and the light emitting element in response to a scan signal of the scan line; And a storage capacitor which charges a voltage between the first and second nodes and supplies the charged voltage to the driving voltage of the driving TFT.

Wherein the display panel is connected to a reference line for supplying a reference voltage to the pixel circuit, a high potential common line for supplying the high potential power, and a high potential common line for connecting the high potential common line and the first power supply line, A second switch for switching a connection between the high potential common line and the first power supply line in response to a first control signal of the control line; Further comprising a third switch connected between the data line and the first power line for each channel and switching a connection between the data line and the first power line in response to a second control signal of the second control line And in the measurement period of the measurement mode, the measurement unit measures and outputs the voltage on the first power line through the data line and the third switch.

The data driver including a digital-to-analog converter for supplying the data voltage to the data line via an output channel; A first switch connected between the digital-analog converter and the output channel on a channel-by-channel basis; And the measurement unit that is connected in parallel to the digital-analog converter and the output channel and measures and outputs the voltage on the first power line through the data line connected to the output channel and the third switch.

Wherein the first switch supplies a data voltage from the digital-analog converter to the data line via the output channel in a data supply period of the measurement mode, and the second switch supplies a data voltage from the high- Supplying power to the first power line; In the measurement period of the measurement mode, the first and second switches are turned off, the third switch is turned on, the data line connected to the output channel, and the first switch Measure the voltage on the power line.

The third switch is turned on and the first switch is turned off before the second switch is turned off in the data supply period of the measurement mode and the precharge period of the measurement period, Line and output channels to the high potential voltage.

The OLED display of the present invention calculates the pixel current using the measured voltage output from the data driver, the measurement period, and the capacitance of the capacitor connected in parallel with the current measurement line in the measurement mode, And a timing controller for calculating and storing the compensation value using the pixel current.

Wherein the timing controller is configured to measure the measurement voltage (V1, V2) for measuring and outputting the voltage on the current measurement line in the data driver, the measurement time (t1, t2) And the capacitance C of the capacitor connected in parallel to the pixel current I in accordance with the following equation (1).

&Quot; (1) "

I = C (V2 - V1) / (t2 - t1)

Here, V1 and V2 are measured voltages at the time t1 and t2, respectively.

The capacitance is a sum of a capacitance of a parasitic capacitor existing in the current measurement line and a capacitance of a capacitor connected in parallel to an input terminal of the measurement unit.

The capacitance is a sum of a capacitance of a parasitic capacitor existing in the first power supply line and a parasitic capacitance existing in the data line.

A method of measuring a pixel current of an OLED display according to an exemplary embodiment of the present invention includes: supplying a data voltage to the pixel circuit in a data supply period of a measurement mode to drive the pixel circuit; Wherein one of the data line connected to the pixel circuit, the reference line, and the first power supply line is used as a current measurement line in a measurement period of the measurement mode, and the pixel current And outputting the measured voltage.

In the data supply period, supplies the data voltage via the output channel to the data line through a first switch connected between the digital-analog converter and the output channel of the data driver, and in the measurement period, Wherein the voltage on the current measurement line is sampled and held through a second switch connected in parallel to the first switch and the output channel and operated in a manner opposite to the first switch to convert the measured voltage into digital data And outputs it.

In the data supply period, the output channel of the data driver is connected to the data line through the third switch, the fourth switch between the output channel and the reference line is turned off, and the reference line The reference voltage is supplied, and in the measurement period, the third and fifth switches are turned off, the reference line is connected to the output channel through the fourth switch, and the voltage corresponding to the pixel current .

In the pixel current measuring method of the OLED display of the present invention, the second, fourth, and fifth switches are turned on in the precharge period between the data supply period and the measurement period to turn the output channel from the reference line Lt; RTI ID = 0.0 > reference voltage < / RTI >

A method of measuring a pixel current of an OLED display device according to the present invention is characterized by measuring a voltage corresponding to the pixel current through the second switch and the data line in the measurement period, Further comprising the step of, during a charge period, turning on the first switch to supply a pre-charge voltage from the digital-to-analog converter to the data line.

A method of measuring a pixel current of an OLED display device according to another embodiment of the present invention is a method of measuring a pixel current of an OLED display device, wherein each pixel includes a light emitting element, a pixel circuit for independently driving the light emitting element, Driving the pixel circuit by supplying a data voltage to the data line and supplying a high potential power to the first power line in a data supply period of the measurement mode, Wherein the control circuit stops the supply of the data voltage from the data line to the pixel circuit in the measurement period of the measurement mode and interrupts the supply of the high potential power to the first power supply line, And measuring and outputting a voltage corresponding to the pixel current of the pixel circuit using the current as a current measurement line.

In the pixel current measuring method of the OLED display of the present invention, in the data supply period, the first switch between the high potential power supply common line supplying the high potential power and the first power supply line is turned on, The first switch is turned off and the voltage on the first power supply line is measured, and the measured voltage is converted into digital data and outputted, and between the data supply period and the measurement period, Further comprising the step of interrupting the supply of the data voltage to the pixel circuit and then maintaining the supply of the high potential power supply to the first power supply line through the first switch.

In the data supply period, the driving TFT of the pixel circuit drives using the difference voltage between the data voltage and the high potential power supply.

Wherein the OLED display device further comprises a reference line for supplying a reference voltage to the pixel circuit, and in the data supply period, the driving TFT of the pixel circuit is driven by using a difference voltage between the data voltage and the reference voltage do.

The OLED display comprises a first switch connected between the digital-to-analog converter and an output channel in a data driver; And a second control line connected in common between the high potential common line for supplying the high potential power to the display panel and the first power line, A second switch for switching a connection between the first switch and the second switch; A third switch connected between the data line and the first power supply line in the display panel on a channel-by-channel basis and switching a connection between the data line and the first power supply line in response to a second control signal of the second control line; In the data supply period, supplies the data voltage to the data line through the first switch, supplies the high-potential power supply to the first power supply line through the second switch, In the measurement period, the first and second switches are turned off and measure and output the voltage on the first power line through the data line and the third switch.

The method for measuring a pixel current of an OLED display according to the present invention is characterized in that, in the data supply period and the precharge period of the measurement period, before the second switch is turned off, the third switch is turned on, Further comprising the step of precharging the data line and the output channel to the high voltage by turning the switch off.

The pixel current measuring method of an OLED display according to the present invention is characterized in that in the measuring mode, the pixel current is calculated using the measured voltage, the measuring period, and the capacitance of a capacitor connected in parallel with the current measuring line, And calculating and storing the compensation value using the pixel current.

Wherein the pixel current I is calculated based on the measured voltages V1 and V2 and the measurement times t1 and t2 of the measured voltages and the capacitance C of the capacitors connected in parallel with the current measurement line 1 < / RTI >

An OLED display device for measuring a pixel current according to the present invention and a method for measuring a pixel current of the OLED display device according to the present invention are characterized by charging a pixel current into a capacitor connected in parallel with a reference line or a data line of a display panel in a measurement mode, The pixel currents flowing through the driving TFTs can be sequentially measured at a high speed to correct the luminance unevenness.

The OLED display device and the pixel current measurement method for measuring the pixel current according to the present invention measure pixel current flowing in a driving TFT through a first power line parallel to a data line in a measurement mode as a voltage, High-speed measurement is possible.

In addition, the OLED display and the pixel current measurement method for measuring the pixel current according to the present invention can measure each pixel current at a high speed with a simple configuration through a data driver. Accordingly, in the present invention, not only the inspection process before the product shipment but also the measurement mode is inserted between display modes in which the OLED display device is driven even after the product is shipped, and each pixel current is measured to determine not only the characteristic drift of the initial driving TFT, It is possible to increase the lifetime and image quality of the OLED display device.

1 is a circuit diagram showing a typical configuration of an OLED display device for measuring pixel current according to a first embodiment of the present invention.
2 is a circuit diagram showing an operation state of a display mode of the OLED display device shown in FIG.
3 is a driving waveform diagram of a display mode of the OLED display device shown in Fig.
4A and 4B are circuit diagrams showing an operation state of a measurement mode of the OLED display device shown in FIG.
5 is a driving waveform diagram of a measurement mode of the OLED display device shown in Figs. 4A and 4B.
6 is an equivalent circuit diagram of the measurement mode of the OLED display shown in Fig. 4B.
7 is a circuit diagram showing an operation state of a display mode of an OLED display device for measuring a pixel current according to a second embodiment of the present invention.
8 is a circuit diagram showing an operation state of a measurement mode of an OLED display device for measuring a pixel current according to a second embodiment of the present invention.
9 is a drive waveform diagram of a measurement mode of the OLED display device shown in FIG.
10 is a block diagram illustrating an internal configuration of a data driver according to an embodiment of the present invention.
FIGS. 11A and 11B are waveform diagrams illustrating the relationship between the pixel current and the measured voltage in the measurement mode of the OLED display device shown in FIG. 4B. FIG.
12 is a circuit diagram showing a typical configuration of an OLED display device for measuring pixel current according to the third embodiment of the present invention.
13 is a drive waveform diagram of a measurement mode of the OLED display device shown in Fig.
Fig. 14 is an equivalent circuit diagram of the OLED display device shown in Fig. 12 in the measurement period C of the measurement mode shown in Fig.
15 is a circuit diagram showing a typical configuration of an OLED display device for measuring a pixel current according to a fourth embodiment of the present invention.
16 is a block diagram illustrating an internal configuration of a data driver according to another embodiment of the present invention.
17 is a circuit diagram showing a typical configuration of an OLED display device for measuring pixel current according to the fifth embodiment of the present invention.
18 is a circuit diagram showing a typical configuration of an OLED display device for measuring pixel current according to the sixth embodiment of the present invention.
19 is a drive waveform diagram of a measurement mode of the OLED display device shown in Fig.
20A to 20C are equivalent circuit diagrams simulating the OLED display device shown in FIG. 17, and voltage and current measured through the first power source line of the equivalent circuit diagram.

1 is an equivalent circuit diagram showing a configuration of a part of an OLED display device for measuring a pixel current according to a first embodiment of the present invention.

The OLED display device shown in Fig. 1 includes a display panel 20 on which a pixel array is formed, and a display panel 20 on which a data line DL is driven through an output channel CH connected to the display panel 20, And the data driver 10 has a configuration in which the display panel 20 is configured by a typical one pixel structure and the data driver 10 is configured by a configuration of a driving unit connected to one output channel CH Respectively.

In addition, the OLED display device of the present invention includes a scan driver for driving the scan lines SL of the display panel 20, a timing controller for controlling the driving timing of the data driver and the scan driver and supplying data to the data driver, But they are omitted because they are the same as the conventional configuration.

The OLED display device shown in FIG. 1 is divided into a display mode for normal image display (FIG. 2) and a measurement mode for pixel current measurement (FIGS. 4A and 4B).

The data driver 10 includes a digital-to-analog converter (DAC) 12 connected to the output channel CH and a channel, a sampling and holding circuit A first switch SW1 connected between the DAC 12 and the output channel CH on a channel-by-channel basis, an output channel CH and an S / H circuit And a capacitor Ch connected in parallel at the input terminal of the S / H circuit 14 for each channel.

In the display mode and the measurement mode, the DAC 12 converts the input data into a data voltage Vdata and supplies it to the data line DL of the display panel 20 via the first switch SW1 and the output channel CH . In the measurement mode, the S / H circuit 14 measures (samples and holds) the voltage of the current measurement line (reference line or data line) of the display panel 20 through the output channel CH and the second switch SW2 ).

Each pixel of the display panel 20 includes an OLED and a pixel circuit that independently drives the OLED. The pixel circuit includes at least three TFTs (ST1, ST2, DT) and one storage capacitor (Cs) for independently driving the OLED, a first power supply line (PL1) for supplying a high potential voltage (Vdd) A second power supply line PL2 for supplying a low potential voltage Vss lower than the voltage Vdd or the high potential voltage Vdd, a second power supply line PL2 for supplying a reference voltage Vss lower than the high potential voltage Vdd, A first and a second scan lines SL1 and SL2 for supplying first and second scan signals respectively and a data line DL for supplying a data voltage Vdata, ). The reference line RL is formed in parallel with the data line DL and the number of the reference lines RL is equal to the number of the data lines DL equal to the number of pixel columns.

The display panel 20 includes a third switch SW3 connected between the output channel CH and the data line DL on a channel-by-channel basis and a fourth switch SW3 connected between the output channel CH and the reference line RL. A switch SW4 and a fifth switch SW5 connected on a channel-by-channel basis between a reference common line RCL for supplying a reference voltage Vdd from an external voltage source and the reference line RL.

The OLED display further includes a sixth switch SW6 for switching the high potential Vdd and the low potential Vss to the second power supply line PL2. The sixth switch SW6 may be located between the power source unit or the power source unit and the display panel 20. The sixth switch SW6 connects the low potential power supply Vss to the second power supply line PL2 in the display mode and connects the high potential power supply Vdd to the second power supply line PL2 in the measurement mode.

A control signal for controlling the first to sixth switches SW1 to SW6 is generated and supplied from the timing controller or the data driver 10.

The OLED is connected in series with the driving TFT DT between the first power supply line PL1 and the second power supply line PL2. The OLED has an anode connected to the driving TFT (DT), a cathode connected to the second power supply line (PL2), and a light emitting layer between the anode and the cathode. The light emitting layer includes an electron injection layer, an electron transport layer, an organic light emitting layer, a hole transport layer, and a hole injection layer sequentially stacked between the cathode and the anode. In the OLED, when a positive bias is applied between the anode and the cathode, electrons from the cathode are supplied to the organic light emitting layer via the electron injection layer and the electron transport layer, and holes from the anode are supplied to the organic light emitting layer via the hole injection layer and the hole transport layer do. Accordingly, the fluorescent or phosphorescent material is caused to emit light by the recombination of electrons and holes supplied from the organic light emitting layer, thereby generating a luminance proportional to the current density.

The first switching TFT ST1 has a gate electrode connected to the first scan line SL1, a first electrode connected to the data line DL, a first node N1 connected to the gate electrode of the drive TFT DT, ) Is connected to the second electrode. The first electrode and the second electrode of the first switching TFT (ST1) become a source electrode and a drain electrode in accordance with the current direction. In the display mode and the measurement mode, the first switching TFT (ST1) supplies the data voltage (Vdata) from the data line (DL) to the first node (N1) in response to the scan signal of the first scan line (SL1).

The second switching TFT ST2 has the gate electrode connected to the second scan line SL2, the first electrode connected to the reference line RL, and the second node connected to the second electrode of the driving TFT DT N2 are connected to the second electrode. The first electrode and the second electrode of the second switching TFT ST2 become a source electrode and a drain electrode in accordance with the current direction. In the display mode and the measurement mode, the second switching TFT ST2 supplies the reference voltage Vref from the reference line RL to the second node N2 in response to the scan signal of the second scan line SL2. The second switching TFT ST2 supplies the current from the driver TFT DT, that is, the pixel current, to the reference line RL in response to the scan signal of the second scan line SL2 in the measurement mode.

The storage capacitor Cs charges the difference voltage Vdata-Vref between the data voltage Vdata and the reference voltage Vref supplied to the first and second nodes N1 and N2, And supplies it as the driving voltage Vgs.

In the driving TFT DT, a gate electrode is connected to the first node N1, a first electrode is connected to the first power supply line PL1, and a second electrode is connected to the second node N2. The first electrode and the second electrode of the driving TFT DT become a source electrode and a drain electrode in accordance with the current direction. The driving TFT DT supplies a pixel current corresponding to the driving voltage Vgs supplied from the storage capacitor Cs to the OLED to emit the OLED.

FIG. 2 shows an operation state of the display mode of the OLED display device shown in FIG. 1, and FIG. 3 is a driving waveform diagram of the pixel circuit shown in FIG.

The first and third switches SW1 and SW3 connected in series between the DAC 12 and the data line DL and the first and third switches SW1 and SW3 connected between the reference common line RCL and the reference line RL in the display mode shown in Fig. The fifth switch SW5 connected to the first switch SW2 is always turned on in response to the corresponding control signal. On the other hand, the second switch SW2 connected between the output channel CH and the S / H circuit 14 and the fourth switch SW4 connected between the output channel CH and the reference line RL And is always turned off in response to the corresponding control signal. The sixth switch SW6 connects the low potential power supply Vss to the second power supply line PL2 in response to the corresponding control signal.

In the corresponding scan period 1H of the display mode shown in FIG. 2, the DAC 12 converts the input digital data into the analog data voltage Vdata and supplies the data voltage Vdata to the first and third switches SW1, SW3 to the data line DL. The reference voltage Vref from the reference common line RCL is supplied to the reference line RL via the fifth switch SW5. When the first and second switching TFTs ST1 and ST2 of the pixel circuit are simultaneously turned on in response to the first and second scan signals of the first and second scan lines SL1 and SL2 shown in FIG. , The storage capacitor Cs charges the difference voltage Vdata-Vref between the data voltage Vdata and the reference voltage Vref and supplies the difference voltage Vdata-Vref to the driving voltage Vgs of the driving TFT DT. Even if the first and second switching TFTs ST1 and ST2 of the pixel circuit are simultaneously turned off in response to the first and second scan signals, the storage capacitor Cs supplies the charging voltage Vdata-Vref to the driving TFT DT As a driving voltage Vgs. Thus, the OLED emits light in proportion to the current corresponding to the driving voltage Vgs of the driving TFT DT.

FIGS. 4A and 4B show operation states of the measurement mode of the OLED display device shown in FIG. 1 in a stepped manner, and FIG. 5 is a driving waveform diagram of the OLED display device shown in FIGS. 4A and 4B.

The first and third switches SW1 and SW2 between the DAC 12 and the data line DL in response to the corresponding control signal in Fig. 5 in the data supply period A of the measurement mode shown in Figs. 4A and 5, The fifth switch SW5 between the reference voltage Vref supply line RPL and the reference line RL is turned on and the connection between the output channel CH and the S / The fourth switch SW4 connected between the second switch SW2 and the output channel CH and the reference line RL is turned off. At this time, the sixth switch SW6 connects the high potential power supply Vdd to the second power supply line PL2 in response to the corresponding control signal. The DAC 12 converts the measurement input data into a data voltage and supplies it to the data line DL via the first and third switches SW1 and SW3. The reference voltage Vref = V0 is supplied to the reference line RL via the fifth switch SW5. The first and second switching TFTs ST1 and ST2 of the pixel circuit are simultaneously turned on in response to the first and second scan signals so that the measurement data voltage Vdata is applied to the first and second nodes N1 and N2, And a reference voltage Vref. Thus, the storage capacitor Cs charges the differential voltage (Vdata-Vref) between the measurement data voltage (Vdata) and the reference voltage (Vref) to drive the driving TFT (DT). At this time, the OLED does not emit light because a negative bias is applied thereto.

Next, the first and third switches SW1 and SW3 between the DAC 12 and the data line DL in response to the corresponding control signal in the precharge period B of the measurement mode shown in Fig. 5 turn While the second switch SW2 connected between the output channel CH and the S / H circuit 14 and the fourth switch SW4 between the output channel CH and the reference line RL, And the first switching TFT ST1 is turned off in response to the scan signal of the first scan line SL1. At this time, the fifth switch SW5 connected between the supply line RPL of the reference voltage Vref and the reference line RL maintains the turn-on state. Thus, the output channel CH connected to the reference line RL is precharged to the reference voltage Vref.

In the measurement period C shown in FIG. 4B and FIG. 5, the fifth switch SW5 connected between the reference common line RCL and the reference line RL is turned off in response to the corresponding control signal . The pixel current flowing through the drive TFT DT of the pixel circuit flows through the parasitic capacitor Cline and the capacitor Ch connected in parallel with the reference line RL via the reference line RL and the reference line RL Becomes higher than the reference voltage (Vref = V0). FIG. 6 shows an equivalent circuit for a path through which the pixel current flows in the measurement period C shown in FIG. 4B. When the fifth switch SW5 is turned off, the pixel current flowing through the drive TFT DT The parasitic capacitor Cline and the capacitor Ch are charged while flowing to the S / H circuit 14 through the reference line RL to raise the voltage of the reference line RL.

At this time, since the voltage of the reference line RL rises in proportion to the pixel current, if the second switch SW2 is turned off at a specific point in time and the voltage of the reference line RL is read by the S / H circuit 14, The pixel current flowing in the driving TFT DT can be calculated by using the following expression (1).

&Quot; (1) "

I = (Cline + Ch) x (V2 - V1) / (t2 - t1)

In the equation (1), I represents the pixel current, Cline represents the capacitance of the parasitic capacitor Cline connected in parallel to the reference line RL and Ch represents the capacitance of the capacitor Ch connected in parallel at the input of the S / And V1 and V2 represent the voltages of the reference line RL detected at time points t1 and t2 respectively in the C period of the measurement mode shown in Fig. Assuming that the capacitance (Cline + Ch) of the capacitor connected in parallel to the reference line RL is 50 pF, the voltage change (V2-V1) is 1 V and the time t (= t2-t1) It can be seen that the pixel current I calculated by Formula 1 is 500 nA.

On the other hand, when the voltage of the charging start of the reference line RL is the base voltage V0, the voltage of the reference line RL is measured only once at the time t2, and the pixel current I is calculated using the following equation Can be obtained.

&Quot; (2) "

I = (Cline + Ch) x (V2 - V0) / (t2 - t0)

As described above, the data driver 10 measures the current of each pixel in the measurement mode as a voltage through the reference line RL, converts the measured voltage into digital data, and outputs the digital data to the timing controller.

The timing controller detects the characteristic deviation according to the pixel current of the driving TFT DT by using the measured voltage of each pixel measured from the data driver 10 in the measuring mode and compensates the data. In other words, the timing controller uses the measured voltage supplied from the data driver 10 as digital data in the measurement mode to detect a compensation value for compensating the threshold voltage and mobility deviation of the driving TFT DT according to each pixel current And stores it in the memory. The timing controller compensates the input data using the compensation value stored in the measurement mode in the display mode.

For example, the timing controller calculates the pixel current of the driving TFT DT of each pixel as shown in Equation (1) or (2) by using the measured voltage from the data driver 10 in the measurement mode. The timing controller uses a function of obtaining the pixel current according to the threshold voltage and the mobility as described in U.S. Patent No. 7,982,695 to determine a threshold voltage representing the characteristics of the driving TFT DT and a mobility deviation between pixels Pixels), detects an offset value for compensating the detected threshold voltage, and a gain value for compensating for the mobility deviation as a compensation value, and stores the offset value in the form of a look-up table in the memory. The timing controller compensates the input data in the display mode by using the offset value and the gain value of each stored pixel. For example, the timing controller compensates the input data by multiplying the gain value by the input data voltage and adding the offset value to the input data voltage.

As described above, the OLED display according to the present invention can drive the data line DL using the data driver in the measurement mode and measure the pixel currents simply and at high speed through the reference line RL. Accordingly, the OLED display device according to the present invention inspects each pixel current by inserting a measurement mode between display modes in which the OLED display device is driven not only after the product shipment but also before the product shipment, Can also be compensated. Also, in the OLED display according to the present invention, since each output channel of the data driver is sequentially connected to the data line DL and the reference line RL in the measurement mode, the data driver measures the pixel current through the reference line RL It is possible to prevent an increase in the number of output channels of the data driver.

7 and 8 are circuit diagrams respectively showing an OLED display device for measuring a pixel current according to a second embodiment of the present invention in a display mode and a measurement mode, Fig.

In contrast to the OLED display device of the second embodiment shown in Figs. 7 and 8 and the OLED display device of the first embodiment shown in Fig. 1 described above, the third to fifth The switches SW3, SW4 and SW5 are omitted and the first switching TFT ST1 in the pixel circuit supplies the reference voltage Vref to the first node N1 and the second switching TFT ST2 supplies the data voltage Vdata) to the second node N2, the description of the overlapping components will be omitted. The DAC 12 and the S / H circuit 14 of the data driver 10 are connected in parallel to the data line DL of the display panel 20 via the output channel CH.

In each scan period of the display mode shown in Fig. 7, the storage capacitor Cs is connected to the reference voltage Vref from the first switching TFT ST1 turned on and the reference voltage Vref from the second switching TFT ST2 turned on And charges the differential voltage (Vref-Vdata) of the data voltage (Vdata) to drive the driving TFT (DT). The drive TFT DT is driven by the drive voltage (Vgs = Vref-Vdata) from the storage capacitor Cs even if the first and second switching TFTs ST1 and ST2 are turned off. Thus, the driving TFT DT supplies a current corresponding to the driving voltage Vgs to the OLED to emit light to the OLED.

8 and 9, in the data supply period A of the measurement mode, the first switch SW1 between the DAC 12 and the data line DL is turned on in response to the corresponding control signal of Fig. 9, And the second switch SW2 connected between the data line DL and the S / H circuit 14 is turned off and the sixth switch SW6 is turned on in response to the corresponding control signal (not shown) And connects the high potential power supply Vdd to the second power supply line PL2. The DAC 12 supplies the measurement data voltage Vdata to the data line DL via the first switch SW1. The reference voltage Vref and the measurement voltage Vdata are applied to the first and second nodes N1 and N2 by the first and second switching TFTs ST1 and ST2 of the pixel circuit in response to the first and second scan signals, The driving TFT DT is driven in accordance with the voltage Vref-Vdata stored in the storage capacitor Cs. At this time, the OLED does not emit light because a negative bias is applied thereto.

Then, the first switching TFT (ST1) is turned off in response to the scan signal of the first scan line (SL1) in the precharge period (B) of the measurement mode shown in Fig. 9, The precharge voltage V0 is precharged to the data line DL by supplying the precharge voltage V0 = Vref to the data line DL through the first switch SW1. The DAC 12 outputs the precharge voltage V0 other than the data supply period A. [

In the measurement period C shown in Figs. 8 and 9, the first switch SW1 is turned off in response to the corresponding control signal, and the second switch SW2 is turned on. 9, the pixel current flowing through the driving TFT DT of the pixel circuit flows through the parasitic capacitor Cline and the capacitor Ch connected in parallel with the data line DL via the data line DL The voltage of the data line DL rises from the base voltage V0. At this time, since the voltage of the data line DL rises in proportion to the pixel current, the second switch SW2 of the S / H circuit 14 is turned off at a specific time point and the data line DL Is read through the ADC 16, the pixel current I flowing through the driving TFT DT can be calculated by using the above-described expression (1) or (2).

FIG. 10 is a circuit diagram specifically showing a configuration of a data driver according to an embodiment of the present invention.

The data driver 10 shown in FIG. 10 includes a shift register 18, n DACs 12 connected to n output channels CH1 through CHn on a channel-by-channel basis, n output channels CH1 through CHn, N first switches SW1 connected between the n DACs 12 and n output channels CH1 through CHn on a channel-by-channel basis, n output channels N second switches SW2 connected between the n number of S / H circuits 14 and the n number of S / H circuits 14 connected to the input terminals of the n number of S / H circuits 14, The output of the n S / H circuits 14 is sequentially output to one analog-to-digital converter (ADC) 16 under the control of the capacitor Ch and the shift register 18 And a multiplexer (MUX) 15 for supplying the multiplexed data. The MUX 15 has n selection switches SS1 to SSn which are individually connected to the output terminals of the n S / H circuits 14 and commonly connected to the input terminal of one ADC 16. [

The data driver 10 also includes n output buffers connected in series between the n DACs 12 and n first switches SW1 and n output buffers sequentially connected to n DACs 12 And a first shift register and a latch unit for outputting the first shift register and the latch unit.

The n DACs 12 convert input data into data voltages in a display mode and a measurement mode, and supply the data voltages to the n output channels CH1 to CHn through n first switches SW1.

The n S / H circuits 14 sample and hold the voltages corresponding to the pixel currents from the n output channels (CH1 to CHn) through the n second switches (SW2) and the capacitor (Ch) do.

The shift register 18 sequentially shifts the sampling signal to the n output switches OS1 to OSn of the MUX 15 while shifting in response to the external AD clock in the measurement mode.

The n selection switches SS1 to SSn of the MUX 15 are sequentially turned on in response to the sampling signal from the shift register 18 so that the voltages held in the n S / H circuits 14, And supplies the voltage to the ADC 30 sequentially (on a channel-by-channel basis).

The ADC 30 converts the measured voltage from the S / H circuit 14, which is sequentially inputted through the MUX 15, into digital data and outputs the digital data to a timing controller for calculating an offset value and a gain value.

The timing controller detects the pixel current based on the measured voltage outputted from the ADC 30 in the measurement mode, calculates the offset value and the gain value using the detected pixel current, and stores it in the memory. The timing controller compensates the data using the offset value and the gain value stored in the memory in the display mode and outputs the compensated data to the data driver 10.

Fig. 11A shows a current waveform flowing in the driving TFT DT after the fifth switch SW5 is turned off in the measurement mode of the OLED display device shown in Fig. 4B. Fig. 11A shows three current waveforms when three driving voltages Vgs are 4V, 4.5V, and 5V. The current changes slightly in accordance with the drain-source voltage Vds of the driving TFT DT due to the influence of the channel length modulation in the saturation region of the driving TFT DT. For example, when the driving voltage Vgs is 5 V, the currents at t1 and t2 are 217.6 nA and 215.8 nA, respectively, and the average current is 216.7 nA.

11B shows the input waveform of the S / H circuit 14 after the fifth switch SW5 is turned off in the measurement mode of the OLED display shown in Fig. 4B. (V1 = 2.135V, V2 = 2.556V) at t1 (60μs) and t2 (160μs) when the driving voltage (Vgs) is 5V and 216.6nA The current of I = (Cline + Ch) × (V2-V1) / (t2-t1) = 50.3 × 10 -12 × (2.566-2.135) / (160-60) × 10 -6 = 216.6 nA is calculated . Vds can be represented by Vds = Vdd-Vs Vdd-VCh (where VCh is the input voltage of the S / H circuit 14) so that Vds is changed from Vds1 = Vdd-V1 to Vds2 = Vdd-V2 And the Vds when the average current 216.8 nA flows is within the range of Vds2 < Vds < Vds1. (Ids_av = 216.2 nA) flows when the average voltage (Vds_av = (Vds1 + Vds2) / 2) is Vds1≈Vds2.

As described above, the device for measuring the pixel current of the OLED display according to the first and second embodiments of the present invention uses a reference line or a data line as a current measurement line in a measurement mode, A pixel current flowing into the capacitor Cline + Ch is charged and the voltage charged in the capacitor is sampled and held to measure the pixel current flowing in the driving TFT sequentially at a high speed.

FIG. 12 is an equivalent circuit diagram showing a typical configuration of an OLED display device for measuring pixel current according to a third embodiment of the present invention, and FIG. 13 is a driving waveform diagram of a measurement mode of the OLED display device shown in FIG. 12 .

The OLED display device shown in FIG. 12 is different from the OLED display device of the first embodiment shown in FIG. 1 in that a measuring section 50 is formed on a display panel 40 with a first power There is a difference in that the current of each pixel P is measured by the voltage through the line PL1.

12 includes a display panel 40 including a pixel array, a data driver 30 for driving a data line DL of the display panel 40 in a display mode and a measurement mode, A high-potential power supply Vdd is supplied to the first power supply line PL1 of the display panel 40 in the display mode and the measurement mode, and the current of each pixel is supplied as a voltage through the first power supply line PL1 in the measurement mode And a measuring unit 50 for measuring and outputting the measured value. In addition, a scan driver and a timing controller are further provided, but they are the same as those in the conventional art and will be omitted for convenience of explanation.

The data driver 30 converts the input data to the data voltage Vdata via the DAC 32 in the display mode and the measurement mode and supplies the data to the data line DL. The DAC 32 is connected to the data line DL on a channel-by-channel basis.

The measuring section 50 supplies the high potential power supply Vdd to the first power supply line PL1 through the first switch SW1 in the display mode and the measurement mode. The measuring section 50 turns off the first switch SW1 in the measuring period of the measuring mode and supplies the driving current of the driving TFT DT of each pixel P, And outputs the measured voltage through the ADC 52 and outputs it. The ADC 52 is connected to the first power supply line PL1 for each channel.

The pixel circuit of each pixel P shown in FIG. 12 includes an n-type switching circuit which supplies a data voltage Vdata from the data line DL to the first node N1 in response to a scan signal of the scan line SL, A p-type driver TFT DT having a gate electrode connected to the first node N1 and having a first power supply line PL1 and a source electrode and a drain electrode connected to the OLED, And a storage capacitor Cs connected between the first node N1 and the second node N1 to which the source electrodes of the drive TFT DT and the drive TFT DT are commonly connected. The first power line PL1 is arranged in parallel to the data line DL and the pixel P1 is disposed between the data line DL and the first power line PL1. The number is equal to the number of data lines DL.

When the n-type switching TFT ST is turned on in response to the scan signal of the scan line SL in the display mode, the storage capacitor Cs is turned on by the data voltage DL supplied from the data line DL through the switching TFT ST Type driving TFT DT by charging the differential voltage Vdata-Vdd between the first power supply line Vdata and the high potential power supply Vdd supplied to the first power supply line PL1, And emits light in proportion to the driving current.

13, in the data supply period A of the measurement mode, the first switch SW1 is turned on in response to the corresponding control signal so that the high-potential power supply Vdd is connected to the first power supply line PL1 . The DAC 32 supplies the measurement data voltage Vdata to the data line DL. Then, the switching TFT (ST) of the pixel circuit supplies the measurement voltage (Vdata) to the first node (N1) in response to the gate-on voltage which is the scan signal of the scan line (SL). The storage capacitor Cs is connected between the measurement data voltage Vdata supplied from the data line DL through the switching TFT ST and the high potential power supply Vdd supplied to the first power supply line PL1. And drives the p-type driving TFT DT by charging the differential voltage Vdata-Vdd.

Next, before the first switch SW1 is turned off in the period B between the data supply period A and the measurement period C of the measurement mode shown in Fig. 13, the scan signal of the scan line SL The switching TFT ST is turned off in response to the gate off voltage so that the storage capacitor Cs maintains the charging voltage Vdata-Vdd to drive the driving TFT DT. At this time, the first switch SW1 maintains the turn-on state and thus maintains the supply of the high-potential power supply Vdd to the first power supply line PL1.

Next, in the measurement period C shown in FIG. 13, the first switch SW1 is turned off in response to the corresponding control signal so that the supply of the high-potential power supply Vdd is cut off to the first power supply line PL1 . Thus, the current from the parasitic capacitor Cvdd connected in parallel with the first power supply line PL1 is supplied to the first power supply line (Vdd) while the current flows from the parasitic capacitor Cvdd through the drive TFT DT of the pixel circuit without supplying current from the high- PL1) falls linearly. FIG. 14 shows an equivalent circuit for a path through which the pixel current flows in the measurement period C shown in FIG. 13. When the first switch SW1 is turned off, the parasitic capacitors of the first power line PL1 It can be seen that the voltage of the first power supply line PL1 is decreased while the current from the second power supply line Cvdd flows through the driving TFT DT.

At this time, since the voltage of the first power supply line PL1 falls according to the discharge of the pixel current, when the voltage of the first power supply line PL1 is read through the ADC 52 at the specific time points t1 and t2, The pixel current flowing in the driving TFT DT can be calculated by using the equation (3).

&Quot; (3) &quot;

I = Cvdd x (V1 - V2) / (t2 - t1)

In the equation (3), I represents the pixel current, Cvdd represents the capacitance of the parasitic capacitor (Cvdd) connected in parallel to the first power supply line (PL1), and V1 and V2 represent t1 And the voltage of the first power supply line PL1 detected at the time t2.

On the other hand, when the voltage Vdd of the first power supply line PL1 at the start point t0 of the discharge period is used, the voltage of the first power supply line PL1 is measured only once at the time point t2, The pixel current I can be obtained.

&Quot; (2) &quot;

I = Cvdd (Vdd-V2) / (t2-t0)

Thus, the ADC 52 of the measuring unit 50 measures the current of each pixel in the measurement mode as a voltage through the first power supply line PL1 and outputs it to the timing controller.

15 is an equivalent circuit diagram showing a typical configuration of an OLED display device for measuring pixel current according to the fourth embodiment of the present invention.

The OLED display according to the fourth embodiment shown in Fig. 15 is the same as the OLED display according to the third embodiment shown in Fig. 12 except that the measuring unit 50 is built in the data driver 60 The description of the redundant components will be omitted since they are provided for the components.

15, the data driver 60 drives the data line DL of the display panel 40 through the DAC 32 in the display mode and the measurement mode, and also drives the data line DL through the first switch SW1 And supplies the high potential power supply Vdd to the power supply line PL1. The data driver 60 turns on the pixel P (n) driven by measuring the voltage on the first power supply line PL1 through the ADC 52 after turning off the first switch SW1 in the measurement period C of the measurement mode, ) As a voltage and outputs the measured pixel current. The number of data lines DL in the display panel 40 is equal to the number of the first power supply lines PL1 and the DAC 32 is connected to the data lines DL on a channel by channel basis, And is connected to the power supply line PL1 on a channel-by-channel basis.

16 is a circuit diagram showing a configuration of a data driver according to another embodiment of the present invention.

The data driver 70 shown in Fig. 16 may be applied instead of the data driver 60 shown in Fig. The data driver 70 shown in Fig. 16 includes n DACs 32 connected to n data lines DL1 through DLn and a plurality of n DACs 32 commonly connected to a high potential power supply common line PCL, N first switches SW1 connected to the lines PL11 through PL1n and n first power lines PL11 through PL1n and n S / H circuits 72 connected on a channel-by-channel basis, n A MUX 74 having n selection switches SS1 to SSn for sequentially outputting the output of the S / H circuit 72 to one ADC 52 and a S / H circuit And a shift register 76 for controlling the output order of the output registers 72. Each of the n S / H circuits 14 has a switch SW2 and a capacitor Ch as shown in Fig. 10 described above.

In addition, the data driver 10 includes n output buffers individually connected between n DACs 12 and n first switches SW1, and input buffers sequentially input to n DACs 12 And a first shift register and a latch unit for outputting the first shift register and the latch unit.

The n DACs 32 convert the input data into data voltages in the display mode and the measurement mode and supply the data voltages to the n data lines DL1 to DLn, respectively.

The n first switches SW1 are turned on in the display mode and the A and B periods of the measurement mode (Fig. 13) to supply the high potential voltage Vdd to the n first power supply lines PL11 to PL1n, respectively And is turned off in the C period (voltage measurement period) of the measurement mode to float the n first power supply lines PL11 to PL1n, thereby separating the first power supply lines PL11 to PL1n.

The n S / H circuits 72 sample and hold the voltages corresponding to the pixel currents supplied from the n first power supply lines PL11 through PL1n in the C period (FIG. 13) of the measurement mode.

The shift register 76 performs a shift operation in response to an AD clock from the outside in a measurement mode and outputs a sequential sampling signal to the n selection switches SS1 to SSn of the MUX 74. [

The n selection switches SS1 to SSn of the MUX 74 are sequentially turned on in response to the sampling signal from the shift register 76 so that the voltages held in the n S / H circuits 72, And supplies the voltage to the ADC 52 sequentially (on a channel-by-channel basis).

The ADC 52 converts the measured voltage from the S / H circuit 74, which is sequentially inputted through the MUX 74, into digital data and outputs the digital data to a timing controller for calculating an offset value and a gain value.

The timing controller detects the pixel current based on the measured voltage output from the ADC 52 in the measurement mode, calculates an offset value and a gain value using the detected pixel current, and stores the offset value and the gain value in the memory. The timing controller compensates the data using the offset value and the gain value stored in the memory in the display mode and outputs the compensated data to the data driver 70.

17 is an equivalent circuit diagram showing a typical configuration of an OLED display device for measuring pixel current according to the fifth embodiment of the present invention.

The OLED display according to the fifth embodiment shown in FIG. 17 is different from the OLED display according to the third embodiment shown in FIG. 12 in that the display panel 70 is connected to the pixel P, And a reference common line RCL in which a plurality of reference lines RL are connected in common and a scan line SL which is the same as the first switching TFT ST1 in a pixel circuit are shared And a second switching TFT ST2 for supplying a reference voltage Vref from the reference line RL to the second node N2 and the driving TFT DT is connected to the first and second switching TFTs ST1 , And ST2), the description of the overlapping components will be omitted. The measuring unit 50 shown in Fig. 17 can be incorporated in the data driver 30 as shown in Fig.

17, in the corresponding scan period of the display mode, the first and second switching TFTs ST1 and ST2 are turned on, so that the storage capacitor Cs is turned on by the difference voltage (Vdata) between the data voltage Vdata and the reference voltage Vref (Vdata-Vref) to drive the driving TFT DT.

In the measurement mode, the driving waveform diagram of the third embodiment shown in FIG. 13 is applied to the OLED display according to the fifth embodiment shown in FIG.

17 and 13, in the data supply period A of the measurement mode, the first and second switching TFTs ST1 and ST2 are turned on simultaneously in response to the gate-on voltage, which is a scan signal of the scan line SL. The storage capacitor Cs is turned on and the difference between the data voltage for measurement Vdata from the first switching TFT ST1 and the reference voltage Vref from the second switching TFT ST2 is Vdata- To drive the driving TFT DT.

Next, the first and second switching TFTs ST1 and ST2 are turned off in response to a gate-off voltage which is a scan signal of the scan line SL in the B period (FIG. 13), and the storage capacitor Cs is turned off And maintains the charging voltage Vdata-Vref to drive the driving TFT DT. At this time, the first switch SW1 maintains the turn-on state and maintains the supply of the high-potential power supply Vdd to the first power supply line PL1.

In the measurement period C (Fig. 13), the parasitic capacitor Cvdd connected in parallel with the first power supply line PL1 without supplying the current from the high-potential power supply Vdd by turning off the first switch SW1 ) Flows through the drive TFT DT of the pixel circuit, the voltage of the first power supply line PL1 falls linearly. Accordingly, the voltage of the first power supply line PL1 is measured through the ADC 52 at the specific time points t1 and t2, and the pixel current flowing through the driving TFT DT is calculated by using Equation (3) or (4) Can be calculated.

FIG. 18 is an equivalent circuit diagram showing a typical configuration of an OLED display device for measuring pixel current according to a sixth embodiment of the present invention, and FIG. 19 is a driving waveform diagram of a measurement mode of the OLED display device shown in FIG.

The OLED display according to the sixth embodiment shown in FIG. 18 is different from the OLED display according to the fifth embodiment shown in FIG. 17 in that the ADC 52 or the S / The circuit 72 shares the data channel CH with the DAC 32 and the second switch SW2 connected between the high potential common line PCL and the first power supply line PL1 in the display panel 90, A third switch SW3 connected between the data line DL and the first power line PL1 and control lines CL1 and CL2 for controlling the second and third switches SW2 and SW3 The description of the overlapping components will be omitted.

In the data driver 80 shown in FIG. 18, the DAC 32 is connected to the output channel CH connected to the data line DL on a channel-by-channel basis through the first switch SW1. The ADC 52 or the S / H circuit 72 is connected in parallel with the DAC 32 to the output channel CH and shares the output channel CH with the DAC 32. The ADC 52 or the S / H circuit 72 is connected to the first power supply line PL1 through the output channel CH and the data line DL in the measurement mode. The number of output channels CH of the data driver 80 can be increased without increasing the number of data lines DL even when the data driver 80 incorporates a measurement circuit including the ADC 52 or the S / Can be kept equal to the number of

The display panel 90 shown in Fig. 18 includes a reference common line RCL (not shown) for supplying a reference voltage Vref from the outside to the reference line RL in parallel with the data line DL in addition to the pixel P shown in Fig. A high potential common line PCL for supplying a high potential power supply Vdd from the outside to a first power supply line PL1 side by side with the data line DL, A third switch SW3 connected between the first power supply line PL1 and the data line DL on a channel-by-channel basis, a second switch SW2 connected between the first power supply line PL1 and the data line DL, And first and second control lines CL1 and CL2 for controlling the switches SW2 and SW3, respectively.

The second switch SW2 is turned on in the display mode in response to the first control signal from the first control line CL1 and is turned on in the supply period A of the high potential power supply Vdd in the measurement mode shown in Fig. And B so as to supply the high potential power supply Vdd from the high potential common line HCL to the first power supply line PL1 and turn off in the measurement period C to turn off the high potential power supply Vdd ).

The third switch SW3 is turned off in the display mode in response to the second control signal from the second control line CL2 and is supplied to the high potential power supply Vdd supply period A of the measurement mode shown in Fig. And is turned on in the pre-charge period B and the measurement period C to connect the first power line PL1 to the data line DL on a channel-by-channel basis. The third switch SW3 is turned on before the second switch SW2 is turned off so as to precharge the data line DL to the high potential power supply Vdd before the measurement period C. [

18, in the display mode, the first switch SW1 of the data driver 80 and the second switch SW2 of the display panel 90 are turned on, and the third switch SW3 is turned- Off. The first and second switching TFTs ST1 and ST2 are turned on in the corresponding horizontal period in which the gate-on voltage is supplied to the scan line SL, so that the storage capacitor Cs is turned on to supply the data voltage Vdata and the reference voltage Vref, (Vdata-Vref) of the driving TFT DT to drive the driving TFT DT.

18 and 19, in the data supply period A of the measurement mode, the first switch SW1 of the data driver 80 and the second switch SW2 of the display panel 90 are turned on And the third switch SW3 is turned off. The first and second switching TFTs ST1 and ST2 are turned on during the corresponding scan period in which the gate-on voltage is supplied to the scan line SL so that the storage capacitor Cs is turned on for the measurement from the first switching TFT And charges the difference voltage (Vdata-Vref) between the data voltage (Vdata) and the reference voltage (Vref) from the second switching TFT (ST2) to drive the driving TFT (DT).

Then, the first and second switching TFTs ST1 and ST2 are turned off in response to the gate-off voltage of the scan line SL in the precharge period B shown in Fig. 19, and the storage capacitor Cs is turned on, Maintains the charging voltage Vdata-Vref and drives the driving TFT DT. The second switch SW2 maintains the turn-on state in the precharge period B and maintains the supply of the high-potential voltage Vdd to the first power supply line PL1. The third switch SW3 is turned on at an intermediate point of the B period to precharge the data line DL with the same high-potential voltage Vdd as the first power supply line PL1. The first switch SW1 is turned off at an intermediate point of the precharge period B as opposed to the third switch SW3 and is turned on when the high potential power supply Vdd is precharged to the data line DL. 32) and the data line (DL).

19, the first switch SW1 maintains the turn-off state and the second switch SW2 is turned off by the gate-off voltage so that the high-potential power supply Vdd The current from the parasitic capacitors Cvdd and Cdata connected in parallel with the first power supply line PL1 and the data line DL is supplied to the first power supply line PL1 while flowing through the drive TFT DT of the pixel circuit, And the data line DL are linearly lowered in accordance with the pixel current. Accordingly, the voltage of the first power supply line PL1 is measured and outputted by the ADC 52 via the data line DL and the output channel CH at specific time points t1 and t2.

Accordingly, the timing controller can calculate the pixel current flowing in the driving TFT DT by using the measured voltages (V2, V1) from the data driver 80 and the following equation (5).

Equation (5)

I = (Cdata + Cvdd) (V1 - V2) / (t2 - t1)

Where Cdata denotes a capacitance of the parasitic capacitor Cdata connected in parallel to the data line DL and Cvdd denotes a capacitance of the parasitic capacitor Cvdd connected in parallel to the first power supply line PL1, And V1 and V2 represent the voltages of the output channels CH detected at the time points t1 and t2 respectively in the C period of the measurement mode shown in Fig.

20A is an equivalent circuit diagram for simulating an OLED display device for measuring the pixel current according to the present invention. FIG. 20B is a graph showing an equivalent circuit diagram for measuring the voltage of the first power line PL1 after the first switch SW1 is turned off in FIG. 20A 20C is a waveform diagram showing the current flowing in the drive TFT DT of FIG. 20A measured in the measurement mode. FIG.

20A and 20B show four voltage waveforms and current waveforms when the data voltages Vdata are 3V, 4V, 4.5V, and 5V.

20A, when the data voltages Vdata are 3V, 4V, 4.5V, and 5V, the voltages are calculated using the voltages measured at t1 (= 60usec) and t2 (= 80usec) and Equation 1 (Cvdd = 10PF) The currents are 36.82 nA, 108.16 nA, 160.52 nA, and 224.49 nA, respectively.

20B, when the data voltages Vdata are 3V, 4V, 4.5V and 5V, the average values of the currents at t1 (= 60usec) and t2 (= 80usec) are 36.83nA, 108.15nA, 160.48nA and 224.51nA, respectively .

Therefore, the pixel current calculated by measuring the voltage of the first power supply line PL1 in FIG. 20A is within 0.1% of the average current of the pixel directly measured in FIG. 20B, .

As described above, the OLED display device for measuring the pixel current according to the present invention and the pixel current measuring method thereof are capable of measuring the pixel current flowing through the driving TFT through the first power line PL1, which is parallel to the data line DL, So that the pixel current can be sequentially measured at high speed.

In addition, the OLED display and the pixel current measurement method for measuring the pixel current according to the present invention can measure each pixel current at a high speed with a simple configuration through a data driver. Accordingly, in the present invention, not only the inspection process before the product shipment but also the measurement mode is inserted between display modes in which the OLED display device is driven even after the product is shipped, and each pixel current is measured to determine not only the characteristic drift of the initial driving TFT, It is possible to increase the lifetime and image quality of the OLED display device.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, but, on the contrary, And the like. Accordingly, such modifications are deemed to be within the scope of the present invention, and the scope of the present invention should be determined by the following claims.

10, 30, 60, 70, 80: Data driver 12, 32: DAC
14, 72: S / H circuit 15, 74: MUX
16, 52: ADC 18, 76: Shift register
20, 40, 70, 90: display panel 50:

Claims (37)

  1. Each pixel including a light emitting element and a pixel circuit for independently driving the light emitting element;
    A reference line for supplying a reference voltage to the data line and the pixel circuit in the display panel after driving a data line connected to the pixel circuit using a data voltage in a measurement mode, And a data driver which uses one of the first power supply lines to supply a current as a current measurement line and measures and outputs a voltage corresponding to a pixel current of the pixel circuit flowing to the current measurement line;
    Wherein the data driver comprises: a driver for driving the data line; and a measurement unit for measuring and outputting a voltage of the current measurement line.
  2. The method according to claim 1,
    Wherein the driver of the data driver includes a digital-to-analog converter for supplying a data voltage to the data line through an output channel;
    The measuring unit of the data driver
    A sampling and holding circuit connected in parallel to the digital-analog converter and the output channel for sampling and holding the voltage of the current measuring line and outputting the voltage as the measuring voltage;
    And an analog-to-digital converter converting the measured voltage from the sampling and holding circuit into digital data and outputting the digital data.
  3. The method of claim 2,
    The measuring unit of the data driver
    A shift register for sequentially outputting sampling signals in the measurement mode;
    And a multiplexer for sequentially outputting a plurality of outputs of the sampling and holding circuit to the analog-to-digital converter in response to the sampling signal.
  4. The method according to claim 2 or 3,
    Further comprising a power switch for connecting the second power line connected to the cathode of the light emitting element to the low potential power source or the high potential power source;
    The driving unit of the data driver further comprises a first switch connected between the digital-analog converter and the output channel on a channel-by-channel basis;
    Wherein the measuring unit of the data driver further comprises a second switch connected between the output channel and the sampling and holding circuit on a channel-by-channel basis;
    Wherein the power switch connects the low potential power supply to the power supply line in a display mode, connects the high potential power supply to the power supply line in the measurement mode,
    Wherein the first switch connects the digital-analog converter with the output channel in the display mode and the data supply period of the measurement mode,
    And the second switch connects the output channel with the sampling and holding circuit during a measurement period of the measurement mode, as opposed to the first switch.
  5. The method of claim 4,
    The display panel
    A third switch connected between the output channel of the data driver and the data line for each channel,
    A fourth switch connected between the output channel and the reference line for each channel,
    A reference common line for supplying the reference voltage and a fifth switch connected between the reference line and the reference line,
    The third switch connects the output channel with the data line in the display mode and the data supply period of the measurement mode,
    The fourth switch connects the output channel with the reference line in the measurement period of the measurement mode,
    And the fifth switch connects the reference common line with the reference line in the display mode and the data supply period of the measurement mode.
  6. The method of claim 5,
    The second, fourth, and fifth switches are turned on and connected to the sampling and holding circuit in the precharge period existing between the data supply period and the measurement period of the measurement mode, Wherein the pre-charge is precharged to the reference voltage from the line.
  7. The method of claim 6,
    The pixel circuit
    A driving TFT connected between the first and second power supply lines in series with the light emitting element to drive the light emitting element,
    A first switching TFT for supplying a data voltage from the data line to a first node connected to a gate electrode of the driving TFT in response to a first scan signal of the first scan line;
    A second switching TFT for supplying the reference voltage from the reference line to a second node connected between the driving TFT and the light emitting element in response to a second scan signal of the second scan line;
    And a storage capacitor which charges the voltage between the first and second nodes and supplies the charged voltage to the driving voltage of the driving TFT;
    In the measurement mode, the first switching TFT is turned on only in the data supply period,
    In the measurement mode, the second switching TFT is turned on from the data supply period to the measurement period, and in the measurement period, the pixel current from the drive TFT flows to the reference line,
    Wherein the measuring unit measures and outputs a voltage rising in proportion to the pixel current through the reference line and the output channel during the measurement period.
  8. The method of claim 4,
    The pixel circuit
    A driving TFT connected between the first and second power supply lines in series with the light emitting element to drive the light emitting element,
    A first switching TFT for supplying the reference voltage from the reference line to a first node connected to a gate electrode of the driving TFT in response to a first scan signal of the first scan line;
    A second switching TFT for supplying the data voltage from the data line to a second node connected between the driving TFT and the light emitting element in response to a second scan signal of the second scan line;
    And a storage capacitor which charges the voltage between the first and second nodes and supplies the charged voltage to the driving voltage of the driving TFT;
    In the measurement mode, the first switching TFT is turned on only in the data supply period,
    The second switching TFT is turned on from the data supply period of the measurement mode to the measurement period and causes the pixel current from the drive TFT to flow to the data line in the measurement period,
    Wherein the measuring unit measures and outputs a voltage rising in proportion to the pixel current through the data line and the output channel during the measurement period.
  9. The method of claim 8,
    The first switch is turned on in a precharge period existing between the data supply period and the measurement period of the measurement mode and supplies the precharge voltage from the digital-analog converter to the data line OLED display for measuring pixel current.
  10. Each pixel including a light emitting element, a pixel circuit for independently driving the light emitting element, and a data line and a first power supply line connected to the pixel circuit and arranged parallel to each other;
    A data driver for supplying a data voltage to the data lines in a display mode and a measurement mode;
    And supplies a high-potential power supply to the first power supply line for driving the pixel circuit in the display mode and the measurement mode, and stops supply of the high-potential power supply to the first power supply line in the measurement period of the measurement mode And a measuring unit for measuring and outputting a voltage corresponding to a pixel current of the pixel circuit using the first power supply line as a current measuring line.
  11. The method of claim 10,
    The measuring unit
    A first switch connected between the high potential power supply common line for supplying the high potential power and the first power supply line for each channel;
    An analog-to-digital converter for measuring a voltage on the first power supply line, converting the measured voltage into digital data, and outputting the digital data;
    Wherein the first switch is turned off only during a measurement period of the measurement mode.
  12. The method of claim 10,
    The measuring unit
    A high-potential power supply common line for supplying the high-potential power supply; a first switch connected between the first power supply line and the first switch;
    A sampling and holding circuit connected to the first power supply line on a channel-by-channel basis, for sampling and holding a voltage of the first power supply line in the measurement mode and outputting the measured voltage as the measurement voltage;
    A shift register for sequentially outputting sampling signals in the measurement mode;
    A multiplexer for sequentially outputting a plurality of outputs of the sampling and holding circuit in response to the sampling signal;
    And an analog-to-digital converter converting the output voltage of the multiplexer into digital data and outputting the digital data.
  13. The method according to claim 11 or 12,
    And the measuring unit is embedded in the data driver.
  14. The method of claim 10,
    The pixel circuit
    A p-type driver TFT connected between the first power supply line and the second power supply line in series with the light emitting element to drive the light emitting element,
    A switching TFT for supplying the data voltage from the data line to a first node connected to a gate electrode of the driving TFT in response to a scan signal of the scan line;
    And a storage capacitor for charging a voltage between the first node and a second node connected in common between the first power supply line and the drive TFT and supplying the voltage to the drive voltage of the drive TFT. OLED display device.
  15. The method of claim 10,
    Wherein the display panel further comprises a reference line for supplying a reference voltage to the pixel circuit,
    The pixel circuit
    A driving TFT connected between the first power supply line and the second power supply line in series with the light emitting element to drive the light emitting element,
    A first switching TFT for supplying the data voltage from the data line to a first node connected to a gate electrode of the driving TFT in response to a scan signal of the scan line;
    A second switching TFT for supplying the reference voltage from the reference line to a second node connected between the driving TFT and the light emitting element in response to a scan signal of the scan line;
    And a storage capacitor for charging a voltage between the first and second nodes to supply the driving voltage to the driving TFT.
  16. The method of claim 10,
    The display panel
    A reference line for supplying a reference voltage to the pixel circuit,
    A high potential common line for supplying the high potential power,
    A second switch connected between said high potential common line and said first power supply line for each channel and switching connection between said high potential common line and said first power supply line in response to a first control signal of a first control line, Wow;
    Further comprising a third switch connected between the data line and the first power line for each channel and switching a connection between the data line and the first power line in response to a second control signal of the second control line and,
    Wherein the measuring unit measures and outputs the voltage on the first power line through the data line and the third switch in the measurement period of the measurement mode.
  17. 18. The method of claim 16,
    The data driver
    A digital-to-analog converter for supplying the data voltage to the data line through an output channel;
    A first switch connected between the digital-analog converter and the output channel on a channel-by-channel basis;
    And a measuring unit connected in parallel to the digital-analog converter and the output channel, for measuring and outputting a voltage on the first power line through the data line connected to the output channel and the third switch. OLED display device for pixel current measurement.
  18. 18. The method of claim 17,
    Wherein the first switch supplies a data voltage from the digital-analog converter to the data line via the output channel in a data supply period of the measurement mode, and the second switch supplies a data voltage from the high- Supplying power to the first power line;
    In the measurement period of the measurement mode, the first and second switches are turned off, the third switch is turned on, the data line connected to the output channel, and the first switch And the voltage on the power supply line is measured.
  19. 19. The method of claim 18,
    The third switch is turned on and the first switch is turned off before the second switch is turned off in the data supply period of the measurement mode and the precharge period of the measurement period, Line and an output channel to the high-potential power supply.
  20. The method according to claim 1 or 10,
    In the measurement mode, the pixel current is calculated using the measured voltage output from the data driver, the measurement period, and the capacitance of the capacitor connected in parallel with the current measurement line, and the compensation value is calculated using the calculated pixel current Wherein the OLED display device further comprises a timing controller for storing the OLED display data.
  21. The method of claim 20,
    Wherein the timing controller is configured to measure the measurement voltage (V1, V2) for measuring and outputting the voltage on the current measurement line in the data driver, the measurement time (t1, t2) And the capacitance (C) of the capacitor connected in parallel with the pixel current (I), the pixel current (I) is calculated by the following equation (1).
    &Quot; (1) &quot;
    I = C (V2 - V1) / (t2 - t1)
    Here, V1 and V2 are measured voltages at the time t1 and t2, respectively.
  22. 23. The method of claim 21,
    Wherein the capacitance is a sum of a capacitance of a parasitic capacitor existing in the current measurement line and a capacitance of a capacitor connected in parallel to an input terminal of the measurement unit.
  23. 23. The method of claim 21,
    Wherein the capacitance is a sum of a capacitance of a parasitic capacitor existing in the first power supply line and a parasitic capacitance existing in the data line.
  24. A method for measuring each pixel current of an OLED display,
    Supplying a data voltage to a pixel circuit in a data supply period of the measurement mode to drive the pixel circuit;
    Wherein one of the data line connected to the pixel circuit, the reference line, and the first power supply line is used as a current measurement line in a measurement period of the measurement mode, and the pixel current And outputting the measured voltage to the OLED display device.
  25. 27. The method of claim 24,
    Supplying the data voltage through the output channel to the data line through a first switch connected between the digital-analog converter and an output channel of the data driver in the data supply period,
    During the measurement period, the voltage on the current measurement line is sampled and held in parallel through the first switch and the output channel in the data driver through a second switch operating in opposition to the first switch And converting the measured voltage into digital data and outputting the digital data.
  26. 26. The method of claim 25,
    In the data supply period, the output channel of the data driver is connected to the data line through the third switch, the fourth switch between the output channel and the reference line is turned off, and the reference line A reference voltage is supplied,
    The third and fifth switches are turned off and the reference line is connected to the output channel through the fourth switch to measure a voltage corresponding to the pixel current through the reference line in the measurement period Of the pixel current of the OLED display.
  27. 27. The method of claim 26,
    Further comprising the step of pre-charging the output channel with the reference voltage from the reference line in a precharge period between the data supply period and the measurement period, wherein the second, fourth and fifth switches are turned on Wherein the OLED display comprises a plurality of pixels.
  28. 26. The method of claim 25,
    Measuring a voltage corresponding to the pixel current through the second switch and the data line in the measurement period,
    Further comprising the step of supplying the pre-charge voltage from the digital-analog converter to the data line in the precharge period between the data supply period and the measurement period, wherein the first switch is turned on, Of the pixel current of the OLED display.
  29. A method for measuring each pixel current of an OLED display,
    Wherein each pixel includes a light emitting element, a pixel circuit for independently driving the light emitting element, and a data line and a first power line connected to the pixel circuit and arranged parallel to each other,
    Supplying a data voltage to the data line in a data supply period of the measurement mode and supplying a high potential power to the first power supply line to drive the pixel circuit;
    In the measurement period of the measurement mode, the supply of the data voltage from the data line to the pixel circuit is cut off, and after the supply of the high potential power to the first power source line is cut off, And measuring and outputting a voltage corresponding to the pixel current of the pixel circuit using the measured current as a current measurement line.
  30. 29. The method of claim 29,
    In the data supply period, the first switch between the high potential power supply common line for supplying the high potential power and the first power supply line is turned on,
    In the measurement period, the first switch is turned off and measures the voltage on the first power supply line, converts the measured voltage into digital data and outputs it,
    The supply of the data voltage from the data line to the pixel circuit is interrupted between the data supply period and the measurement period and then the supply of the high potential power is maintained to the first power supply line through the first switch Further comprising the step of: measuring a current flowing through the OLED display.
  31. 29. The method of claim 29,
    Wherein the driving TFT of the pixel circuit is driven using the difference voltage between the data voltage and the high potential power supply in the data supply period.
  32. 29. The method of claim 29,
    The OLED display further comprises a reference line for supplying a reference voltage to the pixel circuit,
    Wherein the driving TFT of the pixel circuit is driven using the difference voltage between the data voltage and the reference voltage in the data supply period.
  33. 29. The method of claim 29,
    The OLED display device
    A first switch connected between the digital-to-analog converter and the output channel in the data driver;
    And a second control line connected in common between the high potential common line for supplying the high potential power to the display panel and the first power line, A second switch for switching a connection between the first switch and the second switch;
    A third switch connected between the data line and the first power supply line in the display panel on a channel-by-channel basis and switching a connection between the data line and the first power supply line in response to a second control signal of the second control line; Further comprising:
    Supplying the data voltage to the data line through the first switch in the data supply period and supply the high potential power to the first power line through the second switch,
    Wherein the first and second switches are turned off and measure and output the voltage on the first power supply line through the data line and the third switch in the measurement period, How to measure.
  34. 34. The method of claim 33,
    In the precharge period of the data supply period and the measurement period, the third switch is turned on before the second switch is turned off, and the first switch is turned off so that the data line and the output channel Further comprising the step of precharging the OLED display to the high potential power supply.
  35. The method of claim 24 or 29,
    Calculating the pixel current using the measured voltage, the measurement period, and a capacitance of a capacitor connected in parallel with the current measurement line in the measurement mode, calculating and storing a compensation value using the calculated pixel current, The method comprising the steps of: (a)
  36. 36. The method of claim 35,
    The pixel current (I)
    (1) using the measured voltages (V1 and V2), the measurement times (t1 and t2) of the measured voltages, and the capacitance (C) of the capacitors connected in parallel with the current measurement line Wherein the OLED display comprises a plurality of pixels.
    &Quot; (1) &quot;
    I = C (V2 - V1) / (t2 - t1)
    Here, V1 and V2 are measured voltages at the time t1 and t2, respectively.
  37. 37. The method of claim 36,
    Wherein the capacitance is a sum of a capacitance of a parasitic capacitor existing in the first power supply line and a parasitic capacitance existing in the data line.
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