KR101874105B1 - Multiband Hybrid Frequency Synthesizer - Google Patents
Multiband Hybrid Frequency Synthesizer Download PDFInfo
- Publication number
- KR101874105B1 KR101874105B1 KR1020170107770A KR20170107770A KR101874105B1 KR 101874105 B1 KR101874105 B1 KR 101874105B1 KR 1020170107770 A KR1020170107770 A KR 1020170107770A KR 20170107770 A KR20170107770 A KR 20170107770A KR 101874105 B1 KR101874105 B1 KR 101874105B1
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- signal
- switching unit
- frequency
- unit
- reference signal
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/02—Digital function generators
- G06F1/022—Waveform generators, i.e. devices for generating periodical functions of time, e.g. direct digital synthesizers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/22—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop
Abstract
Description
The present invention relates to a multi-band hybrid frequency synthesizer, and more particularly, to a multi-band hybrid frequency synthesizer capable of oscillating in a wide band and capable of obtaining stable phase noise characteristics, fast switching and high resolution characteristics in frequency synthesis, Band hybrid frequency synthesizer.
Generally, a frequency synthesizer includes a phase locked loop (PLL) to obtain a low phase noise characteristic and a stable output frequency, and a PLL controls a voltage controlled oscillator (VCO) It is possible to oscillate a signal of a fixed frequency (or phase). Particularly, in the frequency synthesis for a high frequency having a low phase noise characteristic, a high-frequency band signal is oscillated using a multiplier in a single loop structure, or an up-mixing or a down- ) Frequency synthesizer is used. However, the single-loop frequency synthesizer has a problem of poor phase noise characteristics in the high frequency band, and the duplex or multi-loop frequency synthesizer has a problem in miniaturizing the frequency synthesizer due to its complicated structure. There is a problem in that the resolution is limited.
In recent years, it is a trend to solve the problems of the frequency synthesizer of the PLL structure by using a direct digital synthesis (DDS). However, in case of DDS-type frequency synthesizer, there is a problem that unnecessary spurious wave may occur when it is used as a local oscillator of a RF transceiver having a narrow bandwidth and a heterodyne structure.
It is an object of the present invention to solve the phase noise and resolution problem of the frequency synthesizer of the PLL structure and the narrow band and spurious problem of the DDS type frequency synthesizer, And a multi-band hybrid frequency synthesizer capable of multi-band (or broadband) frequency synthesis.
According to an aspect of the present invention, a multi-band hybrid frequency synthesizer includes a first reference signal source for providing a first reference signal and a second reference signal source for providing a second reference signal having a higher frequency than the first reference signal. A reference signal part composed of two reference signal sources; A first switching unit for switching any one of the first reference signal and the second reference signal; A direct digital synthesizer for directly digitally synthesizing any one of the first reference signal and the second reference signal switched through the first switching unit; A second switching unit for distributing the signal through the direct digital combining unit through switching; A low-pass filter bank unit for removing spurious components of a signal distributed through the second switching unit; A third switching unit for switching a signal passed through the low-pass filter bank unit and inputting the signal through a phase locked loop; A signal obtained by dividing a signal input through the third switching unit by an R counter which is a reference counter of a first division unit and a signal obtained by dividing a signal received through feedback from a second division unit divider by a division ratio N is phase- A phase locked loop for comparing and fixing the phase until the incoming signal through the feedback matches the signal input through the third switching unit; A voltage controlled oscillator for outputting a signal through the phase locked loop; A divider for dividing and outputting a frequency signal output through the voltage control oscillation unit; A fourth switching unit for switching the frequency signal output from the divider to one of the band selection amplifying circuit units; A band selection amplifier circuit part for broad-band oscillating the frequency signal input through the fourth switching part; And a control unit for controlling the switching of the first switching unit, the second switching unit, the third switching unit and the fourth switching unit according to the magnitude of the output frequency of the frequency signal output from the voltage control oscillation unit or the purpose of using the frequency synthesizer Including,
Wherein the low-pass filter bank unit comprises: a first low-pass filter that removes unwanted signals of a signal distributed through the second switching unit when the signal passed through the direct digital combining unit is a first reference signal; And a second low-pass filter for removing unwanted signals of a signal distributed through the second switching unit when the signal passed through the direct digital combining unit is a second reference signal,
The band selection amplifying circuit unit includes: a first ground line for outputting an up-frequency signal of a frequency signal transmitted from the fourth switching unit; A second jig for outputting a source frequency signal of a frequency signal transmitted from the fourth switching unit; And a third gyro for outputting a down-frequency signal of a frequency signal transmitted from the fourth switching unit,
Wherein the control unit is configured to input the frequency signal output through the divider input to the fourth switching unit to the first path when the purpose of use is an upward frequency output, And the frequency signal output through the divider input to the fourth switching unit is input to the third gyro when the use purpose is a downward frequency output The fourth switching unit is controlled so that the first switching unit is turned on.
According to a preferred embodiment of the present invention, the first switching unit may include: a first switch for inputting the first reference signal to the third switch or inputting the first reference signal to the third switch; A second switch for inputting the second reference signal to the third switch or inputting the second reference signal to the third switch; And a third switch for inputting either the first reference signal or the second reference signal input from the first switch and the second switch to the direct digital combining unit.
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According to a preferred embodiment of the present invention, the control unit turns off the second switch by turning on the first switch so that the first reference signal is input to the third switch, And the second switch is turned on so that the second reference signal is input to the third switch, so that the first switch is turned off.
According to a preferred embodiment of the present invention, when the magnitude of the output frequency of the frequency signal output from the voltage control oscillation unit is equal to or greater than a predetermined reference value, the control unit turns off the first switch of the first switching unit, And controls the first switching unit to turn on the second switch.
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The multi-band hybrid frequency synthesizer proposed in the present invention is capable of oscillation in a wide band and has a stable phase noise characteristic, fast switching and high resolution characteristics in frequency synthesis.
1 is a block diagram of a conventional frequency synthesizer using a single loop structure
2A is a block diagram of a frequency synthesizer of a conventional downmix scheme
2B is a block diagram of a frequency synthesizer of a conventional upmixing scheme
3 is a block diagram of a conventional direct digital frequency synthesizer
4 is a block diagram of a multi-band hybrid frequency synthesizer according to the present invention;
Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings, which will be readily apparent to those skilled in the art. The present invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. In order to explain the present invention in the drawings, parts not related to the description are omitted, and like parts are denoted by similar reference numerals throughout the specification.
Throughout the specification, when an element is referred to as being "connected" to another element, it is intended to include not only "directly connected" but also "indirectly connected" to another element, When " comprising ", it is understood that this does not exclude other elements unless specifically stated to the contrary, it may include other elements.
Hereinafter, preferred embodiments of the present invention will be described with reference to the drawings.
1 is a block diagram of a conventional frequency synthesizer using a single loop structure. As shown in FIG. 1, when the frequency synthesizer is constructed, since the structure uses a single PLL, the frequency synthesizer can be miniaturized and the frequency oscillation can be easily performed. However, as shown in the figure, the frequency of the high frequency band (X- In order to oscillate, a multiplier is used. When a multiplier is used, high frequency oscillation is possible, but phase noise is poor. The reason why the phase noise characteristic becomes poor is that when the high frequency oscillation is performed using the multiplier, the frequency division ratio N becomes large.
FIG. 2A is a block diagram of a frequency synthesizer of a conventional downmixing scheme, and FIG. 2B is a block diagram of a frequency synthesizer of a conventional upmixing scheme. As shown in FIGS. 2A and 2B, when the frequency synthesizer is constructed, the frequency division ratio N is relatively small, which is advantageous in that it has excellent phase noise characteristics in a high frequency band. However, since the structure uses multiple PLLs, There is a drawback that it is difficult. In addition, since both the single or multi-frequency synthesizer use the PLL IC type Integer-N or Fractional-N, there is a problem that the frequency resolution has a limitation.
3 is a block diagram of a conventional direct digital frequency synthesizer. As shown in FIG. 3, the operation of the conventional direct digital frequency synthesizer includes a step of counting a frequency step number from 0 to N in a phase accumulator, reproducing the digital ramp waveform, Each of the counter values generated by the counter is used to obtain a value corresponding to a sample of a sinusoidal waveform from a ROM and a step of converting a discrete output value of the ROM into an analog form via a digital to analog converter (DAC) And then filtering is performed. When operating as described above, frequency switching and high-resolution characteristics can be obtained. However, there is a problem that unwanted noise may occur when using the local oscillator of the RF transceiver having a narrow bandwidth and a heterodyne structure.
Hereinafter, a multi-band hybrid frequency synthesizer according to the present invention for solving the problems of the conventional single or multi-loop frequency synthesizer and the direct digital frequency synthesizer will be described. 4 is a block diagram of a multi-band hybrid frequency synthesizer in accordance with the present invention. 4, the multi-band hybrid frequency synthesizer according to the present invention includes a
The
The
The hybrid frequency synthesizer according to the present invention controls the
First, the
Next, a frequency signal generated from the first reference signal or the second reference signal is output through the
The frequency signal input to the
The hybrid frequency synthesizer according to the present invention may include a
While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it will be understood by those skilled in the art that various changes and modifications may be made therein without departing from the spirit and scope of the invention as defined by the appended claims. May be constructed by selectively or in combination. Accordingly, the true scope of the present invention should be determined by the technical idea of the appended claims.
10: Reference signal section
11: first reference signal source
12: second reference signal source
20: first switching unit
21: first switch
22: second switch
23: third switch
30: direct digital synthesis unit
40: a second switching unit
50: Low-pass filter bank section
51: first low-pass filter
52: second low-pass filter
60: a third switching unit
70: Phase locked loop
71: 1st minute housewife
72: phase detector
73: The second minute housewife
80: Loop filter
90: Voltage control oscillation portion
100: Divider
110: fourth switching unit
120: band selection amplifier circuit part
121: First gill
122: second gyro
123: Third Giro
200:
300: Feedback
Claims (7)
A first switching unit (20) for switching any one of the first reference signal and the second reference signal;
A direct digital combining unit (30) for directly digitally combining any one of the first reference signal and the second reference signal switched through the first switching unit (20);
A second switching unit 40 for distributing a signal through the direct digital synthesis unit 30 through switching;
A low-pass filter bank unit 50 for removing unwanted waves of a signal distributed through the second switching unit 40;
A third switching unit 60 for switching a signal passed through the low-pass filter bank unit 50 and inputting the signal to the phase locked loop 70;
A signal obtained by dividing the signal inputted through the third switching unit 60 by the R counter which is the reference counter and the signal obtained by dividing the signal by the second divider 73 by the feedback unit 300 from the divider 100 Phase comparing unit 72 compares the phase of the signal divided by the dividing ratio N with the phase of the signal divided by the dividing ratio N and outputs the phase-locked signal until the signal divided by the dividing ratio N is equal to the signal divided by the R counter A loop 70;
A voltage control oscillator 90 for outputting a signal through the phase locked loop 70;
A divider 100 for dividing and outputting a frequency signal output through the voltage control oscillator 90;
A fourth switching unit 110 for switching the frequency signal output from the divider 100 to any one of the band selection and amplification circuit units 120;
A band selection amplifier circuit unit 120 for making the frequency signal inputted through the fourth switching unit 110 oscillate broadband; And
The first switching unit 20, the second switching unit 40, and the third switching unit 60, depending on the magnitude of the output frequency of the frequency signal output from the voltage control oscillator 90 or the purpose of using the frequency synthesizer, And a control unit (200) for controlling the switching of the fourth switching unit (110)
The low-pass filter bank unit 50 includes:
The controller 200 includes a first low-pass filter 51 for removing spurious components of a signal distributed through the second switching unit 40 when the signal passed through the direct digital combining unit 30 is a first reference signal, ; And
A second low-pass filter 52 which removes unwanted signals of the signal distributed through the second switching unit 40 when the control unit 200 receives the signal through the direct digital combining unit 30 as a second reference signal, , ≪ / RTI &
The band selection and amplification circuit part (120)
A first fuze 121 for outputting an up-frequency signal of a frequency signal transmitted from the fourth switching unit 110;
A second fuze 122 for outputting a source frequency signal of a frequency signal transmitted from the fourth switching unit 110; And
And a third gyro (123) for outputting a down-frequency signal of the frequency signal transmitted from the fourth switching unit (110)
The control unit (200)
The frequency signal output through the divider 100 input to the fourth switching unit 110 is input to the first fiducials 121 when the purpose of use is an upward frequency output, The fourth switching unit 110 may be configured to input the frequency signal output through the divider 100 input to the fourth switching unit 110 to the second fiducials 122. When the purpose of use is a downward frequency output, And the fourth switching unit (110) is controlled so that a frequency signal output through the divider (100) input to the third gyro (123) is input to the third gyro (123).
The first switching unit (20)
A first switch (21) for inputting the first reference signal to the third switch (23) or inputting it to the third switch (23);
A second switch 22 for inputting the second reference signal to the third switch 23 or for inputting the second reference signal to the third switch 23; And
A third switch 23 for inputting either the first reference signal or the second reference signal input from the first switch 21 and the second switch 22 to the direct digital synthesis section 30;
Band hybrid frequency synthesizer.
The control unit (200)
The second switch 22 is turned off by turning on the first switch 21 so that the first reference signal is inputted to the third switch 23,
And controls the first switch 21 to be turned off by turning on the second switch 22 so that the second reference signal is input to the third switch 23 Band hybrid frequency synthesizer.
The control unit (200)
When the magnitude of the output frequency of the frequency signal output from the voltage control oscillator 90 is equal to or greater than a predetermined reference value, the first switch 21 of the first switching unit 20 is turned off, And controls the first switching unit (20) to turn on the switch (22).
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Cited By (1)
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KR102305220B1 (en) * | 2020-10-19 | 2021-09-27 | 엘아이지넥스원 주식회사 | Smart frequency synthesizer of portable SDR and its control method |
Citations (1)
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KR101228867B1 (en) * | 2012-03-30 | 2013-02-01 | 삼성탈레스 주식회사 | Frequency synthesizer having low phase noise characteristic |
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KR101228867B1 (en) * | 2012-03-30 | 2013-02-01 | 삼성탈레스 주식회사 | Frequency synthesizer having low phase noise characteristic |
Non-Patent Citations (2)
Title |
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L. Yang 외, "An Ultra-broadband, High Resolution Frequency Synthesizer," 2012 International conference on microwave and millimeter wqave technology (ICMMT), 2012. 05.* |
S. Biswas 외, "A Fast-switching Low-spurious 6-18 GHz Hybrid Frequency Synthesizer," 2015 IEEE International Microwave and RF Conference (IMaRC), pp. 312-315, 2015. 12.* |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR102305220B1 (en) * | 2020-10-19 | 2021-09-27 | 엘아이지넥스원 주식회사 | Smart frequency synthesizer of portable SDR and its control method |
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