KR101842354B1 - Method of generating a gate driving signal and devices operating the same - Google Patents

Abstract

A method of generating a gate drive signal and apparatuses for performing the same are disclosed. A gate drive signal generator for generating a gate drive signal for driving at least one transistor included in a rectifier according to an exemplary embodiment includes an interface for receiving a pulse signal and an interface for receiving a pulse signal at a first upper limit And a signal converter for changing at least one slope from a pulse rising section leading from the second upper limit to a second lower limit of the amplitude and a pulse falling section, And outputs a pulse signal in which the at least one inclined surface is changed as the gate driving signal.

Description

Field of the Invention [0001] The present invention relates to a method of generating a gate driving signal,

The following embodiments relate to a method of generating a gate driving signal and apparatuses for performing the same.

In order to convert the incoming signal to a rectifier with high efficiency, it is necessary to adjust the MOSFET switch included in the rectifier with a certain pulse wave. However, this results in an unintended signal at a frequency that is a multiple of the target frequency. These signals are commonly referred to as EMI (Electro Magnetic Interference). To eliminate this EMI, the following conventional techniques have been proposed.

First, there is a method of removing EMI by using a filter. The EMI generated at the rectifier is generated at a specific frequency. To eliminate this, a band pass filter that can pass only the desired frequency can be integrated in the transmission line where EMI is generated. This is the most intuitive way to remove the problematic EMI, but it is difficult to make the rectifier small by increasing the size of the circuit.

Another method is to reduce the EMI to a certain size or less by spreading the frequency at which EMI is generated. A typical example is the Random Pulse Width Modulation (RPWM) technique.

Finally, there is a technique for removing EMI by phase difference between two input signals applied to a rectifier. This adjusts the phase difference between the two input signals independently controlling the (+) and (-) poles so that the EMI generated by each input signal cancel each other, thereby ultimately reducing EMI.

Embodiments provide a technique of changing the slope of a pulse signal and outputting a pulse signal of which the slope is changed to a driving signal of a transistor included in the rectifier to reduce the size of EMI generated while the rectifier performs the rectifying operation .

A gate drive signal generator for generating a gate drive signal for driving at least one transistor included in a rectifier according to an exemplary embodiment includes an interface for receiving a pulse signal and an interface for receiving a pulse signal at a first upper limit And a signal converter for changing at least one slope from a pulse rising section leading from the second upper limit to a second lower limit of the amplitude and a pulse falling section, A pulse signal in which the at least one inclined surface is changed can be output as the gate driving signal.

The signal converter may change the shape of the slope based on an allowable EMI size of the rectifier.

The signal converter may change the edge corresponding to the first lower limit and the first upper limit at an angle slope for each pulse rising period.

The signal converter may change the edge corresponding to each of the second upper limit and the second lower limit in an inclined manner for each pulse falling interval.

Wherein the signal converter varies the edge corresponding to the first lower limit and the first upper limit at an angle in the pulse rising section and changes the edge corresponding to the second upper limit and the second lower limit in an inclined manner .

The rectifier may be an active rectifier.

A method of generating a gate drive signal according to an exemplary embodiment includes receiving a pulse signal, generating a pulse rising section from a first lower limit to a first upper limit of the amplitude of the pulse signal at a second rising edge of the amplitude, Changing at least one slope of at least one section of a pulse falling section to a second lower limit; and applying a pulse signal to the at least one slope to a gate for driving at least one transistor included in the rectifier, And outputting the driving signal as a driving signal.

The changing step may include changing the shape of the slope based on the allowable EMI size of the rectifier.

The changing step may include changing an edge corresponding to each of the first lower limit and the first upper limit at an angle slope for each pulse rising period.

The changing step may include changing an edge corresponding to each of the second upper limit and the second lower limit at an angle to each of the pulse falling intervals.

Wherein the changing step includes changing an edge corresponding to each of the first lower limit and the first upper limit at an angle corresponding to each of the first rising edge and the second rising edge, And a step of varying.

The rectifier may be an active rectifier.

1 is a schematic block diagram of a wireless power system in accordance with one embodiment.
2 is a schematic block diagram of the wireless power transmission apparatus shown in FIG.
3 is a schematic block diagram of the wireless power receiving apparatus shown in FIG.
4 is a schematic block diagram of the power receiver shown in FIG.
5 is a schematic block diagram of an example of the gate drive signal generator shown in FIG.
6 shows an example of a pulse signal used for generating a gate driving signal.
7A to 7D are diagrams for explaining examples in which the signal converter shown in FIG. 4 changes pulse signals.
8A to 8C show the frequency characteristics in the rectifier according to the pulse signal changed by the signal converter.
9 is a schematic block diagram of another example of the gate drive signal generator shown in FIG.
10 is a schematic block diagram of another example of the gate drive signal generator shown in FIG.
11 is a view for explaining a method of operating the gate drive signal generator shown in FIG. 5, FIG. 9, or FIG.

It is to be understood that the specific structural or functional descriptions of embodiments of the present invention disclosed herein are presented for the purpose of describing embodiments only in accordance with the concepts of the present invention, May be embodied in various forms and are not limited to the embodiments set forth herein.

Embodiments in accordance with the concepts of the present invention are capable of various modifications and may take various forms, so that the embodiments are illustrated in the drawings and described in detail herein. It should be understood, however, that it is not intended to limit the embodiments according to the concepts of the present invention to the particular forms disclosed, but includes all modifications, equivalents, or alternatives falling within the spirit and scope of the invention.

The terms first, second, or the like may be used to describe various elements, but the elements should not be limited by the terms. The terms may be named for the purpose of distinguishing one element from another, for example without departing from the scope of the right according to the concept of the present invention, the first element being referred to as the second element, Similarly, the second component may also be referred to as the first component.

It is to be understood that when an element is referred to as being "connected" or "connected" to another element, it may be directly connected or connected to the other element, . On the other hand, when an element is referred to as being "directly connected" or "directly connected" to another element, it should be understood that there are no other elements in between. Expressions that describe the relationship between components, such as "between" and "between" or "neighboring to" and "directly adjacent to" should be interpreted as well.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The singular expressions include plural expressions unless the context clearly dictates otherwise. In this specification, the terms " comprises ", or " having ", or the like, specify that there is a stated feature, number, step, operation, , Steps, operations, components, parts, or combinations thereof, as a matter of principle.

Unless defined otherwise, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Terms such as those defined in commonly used dictionaries are to be interpreted as having a meaning consistent with the meaning of the context in the relevant art and, unless explicitly defined herein, are to be interpreted as ideal or overly formal Do not.

Hereinafter, embodiments will be described in detail with reference to the accompanying drawings. However, the scope of the patent application is not limited or limited by these embodiments. Like reference symbols in the drawings denote like elements.

A module in this specification may mean hardware capable of performing the functions and operations according to the respective names described in this specification and may mean computer program codes capable of performing specific functions and operations , Or an electronic recording medium, e.g., a processor or a microprocessor, equipped with computer program code capable of performing certain functions and operations.

In other words, a module may mean a functional and / or structural combination of software for driving hardware and / or hardware for carrying out the technical idea of the present invention.

FIG. 1 is a schematic block diagram of a wireless power system according to one embodiment, FIG. 2 is a schematic block diagram of the wireless power transmission apparatus shown in FIG. 1, and FIG. 3 is a block diagram of a wireless power transmission apparatus And is a schematic block diagram.

1 to 3, a wireless power system 10 includes a wireless power transmission device 100 and one or more wireless power reception devices 200 .

The wireless power transmission apparatus 100 can supply wireless power to the wireless power receiving apparatus 200. [ For example, the wireless power transmission apparatus 100 may supply wireless power to the wireless power receiving apparatus 200 through a resonance method, an electromagnetic induction method, or the like. That is, the wireless power transmission apparatus 100 refers to a device that supplies wireless power, and the wireless power receiving apparatus 200 may refer to a device that receives wireless power.

In addition, the wireless power transmission apparatus 100 and the wireless power reception apparatus 200 can communicate with each other. For example, the wireless power transmission apparatus 100 and the wireless power reception apparatus 200 can exchange signals (or data) with each other.

Each of the wireless power transmission device 100 and the wireless power receiving device 200 may be a personal computer (PC), a data server, a pad, a medical device, an electric vehicle, or a portable electronic device.

The portable electronic device may be a laptop computer, a mobile phone, a smart phone, a tablet PC, a mobile internet device (MID), a personal digital assistant (PDA), an enterprise digital assistant A digital still camera, a digital video camera, a portable multimedia player (PMP), a personal navigation device or a portable navigation device (PND), a portable game console (handheld console), an e-book e-book, or a smart device. For example, a smart device can be implemented as a smart watch or a smart band.

The wireless power transmission apparatus 100 may include a controller 110, a power transmitter 130, and a communication module 150.

The controller 110 can control the operation of the wireless power transmission apparatus 100 as a whole. For example, the controller 110 may be implemented as a processor, i.e., a central processing unit (CPU), including at least one core.

The power transmitter 130 may transmit the wireless power to the wireless power receiving apparatus 200. [

The communication module 150 can exchange signals (or data) with the wireless power receiving apparatus 200. For example, the wireless communication module may include a Near Field Communication module, a WiFi module, a Bluetooth module, a Bluetooth low energy module, a Radio Frequency Identification (RFID) module, an Infrared Data Association (IrDA) UWB (Ultra Wideband) module, and Zigbee module.

The wireless power receiving apparatus 200 may include a controller 210, a power receiver 230, and a communication module 250.

The controller 210 can control the operation of the wireless power receiving apparatus 200 as a whole. For example, the controller 210 may be implemented as a processor, i.e., a central processing unit (CPU), including at least one core.

The power receiver 230 may receive wireless power from the wireless power transmission device 100. Also, the power receiver 230 can reduce the magnitude of EMI generated while performing the rectifying operation using the pulse signal changed in the inclined plane.

The communication module 250 can exchange signals (or data) with the wireless power transmission apparatus 100. For example, the wireless communication module may include a Near Field Communication module, a WiFi module, a Bluetooth module, a Bluetooth low energy module, a Radio Frequency Identification (RFID) module, an Infrared Data Association (IrDA) UWB (Ultra Wideband) module, and Zigbee module.

4 is a schematic block diagram of the power receiver shown in FIG.

1 to 4, the power receiver 230 includes a resonator 231, a rectifier 233, a gate driving signal generator 235, and a power converter 237 ). In addition, the power receiver 230 may further include a power storage 239.

The resonator 231 may generate a resonance voltage using the radio power transmitted from the radio power transmission apparatus 100. [ For example, the resonator 231 can generate a resonance voltage through a resonance method, an electromagnetic induction method, or the like. The resonator 231 may be implemented with an inductor and a capacitor.

The rectifier 233 can rectify the resonance voltage of the resonator 231 and transmit it to the power converter 237 under the control of the gate drive signal generator 235. For example, the rectifier 233 can rectify the resonance voltage of the resonator 231 in a DC form in response to the gate drive signal output from the gate drive signal generator 235.

The rectifier 233 may include at least one transistor. For example, the transistor may be a MOSFET. That is, the rectifier 233 may be implemented as an active rectifier.

The gate drive signal generator 235 may generate a pulse signal modified to prevent EMI from being generated in the rectifier 233 as a gate drive signal for driving at least one transistor included in the rectifier 233. [ Thus, the rectifier 233 can reduce the size of the EMI.

The power converter 237 may convert the rectified current into power and store the power in the power storage unit 239. [

5 is a schematic block diagram of an example of the gate drive signal generator shown in FIG. 4, FIG. 6 shows an example of a pulse signal used for generating a gate drive signal, and FIGS. 7A to 7D are cross- Fig. 8 is a diagram for explaining examples in which a signal converter changes a pulse signal. Fig.

5 to 7C, the gate drive signal generator 235 may include an interface 235-1 (interface) and a signal converter 235-3.

The interface 235-1 can receive the pulse signal. The pulse signal may be a pulse signal having a constant amplitude.

The signal converter 235-3 may change at least one of a pulse rising section (PRS) and a pulse falling section (PFS) of the pulse signal.

The pulse signal may include one or more pulse rising periods (PRS) and one or more pulse falling periods (PFS). The pulse rising period PRS may mean a section from the first lower limit BP1 of the amplitude to the first upper limit B1. The pulse falling period PFS may mean a section from the second upper limit T2 to the second lower limit B2. Each of the pulse rising period (PRS) and the pulse falling period (PFS) may have a vertical slope.

6, the first upper limit T1 and the first lower limit B1 of the pulse rising period PRS are shown to be the same as the second upper limit T2 and the second lower limit B2 of the pulse falling period PFS , But it is not necessarily limited thereto. The values of the first upper limit T1 and the first lower limit B1 are different for each pulse rising period PRS and the values of the second upper limit T2 and the second lower limit B2 This can be different.

In one example, the signal converter 235-3 may change the edges corresponding to the first lower limit B1 and the first upper limit T1 of the pulse rising period PRS at an angle. As shown in FIG. 7A, the signal converter 235-3 can change the edge corresponding to the first lower limit B1 and the first upper limit T1 at an angle slope for each pulse rising period PRS.

The signal converter 235-3 can generate an asymmetric gradient pulse signal, that is, a pulse signal whose pulse rising period PRS is asymmetrically inclined.

As another example, the signal converter 235-3 may change the edge corresponding to the second upper limit T2 and the second lower limit B2 of the pulse falling period PFS at an angle. As shown in FIG. 7B, the signal converter 235-3 can change the edge corresponding to the second upper limit T2 and the second lower limit B2, respectively, at an angle to each other during the pulse falling period PFS.

The signal converter 235-3 can generate an asymmetric tilt pulse signal, that is, a pulse signal in which the pulse falling period PFS is sloped asymmetrically.

As another example, the signal converter 235-3 may change the edge corresponding to the first lower limit B1 and the first upper limit T1 of the pulse rising period PRS at an angle and change the edge of the pulse falling period PFS The edges corresponding to the two upper limit (T2) and the second lower limit (B2) can be changed in an inclined manner. For example, the signal converter 235-3 changes the edges corresponding to the first lower limit B1 and the first upper limit T1 obliquely for each pulse rising period PRS, and for each pulse falling interval PFS, The edges corresponding to the two upper limit (T2) and the second lower limit (B2) can be changed in an inclined manner.

That is, the signal converter 235-3 can generate a symmetrically inclined pulse signal, that is, a pulse signal in which the pulse rising period and the pulse falling period are inclined to the upper layer.

Also, the signal converter 235-3 can change the shape of at least one of the pulse rising period PRS and the pulse falling period PFS based on the magnitude of the allowable EMI of the rectifier. For example, as shown in Fig. 7D, the signal converter 253-3 may change the angle of the vertical inclined plane (CASE1), change the inclined plane to be concave (CASE2), or change the inclined plane to convex (CASE3).

The signal converter 235-3 may change at least one of a pulse rising section (PRS) and a pulse falling section (PFS) of the pulse signal.

The signal converter 235-3 can output a pulse signal obtained by changing at least one inclined plane as a gate driving signal.

When the pulse signal is directly inputted to the rectifier 233 to drive at least one transistor included in the rectifier 233, the EMI generated in the frequency harmonic is determined in the rectifier 233 according to the sharpness of the edge portion of the pulse signal . As described above, when the signal converter 235-3 changes only the edge portion of the pulse signal in an inclined manner, the other frequency components can be reduced while maintaining the natural frequency component, so that the rectifier 233 can effectively reduce EMI generated in the frequency harmonic Can be reduced. That is, by changing only the edge portion of the pulse signal at an angle, it is possible to minimize the influence on the power transmission efficiency within a given power maximum value.

8A to 8C show the frequency characteristics in the rectifier according to the pulse signal changed by the signal converter.

8A, when a pulse signal in which the edges corresponding to the upper and lower edges of the pulse falling period are changed obliquely, that is, the asymmetric gradient pulse signal is input to the rectifier 233 as the gate driving signal, the rectifier 233, EMI < / RTI >

The edge corresponding to each of the upper and lower limits of the pulse rising period is varied in an inclined manner and a pulse signal in which the edge corresponding to each of the upper and lower limits of the pulse falling period is varied obliquely, It can be confirmed that the EMI level of the rectifier 233 is greatly reduced when the asymmetric tilt pulse signal is input when the signal is input to the rectifier 233 as a gate driving signal.

As shown in FIG. 8C, even if the modified pulse signal has a slope at the same point, it can be seen that the EMI size generated in the rectifier 233 can be adjusted according to the shape of the slope. FIG. 8C shows the EMI performance of adjusting the inclined plane of the symmetric gradient pulse signal. Even if the changed pulse signal has an inclination at the same point, the EMI characteristic in the rectifier 233 varies depending on the degree of the inclined plane. For example, in the case of a pulse signal having a convex slope, the EMI size of the odd-numbered difference is not changed, and the EMI size of the even-numbered difference is increased. Thus, within the limit of the EMI size required by the rectifier 233, the signal converter 235-3 adjusts the slope of the pulse signal, so that the power efficiency of the rectifier 233 is increased and the EMI can be attenuated.

9 is a schematic block diagram of another example of the gate drive signal generator shown in FIG.

9, the gate drive signal generator 235 may include an interface 235-1, a signal converter 235-3, and a gate driver 235-5.

The structure and operation of interface 235-1 and signal converter 235-3 in Fig. 9 may be substantially the same as the structure and operation of interface 235-1 and signal converter 235-3 in Fig. 5 .

The gate driver 235-5 can output the pulse signal changed by the signal converter 235-3 as a gate driving signal.

10 is a schematic block diagram of another example of the gate drive signal generator shown in FIG.

10, the gate drive signal generator 235 may include an interface 235-1, a signal converter 235-3, and a gate driver 235-5.

The structure and operation of interface 235-1 and signal converter 235-3 in Fig. 10 may be substantially the same as the structure and operation of interface 235-1 and signal converter 235-3 in Fig. 5 .

The pulse signal changed by the signal converter 235-3 may be a signal output from the gate driver 235-3.

11 is a view for explaining a method of operating the gate drive signal generator shown in FIG. 5, FIG. 9, or FIG.

Referring to FIG. 11, the interface 235-1 may receive a pulse signal (S1110). The pulse signal may be a pulse signal having a constant amplitude.

The signal converter 235-3 may change at least one slope of the pulse rising period PRS and the pulse falling period PFS of the pulse signal S1130.

The apparatus described above may be implemented as a hardware component, a software component, and / or a combination of hardware components and software components. For example, the apparatus and components described in the embodiments may be implemented within a computer system, such as, for example, a processor, a controller, an arithmetic logic unit (ALU), a digital signal processor, a microcomputer, a field programmable gate array (FPGA) , A programmable logic unit (PLU), a microprocessor, or any other device capable of executing and responding to instructions. The processing device may execute an operating system (OS) and one or more software applications running on the operating system. The processing device may also access, store, manipulate, process, and generate data in response to execution of the software. For ease of understanding, the processing apparatus may be described as being used singly, but those skilled in the art will recognize that the processing apparatus may have a plurality of processing elements and / As shown in FIG. For example, the processing unit may comprise a plurality of processors or one processor and one controller. Other processing configurations are also possible, such as a parallel processor.

The software may include a computer program, code, instructions, or a combination of one or more of the foregoing, and may be configured to configure the processing device to operate as desired or to process it collectively or collectively Device can be commanded. The software and / or data may be in the form of any type of machine, component, physical device, virtual equipment, computer storage media, or device , Or may be permanently or temporarily embodied in a transmitted signal wave. The software may be distributed over a networked computer system and stored or executed in a distributed manner. The software and data may be stored on one or more computer readable recording media.

The method according to an embodiment may be implemented in the form of a program command that can be executed through various computer means and recorded in a computer-readable medium. The computer-readable medium may include program instructions, data files, data structures, and the like, alone or in combination. The program instructions to be recorded on the medium may be those specially designed and configured for the embodiments or may be available to those skilled in the art of computer software. Examples of computer-readable media include magnetic media such as hard disks, floppy disks, and magnetic tape; optical media such as CD-ROMs and DVDs; magnetic media such as floppy disks; Magneto-optical media, and hardware devices specifically configured to store and execute program instructions such as ROM, RAM, flash memory, and the like. Examples of program instructions include machine language code such as those produced by a compiler, as well as high-level language code that can be executed by a computer using an interpreter or the like. The hardware devices described above may be configured to operate as one or more software modules to perform the operations of the embodiments, and vice versa.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments. For example, it is to be understood that the techniques described may be performed in a different order than the described methods, and / or that components of the described systems, structures, devices, circuits, Lt; / RTI > or equivalents, even if it is replaced or replaced.

Therefore, other implementations, other embodiments, and equivalents to the claims are also within the scope of the following claims.

Claims (12)

A gate drive signal generator for generating a gate drive signal for driving at least one transistor included in a rectifier,
An interface for receiving a pulse signal; And
At least one slope of a pulse rising section from a first lower limit to a first upper limit of the amplitude of the pulse signal and a pulse falling section from a second upper limit to a second lower limit of the amplitude, A signal converter that varies based on an allowable EMI size of the rectifier
Lt; / RTI >
Wherein the gate driving signal generator outputs a pulse signal obtained by changing the at least one inclined surface as the gate driving signal.
delete The method according to claim 1,
Wherein the signal converter comprises:
And changes an edge corresponding to each of the first lower limit and the first upper limit at an inclined angle in each pulse rising period.
The method according to claim 1,
Wherein the signal converter comprises:
And changes an edge corresponding to each of the second upper limit and the second lower limit in an inclined manner for each pulse falling period.
The method according to claim 1,
Wherein the signal converter comprises:
A gate driving signal for changing an edge corresponding to each of the first lower limit and the first upper limit at an angle corresponding to each of the pulse rising sections and an edge corresponding to each of the second upper limit and the second lower limit for each pulse falling section, Generator.
The method according to claim 1,
Wherein the rectifier is an active rectifier.
Receiving a pulse signal; And
At least one of a pulse rising section from the first lower limit to the first upper limit of the amplitude of the pulse signal and a pulse falling section from the second upper limit to the second lower limit of the amplitude Changing an inclined plane based on an allowable EMI size of the rectifier; And
Outputting a pulse signal obtained by changing the at least one inclined surface to a gate driving signal for driving at least one transistor included in the rectifier
And generating a gate drive signal.
delete 8. The method of claim 7,
Wherein the changing comprises:
Changing an edge corresponding to each of the first lower limit and the first upper limit at an inclination
And generating a gate drive signal.
8. The method of claim 7,
Wherein the changing comprises:
Varying an edge corresponding to each of the second upper limit and the second lower limit at each pulse falling interval
And generating a gate drive signal.
8. The method of claim 7,
Wherein the changing comprises:
Varying an edge corresponding to each of the first lower limit and the first upper limit at an angle corresponding to each of the pulse rising sections and changing an edge corresponding to each of the second upper limit and the second lower limit at an inclination
And generating a gate drive signal.
8. The method of claim 7,
Wherein the rectifier is an active rectifier.

Images