KR101719074B1 - Method and apparatus for thermal management of semiconductor processor device using dynamic thermal margin - Google Patents

Abstract

According to the embodiments of the present invention, a semiconductor processor device comprises: a thermal margin determination unit to determine thermal margin based on any one among a priority of threads driven in one or more processor cores and a load amount of the processor cores; a thermal margin state determination unit to determine a thermal margin state based on a current temperature and thermal margin of the semiconductor processor device; a policy determination unit to determine a thermal management policy with respect to the processor cores based on the thermal margin state; and a processor core setting unit to set activation, voltage, and frequency of the processor cores in accordance with the thermal management policy. The thermal margin defines a difference between a marginal temperature which is for protecting the semiconductor processor device, and a limit temperature which is for inducing a change of the thermal management policy; and the thermal margin state is able to be determined among a state which the current temperature is lower than the limit temperature or state which the current temperature is greater than or equal to the limit temperature.

Description

METHOD AND APPARATUS FOR THERMAL MANAGEMENT OF SEMICONDUCTOR PROCESSOR DEVICE USING DYNAMIC THERMAL MARGIN FIELD OF THE INVENTION [0001]

The present invention relates to thermal management techniques for semiconductor processor devices.

Semiconductor devices such as a semiconductor processor or a semiconductor power device have characteristics such that they cause more leakage power when the temperature rises and a temperature rises due to heat generation due to more leakage power depending on the general thermal characteristics of the semiconductor material. Semiconductor devices operating at high temperatures exceeding the long term thermal limit do not guarantee the designed operating characteristics and may cause errors or permanent damage.

Conventionally, a technique of controlling the temperature of a semiconductor device can be classified into a method of sufficiently securing a cooling capacity for dissipating the heat generated by the operation to the outside, or a method of controlling heat generation. If a method of improving the cooling efficiency or the cooling capacity at the design stage can be applied, a method of controlling the heat at the actual use stage may be applied.

Accordingly, in a conventional real-time temperature management technique for a semiconductor device, when the temperature of the semiconductor device rises, the power consumption is reduced by lowering the frequency or decreasing the operating voltage in consideration of the designed cooling capacity. And the operation voltage is increased.

For example, the prior art (Korean Patent Laid-open Publication No. 10-2013-0020624) stores process corners, voltage and frequency values according to the operation mode of the detailed components in the semiconductor device in advance, And the calculated value is compared with the stored values and the calculated value to predict the change of the operation mode and to adjust the operation mode.

In this prior art, various values related to the manufacture and operation of the components of a specific semiconductor device must be stored in advance, and in each operation mode of each semiconductor device, the operation of processor, such as processor usage efficiency, switching speed, Parameters should be calculated. Therefore, in order to apply the prior art to different semiconductor devices, there is a disadvantage that data regarding the manufacture and operation of each semiconductor device must be accumulated separately, and the configuration of the thermal management hardware must be considered.

This conventional Dynamic Voltage Frequency Scaling (DVFS) technique can guarantee the thermal stability of a semiconductor device in terms of temperature control, but degradation of hardware performance is inevitable in a technique of lowering voltage and frequency according to temperature.

In mobile devices, such as smartphones, which have limited battery capacity and limited heat dissipation, and hardware performance changes significantly affect the user experience, the dynamic voltage frequency scaling technique can significantly reduce the satisfaction of the device .

On the other hand, the threads that the processor processes operate with different priorities, for example, threads that interact directly with the user can have a relatively high priority, and those that do not have a relatively low priority have.

If the processor has already reached a fairly high temperature while driving low priority threads at high voltages and frequencies, then the processor may soon reach the thermal limit if high priority threads are running. As a result, when the processor and the processor are lowered in voltage and frequency, the high priority threads can not provide the desired user experience despite the high priority.

Korean Patent Publication No. 10-2013-0020624 (Feb.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a thermal management method and apparatus for a semiconductor processor device using a dynamic thermal margin.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a thermal management method and apparatus that can be easily interlocked with a hardware temperature management technique of a semiconductor processor apparatus through voltage or frequency change.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a thermal management method and apparatus capable of maximizing the performance of a processor for high priority threads.

The solution to the problem of the present invention is not limited to those mentioned above, and other solutions not mentioned can be clearly understood by those skilled in the art from the following description.

A semiconductor processor apparatus according to an aspect of the present invention includes a thermal margin determination unit that determines a thermal margin based on any one of a priority of threads driven in one or more processor cores constituting a semiconductor processor apparatus and a load of the processor cores part; A thermal margin state determiner for determining a thermal margin state based on the current temperature of the semiconductor processor and the thermal margin; A policy determination unit for determining a thermal management policy for the processor cores based on the determined thermal margin state; And a processor core setting unit for setting the activation, the voltage and the frequency of the processor cores according to the thermal management policy, wherein the thermal margin is determined based on a limit temperature that is a temperature for protecting the semiconductor processor apparatus, And the thermal margin state may be determined from a state in which the current temperature is lower than the limit temperature or a state in which the current temperature is lower than the limit temperature.

According to one embodiment, the thermal margin determiner may be operative to determine the thermal margin to be smaller as the priority of the threads is higher or the load of the processor cores is higher.

According to one embodiment, the thermal margin state determining unit determines the thermal margin state to be the first state when the current temperature is lower than the limit temperature, and determines the thermal margin state to the second state when the present temperature becomes higher than the limit temperature The policy determining unit maintains the current thermal management policy while the thermal margin state is in the first state, and while the thermal margin state is in the second state, changes the thermal management policy until the current temperature becomes lower than the limit temperature And to observe the change of the present temperature according to the changed thermal management policy.

According to one embodiment, the thermal margin state determiner may maintain the thermal margin state in the first state when the present temperature is lower than the limit temperature when the current thermal margin state is the first state, Changes the thermal margin state from the first state to the second state, changes the thermal margin state to the third state when the thermal management policy changes when the current thermal margin state is the second state, If the current temperature is higher than the second limit temperature, the thermal margin state is changed to the second state, and if the present temperature is lower than the second limit temperature but higher than the return temperature, the thermal margin state is maintained in the third state, And when the current temperature is lower than the return temperature, operates to change the thermal margin state to the first state, and the policy decision unit is operable to change the thermal margin state to the first state while the thermal margin state is the first state, Maintaining a thermal management policy, and a thermal margin condition is operable to determine a second state of the current temperature to be lower than the second limit temperature or the return temperature during the thermal management policy.

According to one embodiment, the secondary limiting temperature and the return temperature may be determined based on the thermal margin.

According to one embodiment, the current load may be a load associated with processing priority threads among threads running in the processor cores.

A thermal management apparatus for a semiconductor processor apparatus according to another aspect of the present invention determines a thermal margin based on any one of a priority of threads driven in one or more processor cores constituting a semiconductor processor apparatus and a load of the processor cores A thermal margin determining unit; A thermal margin state determiner for determining a thermal margin state based on a current temperature of the semiconductor processor device and the thermal margin; And a policy determination unit for determining a thermal management policy for the processor cores based on the determined thermal margin state, wherein the thermal margin is determined based on a difference between a limit temperature, which is a temperature for protecting the semiconductor processor apparatus, , And the thermal margin state may be determined from a state where the current temperature is lower than the limit temperature or a state where the current temperature is lower than the limit temperature.

According to one embodiment, the thermal margin determiner may be operative to determine the thermal margin to be smaller as the priority of the threads is higher or the load of the processor cores is higher.

According to one embodiment, the thermal margin state determining unit determines the thermal margin state to be the first state when the current temperature is lower than the limit temperature, and determines the thermal margin state to the second state when the present temperature becomes higher than the limit temperature The policy determining unit maintains the current thermal management policy while the thermal margin state is in the first state, and while the thermal margin state is in the second state, changes the thermal management policy until the current temperature becomes lower than the limit temperature And to observe the change of the present temperature according to the changed thermal management policy repeatedly.

According to one embodiment, the thermal margin state determiner may maintain the thermal margin state in the first state when the present temperature is lower than the limit temperature when the current thermal margin state is the first state, Changes the thermal margin state from the first state to the second state, changes the thermal margin state to the third state when the thermal management policy changes when the current thermal margin state is the second state, If the current temperature is higher than the second limit temperature, the thermal margin state is changed to the second state, and if the present temperature is lower than the second limit temperature but higher than the return temperature, the thermal margin state is maintained in the third state, Wherein when the current temperature is lower than the return temperature, the thermal decision unit operates to change the thermal margin state to the first state, and the policy determination unit operates to change the thermal margin state to the first state, It is operable to maintain the current thermal management policy, and to be lower than the current temperature of the second temperature or return temperature limit determining the thermal management policy during the thermal margin state of the second state.

According to one embodiment, the secondary limiting temperature and the return temperature may be determined based on the thermal margin.

According to one embodiment, the current load may be a load associated with processing priority threads among threads running in the processor cores.

According to one embodiment, the thermal management apparatus divides threads, which are driven in the processor cores, into threads and non-priority threads, and adjusts time slices allocated to non-priority threads according to a thermal management policy The scheduler may further include a scheduler.

According to one embodiment, the thermal management apparatus monitors occurrence of a performance acceleration situation in which a load related to a priority thread among threads driven in the processor cores exceeds a threshold load amount, and when a performance acceleration situation is detected, Wherein the policy determining unit is configured to determine whether a performance acceleration request is received from the processor based on the performance information of the processor core that provides higher performance than the current performance among the plurality of processor core settings, Settings, and to determine a thermal management policy in accordance with the selected processor core settings.

A thermal management method for a semiconductor processor apparatus comprising one or more processor cores according to yet another aspect of the present invention includes the steps of determining a thermal margin based on either the priority of threads running in the processor cores and the load of the processor cores Determining; Determining a thermal margin condition based on the current temperature and the thermal margin of the semiconductor processor device; And determining a thermal management policy for the processor cores based on the determined thermal margin condition, wherein the thermal margin is determined based on a threshold temperature that is a temperature for protecting the semiconductor processor apparatus and a variation in the thermal management policy And the thermal margin state may be determined from a state in which the current temperature is lower than the limit temperature or a state in which the current temperature is lower than the limit temperature.

According to one embodiment, a thermal management method for the semiconductor processor apparatus may further comprise controlling activation, voltage and frequency of the processor cores according to the thermal management policy.

According to one embodiment, determining the thermal margin may include determining the thermal margin to be smaller as the priority of the threads is higher or the load of the processor cores is higher.

According to one embodiment, the step of determining the thermal margin state may include determining a thermal margin state to be a first state when the current temperature is lower than the limit temperature, and determining a thermal margin state when the present temperature is higher than the limit temperature, Wherein the determining the thermal management policy comprises: maintaining a current thermal management policy while the thermal margin state is in a first state; And repeating the observation of the change of the thermal management policy and the change of the current temperature according to the changed thermal management policy until the current temperature becomes lower than the limit temperature while the thermal margin state is the second state.

According to one embodiment, the determining of the thermal margin state may include maintaining the thermal margin state at the first state when the current thermal margin state is the first state, Changing the thermal margin state from the first state to the second state when the temperature is higher than the limiting temperature; Changing the thermal margin state to a third state when the thermal management policy is changed when the current thermal margin state is the second state; And when the present temperature is higher than the second limit temperature, the thermal margin state is changed to the second state. When the present temperature is lower than the second limit temperature but higher than the return temperature, the thermal margin state And changing the thermal margin state to a first state when the current temperature is lower than the return temperature, wherein the step of determining the thermal management policy comprises: maintaining the thermal margin state in the first state and the third state; Maintaining a current thermal management policy during the state; And determining the thermal management policy such that the current temperature is lower than the second limit temperature or the return temperature while the thermal margin state is the second state.

According to one embodiment, the secondary limiting temperature and the return temperature may be determined based on the thermal margin.

According to one embodiment, the current load may be a load associated with processing priority threads among threads running in the processor cores.

According to one embodiment, a thermal management method for the semiconductor processor apparatus divides threads, which are driven by the processor cores, into threads and non-priority threads, and, according to a thermal management policy, And adjusting the slices.

According to one embodiment, a thermal management method for the semiconductor processor apparatus monitors the occurrence of a performance acceleration situation in which a load related to a priority thread among threads driven in the processor cores exceeds a threshold load, Wherein the step of determining a thermal management policy comprises: determining, based on the performance acceleration request, a processor core configuration that provides higher performance than current performance among a plurality of processor core configurations, Setting, and determining a thermal management policy according to the selected processor core setting.

According to the thermal management method and apparatus for a semiconductor processor apparatus using the dynamic thermal margin of the present invention, it can be easily interlocked with a hardware temperature management technique of a semiconductor processor apparatus through voltage or frequency change.

According to the thermal management method and apparatus for a semiconductor device using the dynamic thermal margin of the present invention, the performance of the processor can be maximized by scaling the thermal margin according to the priorities of the threads.

The effects of the present invention are not limited to those mentioned above, and other effects not mentioned can be clearly understood by those skilled in the art from the following description.

1 is a block diagram illustrating a thermal management apparatus for a semiconductor processor apparatus according to an embodiment of the present invention.
2 is a diagram illustrating a concept of a thermal margin in a thermal management apparatus for a semiconductor processor apparatus according to an embodiment of the present invention.
3 is a graph illustrating a case where performance acceleration is required in a thermal management apparatus for a semiconductor processor apparatus according to an embodiment of the present invention.
FIG. 4 is a graph illustrating the manner in which the temperature of the semiconductor processor apparatus is managed while the thermal margin and the performance state are equally affected by the thermal management policy in the thermal management apparatus for the semiconductor processor apparatus according to the embodiment of the present invention. admit.
5 is a flowchart illustrating a method for managing a thermal process for a semiconductor processor apparatus according to an embodiment of the present invention.

For the embodiments of the invention disclosed herein, specific structural and functional descriptions are set forth for the purpose of describing an embodiment of the invention only, and it is to be understood that the embodiments of the invention may be practiced in various forms, The present invention should not be construed as limited to the embodiments described in Figs.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. The same reference numerals are used for the same constituent elements in the drawings and redundant explanations for the same constituent elements are omitted.

1 is a block diagram illustrating a thermal management apparatus for a semiconductor processor apparatus according to an embodiment of the present invention.

1, the semiconductor processor apparatus 10 includes one or more processor cores 11, a processor core setting unit 12, a power supply voltage generating unit 13, a clock frequency generating unit 14, a temperature sensor 15 And a thermal management device 100. [0031]

The processor cores 11 may be individually activated or deactivated, and may be driven at different voltages or different clock frequencies as required.

The processor core setting unit 12 stores a plurality of combinations of the processor core settings with respect to the activation and the voltage and the frequency of the processor core, Selects one of the plurality of processor core settings in accordance with the thermal management policy determined in the processor core 100, determines the processor cores to be activated according to the selected processor core setting, the power supply voltage to be supplied, or the clock frequency .

The power supply voltage generating unit 13 generates the power supply voltage VDD according to the voltage setting during the processor core setting determined by the processor core setting unit 12 and supplies the power supply voltage VDD to the activated processor core 11.

The clock frequency generating unit 14 generates a clock frequency CLK according to the frequency setting in the processor core setting determined by the processor core setting unit 12 and supplies the clock frequency CLK to the activated processor core 11.

The temperature sensor 15 may calculate the individual temperature values of each processor core 11 or may calculate one temperature value that may represent the thermal state of the semiconductor processor device 10. [

Recent semiconductor processor devices employ the DVFS technique to dynamically scale the voltage and frequency by comparing the current temperature with the threshold temperature to ensure a sensible performance while controlling the temperature. The critical temperature is a temperature determined by the thermal design power (TDP) of the semiconductor processor devices. If the critical temperature is reached, the performance may be degraded, the normal operation may not be guaranteed, or the life of the product may be affected.

This conventional temperature control technique can instantaneously react and very aggressively scale based on a comparison of the current temperature and the threshold temperature of the semiconductor processor device, so that the performance may fluctuate instantaneously. Applications that require high performance can consume a lot of power and thus quickly increase the temperature of the processor unit. Therefore, while running an application that does not require much performance, the processor device has a high potential because it is in a cooled state, but when high performance is required, the processor device overheats, the voltage and frequency become low, It can be in a state that can not be done.

In contrast, the thermal management apparatus 100 according to the embodiments of the present invention includes a thermal margin determination unit 110, a thermal margin state determination unit 110, Unit 120 and a policy determination unit 130. [

According to an embodiment, the thermal management apparatus 100 may further include a scheduler 140 and a performance state determiner 150, respectively.

The thermal margin determining unit 110 can determine the size of the thermal margin based on at least one of the priority information of the threads being executed or executed and the load of the processor cores 11. [ The thermal margin refers to the difference from the limit temperature, which is the temperature at which the semiconductor processor device 10 should be protected, to the limit temperature, which is the temperature at which the change of the thermal management policy is triggered, as defined below.

Specifically, the thermal margin determining unit 110 can determine the size of the thermal margin to be smaller as the priority of the threads is higher, thereby setting the limit temperature higher.

Specifically, the thermal margin determining unit 110 can determine the size of the thermal margin to be small as the load of the processor cores 11 is high, thereby setting the limit temperature high.

Specifically, the thermal margin determining unit 110 can determine the size of the thermal margin to be smaller as the weighted summation value of the priority of the threads and the load of the processor cores 11 is higher, thereby setting the limit temperature higher.

The thermal margin state determination unit 120 can determine a thermal margin state based on the magnitude of the thermal margin and the current temperature.

Referring to Figures 2 and 3 to illustrate the determination of the size and state of the thermal margin, Figure 2 illustrates the concept of the thermal margin used in the thermal management device for a semiconductor processor device according to one embodiment of the present invention And FIG. 3 is a diagram illustrating a state diagram of a thermal margin state.

Figure 2 roughly illustrates the temperature change in a scenario where the temperature rises and falls in accordance with operating conditions.

The limit temperature does not immediately cause the semiconductor processor apparatus 10 to fail at that temperature but the DVFS function of the processor core setting section 12 should be actively applied so as to protect the semiconductor processor apparatus 10 or cause injury to the user Lt; / RTI >

The limiting temperature is the temperature at which the operating condition should not be changed unless the current temperature exceeds the limiting temperature, but the variation of the operating condition must be considered when the current temperature reaches the limiting temperature. That is, the limiting temperature is the temperature at which performance and heat generation start to be limited.

The thermal margin in the thermal management apparatus and method of the present invention is the limit temperature to the limit temperature. If the thermal margin is large, the limited temperature is low. Therefore, even if the current temperature is low, the operating condition may be strengthened and performance and heat generation may be limited. On the other hand, if the thermal margin is small, the limiting temperature is close to the limit temperature, and even if the current temperature is considerably high, the operating condition is maintained so that the semiconductor processor device 10 still has to guarantee the performance and endure the heat even at high heat.

If the limiting temperature is 110 ° C and the thermal margin is determined to be 15 ° C, the limiting temperature is 95 ° C.

If the load is increased and the amount of heat generated by the processor cores 11 is larger than the amount of heat released, the thermal equilibrium is broken and the temperature starts to rise.

Until the rising temperature exceeds the limiting temperature (point A), the load condition may be mitigated at any time and the temperature may be lowered, so that it is not necessary to change the operating condition.

If no action is taken after the temperature has exceeded the limiting temperature (point A), the temperature will continue to rise and pass through point B and reach the limit temperature at point C.

On the other hand, if any action is taken to lower the operating condition before the temperature has crossed point A and passed through point B, the temperature will reach the limit temperature at point C 'later than point C as the upward trend is relaxed.

If additional measures are taken to lower the operating conditions after the temperature has passed the B 'point along a relaxed upward trend, the temperature may change to a downward trend after a short time and may be lower than the limiting temperature at point D.

The semiconductor processor apparatus according to embodiments of the present invention determines the relaxation measure of the operating condition based on the thermal margin and the current temperature from the limit temperature to the limit temperature rather than the current temperature itself. Thus, if the thermal margin is largely determined, the operating conditions can be determined to reduce the heat generation at a relatively low temperature, for example, a limited temperature of 90 DEG C. However, if the thermal margin is determined to be small, The operating conditions can be determined so as to reduce the heat generation.

As such, the present invention can dynamically perform thermal management based on the dynamically controlled thermal margin and the current temperature.

Accordingly, the thermal margin state is a first state under which the current temperature does not reach the limit temperature so that measures to reduce the heat are not yet required. If the current temperature has reached the limit temperature, Or a third state in which a measure is taken as the current temperature reaches the limit temperature and thus observes the current temperature under the varied operating conditions. In the present invention, these states may be referred to as a safety state, a warning state, and a dangerous state, respectively.

Referring back to FIG. 1, the thermal margin state determination unit 120 determines whether the thermal margin state of the processor cores 11 is one of a safety state, a warning state, and a dangerous state according to the present temperature, thermal margin, You can decide.

Specifically, if the current temperature is lower than the limit temperature according to the thermal margin, the thermal margin state determination unit 120 can determine that the thermal management policy is not yet changed and that the thermal margin state is the safe state.

On the other hand, if the present temperature becomes higher than the limit temperature according to the thermal margin, the thermal margin state determination unit 120 may immediately change the thermal management policy and determine the thermal margin state as the warning state.

Assuming two cases where the current temperature is the same, in the case where the thermal margin is set to be small, the thermal margin is maintained in a safe state even at a higher current temperature than in the case where the thermal margin is set high. Accordingly, if a thread with a high priority is executed and the thermal margin is determined to be close to zero, the thermal margin state can remain in a safe state even if the current temperature is close to the limit temperature, And can be set as an operation condition that provides the maximum performance continuously.

On the other hand, if low priority threads are executed, the size of the thermal margin can be relatively large. When the thermal margin is increased, the limiting temperature is lowered, and even at lower temperatures, the thermal margin state is switched to the warning state, and measures are taken to reduce heat generation. Thus, if only low priority threads are being executed, the thermal margin state can enter the warning state even if the current temperature is much lower than the threshold temperature, and the processors can be operated under conditions that reduce the heat even though the current temperature is low Can be set.

On the other hand, after a measure to reduce the heat generation, the semiconductor processor apparatus 10 can observe a change in temperature for a while. In this case, the thermal margin state determination unit 120 can determine that the thermal margin state is a dangerous state. The thermal margin state determination unit 120 may transition to a warning state to determine a more aggressive thermal management policy or may maintain a risk state requiring additional observation while maintaining the current thermal management policy, Or it may transition to a safe state even if the current action is no longer necessary and returns to the previous operating condition.

Referring to FIG. 3, a transition of the thermal margin state is illustrated. Initially, the thermal margin state is Safe_Zone.

While the thermal margin is in a safe state, the thermal margin is determined and the limiting temperature according to the determined thermal margin is compared to the current temperature.

If the current temperature is lower than the limiting temperature, the thermal margin state can be maintained in a safe state.

On the other hand, if the current temperature exceeds the limit temperature when the thermal margin state is the safety state, the thermal margin state can be changed from the safety state to the alarm state (Alarm_State).

When the thermal margin condition is in the warning state, the thermal management policy is appropriately determined.

When the thermal management policy is newly determined in the policy decision unit 130, the thermal margin state is changed to a danger state (Danger_Zone).

When the thermal margin condition is in a dangerous state, a trend of the current temperature is observed.

If, as a result of observing the current temperature in the critical state, the current temperature exceeds the secondary limiting temperature, the thermal margin state is changed back to the warning state for the change of the thermal management policy.

On the other hand, if the current temperature is lower than the return temperature due to the thermal margin, the thermal margin state can be changed to the safe state.

If the current temperature is higher than the limiting temperature but lower than the second limiting temperature, the thermal margin state remains at risk and the trend of the current temperature can be observed.

The limiting temperature determining the transition from the safe state to the warning state, the secondary limiting temperature determining the transition from the dangerous state to the warning state, and the returning temperature determining the transition from the dangerous state to the safe state are all set differently according to the designer's intention Or may be set to be the same. Depending on the embodiment, at least the limiting temperature can be set based on the thermal margin. The secondary limiting temperature or return temperature may be set based on the thermal margin or the limiting temperature.

Depending on the embodiment, the thermal margin may be determined according to the priority of the threads and the load of the processor cores 11.

For example, depending on the priority of the thread with the highest priority among the threads, the thermal margin may be relatively high or low respectively.

More specifically, the higher the priority of the thread having the highest priority among the threads, the smaller the thermal margin and the relatively higher the temperature limit. Conversely, the lower the priority of the thread with the highest priority among the threads, the larger the thermal margin and the lower the limiting temperature.

For example, the priority may be classified as "real time", "very high", "high", "normal", "low", "very low", and the highest priority thread , The thermal margin may be very small and the limiting temperature may be close to the critical temperature. Assuming two cases where the current temperature is the same, in the case where the limiting temperature is set to be high according to the small thermal margin, the thermal margin state is maintained in a safe state even at the higher current temperature as compared with the case where the limiting temperature is set lower according to the large thermal margin And is not switched to the warning state. Thus, if a highly prioritized thread is executed, the thermal margin state can remain in a safe state due to the increased limiting temperature even if the current temperature approaches the limit temperature, and the processors continue to exhibit maximum performance As shown in FIG. In addition, even if the current temperature becomes extremely high and eventually switches to a warning or dangerous state and measures are taken to reduce the heat, the high return temperature allows the system to switch back to a safe state for maximum performance. Thus, the performance of the processor can be maximized when the priority thread having a high priority is driven.

On the other hand, if the priority of the highest priority thread among the executed threads is, for example, "low ", the thermal margin is set to a large value, and the limiting temperature may be lowered to near room temperature. In the two cases where the current temperature is the same, if the thermal margin is increased, the limit temperature is exceeded even at the lower current temperature, the thermal margin state is switched to the warning state, and measures are taken to reduce the heat. Accordingly, if only low priority threads are being executed, the thermal margin state can enter the warning state even if the current temperature is sufficiently lower than the threshold temperature, and the processors can be operated under the condition that the heat is reduced even though the current temperature is low Can be set. Furthermore, when the return temperature is set to a lower value, even if the current temperature is lower, the thermal margin state can not be easily switched to the safety state, and the operating condition for reducing the heat can be maintained. This makes it possible to lower the temperature of the processor as low as possible in preparation for the operation of a thread having a higher priority in the future, thereby ensuring maximum performance when a higher priority thread is driven later.

Referring again to FIG. 1, the policy determination unit 130 may determine a thermal management policy for the processor cores 11 based on the thermal margin state.

According to the embodiment, the policy determination unit 130 may determine a new thermal management policy while the thermal margin state determined by the thermal margin state determination unit 120 is in the warning state, and in particular, if the current temperature does not exceed the second- Or a new thermal management policy may be determined such that the current temperature is lower than the return temperature.

Accordingly, the processor core setting unit 12 can control activation, voltage, and frequency of the processor cores according to the thermal management policy determined by the policy determination unit 130. [

Meanwhile, the above-described thermal management policy mainly adopts a hardware approach such as activation / deactivation of a processor core, voltage and frequency setting. However, according to the embodiment, in the thermal management technique of the present invention, Lt; RTI ID = 0.0 > priority. ≪ / RTI >

Accordingly, the scheduler 140 may include threads running on the processor cores 11, for example, priority threads, such as foreground threads, for example, background threads, The same non-priority threads can be distinguished.

For example, the threads may first be illustrated as threads directly related to the user experience, as threads that create a screen of the mobile device, process the user's instructions to the mobile device, or display processing results to the user. On the other hand, for example, non-priority threads are either not directly related to the user experience, or are threads that are run for the threads first.

If the processor core settings are adjusted to lower performance, then first, threads may noticeably deteriorate the perceived performance if not handled properly, but non-primed threads do not have a significant impact on perceived performance .

Accordingly, the scheduler 140 may adjust the time slices allocated to the non-priority threads according to the thermal management policy.

When the thermal management policy becomes strict, the processing power of the processor cores 11 is reduced because the speed and voltage are lowered to reduce the heat generation. Thus, the scheduler 140 firstly controls the CPUs of the threads so that the user- Increase the share, and instead reduce the CPU share of non-priority threads.

Accordingly, the scheduler 140 may operate to allocate less time slices to non-preferred threads, and to allocate more time slices to the threads first.

In addition, when dividing the threads into priority threads and non-priority threads, the current load, which is one of the variables constituting the thermal model, is used to process the priority threads among the threads driven in the processor cores 11 Related load.

On the other hand, even when the processor core settings are adjusted to lower overall performance, it is often the case that threads require high performance on the processor cores. For example, if the threads that need to display processing results to the user within a short time limit are temporarily run until the time limit expires, the thermal management technique of the present invention can temporarily accelerate performance for those threads have.

Referring to FIG. 4 for explaining this high performance burst state, FIG. 4 is a flowchart illustrating a method for temporarily storing a high performance burst in a thermal management apparatus for a semiconductor processor apparatus according to an embodiment of the present invention. Fig.

In FIG. 4, when a graph of the load of the processor cores 11 is observed under certain operating conditions with intermediate performance, it can be seen that the load momentarily has several peaks. If the load temporarily exceeds a predetermined threshold load in the case where the performance is lowered for the purpose of thermal management, the performance may need to be temporarily accelerated.

Conventionally, conventional on-demand power management governors maximize the performance of the processor when higher performance is required than processing power.

On the other hand, the thermal management technique of the present invention corresponds to a method of determining a performance state of a processor based on a load of threads when a situation requiring performance acceleration occurs.

In this context, the performance state determiner 150 in FIG. 1 may determine the performance state based on the load of the threads and may generate the performance acceleration request if the determined performance state is a high performance requirement state.

According to an embodiment, the performance state determiner 150 determines a performance state by comparing a load amount related to priority threads among threads driven in processor cores to a threshold load amount, and determines a performance state based on a load related to priority threads If this is a high performance required state that exceeds the threshold load, a performance acceleration request can be generated.

When a performance acceleration request is received from the performance state determination unit 150, the policy determination unit 130 selects a processor core configuration that provides higher performance than the current processor core configuration among the plurality of processor core configurations, You can determine the thermal management policy based on processor core configuration.

The operation of the performance state determination unit 150 and the policy determination unit 130 is also illustrated in the state diagram of FIG.

3, the performance state determined by the performance state determination unit 150 is equivalent to the thermal margin state determined by the thermal margin state determination unit 120, for the thermal management policy of the policy decision unit 130, It can affect.

For this, the performance state can transition between the performance monitoring state and the high performance required state.

If the load is initially at a normal level, the performance status is a performance monitoring status (QoS_Watchdog).

While the performance state is in the performance monitoring state, the detect_perf_burst () function is executed to continuously monitor the load of the processor cores 11 and to detect whether performance acceleration is required.

If a load is detected (on_High_Perf_Detection), especially a situation where the load of the threads exceeds a predetermined threshold load and a performance acceleration is required (on_High_Perf_Detection), then the performance state transitions to a high performance required state (Upscale).

When the performance state transits to the high performance required state, the increase_cpu_perf () function that generates a performance acceleration request to the policy decision unit 130 is executed, and the performance state immediately transitions to the performance monitoring state (on_Upscale).

If the load still exceeds the threshold load after the performance has been accelerated, the performance state may be shifted back to the high performance required state and the performance acceleration request generated again may be repeated.

5 is a flowchart illustrating a method for managing a thermal process for a semiconductor processor apparatus according to an embodiment of the present invention.

5, a thermal management method for a semiconductor processor apparatus including one or more processor cores according to an embodiment of the present invention includes a step S51 in which the semiconductor processor apparatus 10 processes the threads The thermal margin can be determined based on at least one of the priority and the load of the processor cores 11. [ Depending on the embodiment, the thermal margin may be determined to be smaller as the priority of the threads is higher, and thus the limiting temperature may be determined to be higher.

According to the embodiment, the thermal margin can be determined to be smaller as the load of the processor cores 11 is higher, and thus the limiting temperature can be determined to be higher.

Specifically, the thermal margin can be determined to be smaller as the weighted summation value of the priority of the threads and the load of the processor cores 11 is higher, and thus the limiting temperature can be determined to be higher.

Subsequently, in step S52, the semiconductor processor apparatus 10 can determine the thermal margin state based on the thermal margin and the current temperature.

According to the embodiment, the step of determining the thermal margin state of step S52 may include determining the thermal margin state of the processor cores 11 according to the result of comparing the present temperature to the limiting temperature according to the thermal margin, As one of a safety state, a warning state, and a dangerous state. Here, the limiting temperature is a temperature as low as the thermal margin based on the limiting temperature.

More specifically, the step of determining the thermal margin state of step S52 is to maintain the thermal margin state in a safe state when the current temperature is lower than the limit temperature according to the thermal margin when the thermal margin state is in a safe state, And changing the thermal margin state from the safety state to the warning state if the temperature is higher than the limit temperature according to the margin.

The step of determining the thermal margin state of step S52 may include changing the thermal margin state to the critical state when the thermal management policy is determined when the thermal margin state is the warning state.

Further, the step of determining the thermal margin state of step S52 may include changing the thermal margin state to the warning state if the current temperature is higher than the second limit temperature when the thermal margin state is in a dangerous state, And if the current temperature is lower than the return temperature, changing the thermal margin state to the safety state. Depending on the embodiment, the secondary limiting temperature may be set to be equal to or greater than the limiting temperature. Depending on the embodiment, the return temperature may be set to be equal to or less than the limiting temperature.

Subsequently, at step S53, the semiconductor processor device 10 may determine a thermal management policy for the processor cores based on the thermal margin state.

Specifically, the step of determining the thermal management policy in step S53 is a step in which the semiconductor processor device 10 determines whether or not the thermal current is lower than the second limit temperature or the return temperature And determining the thermal management policy so that the thermal management policy is lower.

Subsequently, in step S54, the semiconductor processor device 10 can control activation, voltage and frequency of the processor cores according to the determined thermal management policy.

On the other hand, according to the embodiment, the thermal management method for the semiconductor processor apparatus may further include the step S55 so as to maintain the user perception performance by software.

In step S55, the semiconductor processor apparatus 10 divides the threads, which are driven in the processor cores, into the priority threads and the non-priority threads, and adjusts the time slices allocated to the non-priority threads according to the determined thermal management policy Lt; / RTI >

In this case, the current load may be a load related to processing priority threads among the threads running in the processor cores.

On the other hand, according to the embodiment, the thermal management method for the semiconductor processor apparatus may further include steps S56 and S57 so that the performance can be increased as necessary in order to maintain the bodily sensation performance for the user.

In step S56, the semiconductor processor apparatus 10 monitors the occurrence of a performance acceleration situation in which the load related to the priority threads among the threads driven in the processor cores 11 exceeds the threshold load, If detected, a performance acceleration request can be generated.

In addition, in step S57, the semiconductor processor device 10, in accordance with the performance acceleration request, selects a processor core setting that provides higher performance than the current performance among the plurality of processor core settings, Management policies can be determined.

It is to be understood that both the foregoing general description and the following detailed description of the present invention are exemplary and explanatory and are intended to provide further explanation of the invention as claimed. It will be understood that variations and specific embodiments which may occur to those skilled in the art are included within the scope of the present invention.

Further, the apparatus according to the present invention can be implemented as a computer-readable code on a computer-readable recording medium. A computer-readable recording medium includes all kinds of recording apparatuses in which data that can be read by a computer system is stored. Examples of the recording medium include ROM, RAM, optical disk, magnetic tape, floppy disk, hard disk, nonvolatile memory and the like. The computer-readable recording medium may also be distributed over a networked computer system so that computer readable code can be stored and executed in a distributed manner.

10 semiconductor processor device
11 processor cores
12 processor core setting section
13 Supply Voltage Generator
14 clock frequency generator
15 Temperature sensor
100 thermal management device
110 thermal margin determination unit
120 thermal margin state determination unit
130 Policy decision section
140 Scheduler
150 performance state determination unit

Claims (20)

A thermal margin determining unit for determining a thermal margin based on any one of a priority of threads driven in one or more processor cores constituting a semiconductor processor apparatus and a load of the processor cores;
A thermal margin state determiner for determining a thermal margin state based on the current temperature of the semiconductor processor and the thermal margin;
A policy determination unit for determining a thermal management policy for the processor cores based on the thermal margin state; And
And a processor core setting unit for setting activation, voltage and frequency of the processor cores according to the thermal management policy,
Wherein the thermal margin is a difference value between a limiting temperature, which is a temperature for protecting the semiconductor processor device, and a limiting temperature, which is a temperature causing a variation of the thermal management policy,
Wherein the thermal margin state is determined from a state in which the current temperature is lower than the limit temperature or not,
The thermal margin state determination unit
If the present thermal margin is in the first state and the current temperature is lower than the limit temperature, the thermal margin state is kept in the first state. If the current temperature is higher than the limit temperature, the thermal margin state is changed from the first state to the second state ≪ / RTI >
Changes the thermal margin state to the third state when the thermal management policy is changed when the current thermal margin state is the second state,
If the current thermal margin state is the third state and the current temperature is higher than the second limit temperature, the thermal margin state is changed to the second state. If the present temperature is lower than the second limit temperature but higher than the return temperature, 3 state and operates to change the thermal margin state to the first state when the present temperature becomes lower than the return temperature,
Wherein the policy decision unit determines the thermal management policy so that the current temperature is lower than the second limit temperature or the return temperature while the thermal margin state is the second state while maintaining the current thermal management policy while the thermal margin state is the first state, Wherein the semiconductor memory device is operable to store the semiconductor memory device. 2. The apparatus of claim 1, wherein the thermal margin determining unit
Wherein the processor is operative to determine the thermal margin to be smaller as the priority of the threads is higher or the load of the processor cores is higher. 2. The apparatus of claim 1, wherein the thermal margin state determiner
Determining a thermal margin state as a first state when the current temperature is lower than the limit temperature, and determining a thermal margin state as a second state when the present temperature is higher than the limit temperature,
Wherein the policy decision unit maintains the current thermal management policy while the thermal margin state is in the first state and maintains the current thermal management policy while the thermal margin state is in the second state, And to repeatedly perform the observation of the change of the current temperature according to the management policy. delete A thermal margin determining unit for determining a thermal margin based on any one of a priority of threads driven in one or more processor cores constituting a semiconductor processor apparatus and a load of the processor cores;
A thermal margin state determiner for determining a thermal margin state based on a current temperature of the semiconductor processor device and the thermal margin; And
And a policy determination unit that determines a thermal management policy for the processor cores based on the thermal margin state,
Wherein the thermal margin is a difference value between a limiting temperature, which is a temperature for protecting the semiconductor processor device, and a limiting temperature, which is a temperature causing a variation of the thermal management policy,
Wherein the thermal margin state is determined from a state in which the current temperature is lower than the limit temperature or not,
The thermal margin state determination unit
If the present thermal margin is in the first state and the current temperature is lower than the limit temperature, the thermal margin state is kept in the first state. If the current temperature is higher than the limit temperature, the thermal margin state is changed from the first state to the second state ≪ / RTI >
Changes the thermal margin state to the third state when the thermal management policy is changed when the current thermal margin state is the second state,
If the current thermal margin state is the third state and the current temperature is higher than the second limit temperature, the thermal margin state is changed to the second state. If the present temperature is lower than the second limit temperature but higher than the return temperature, 3 state and operates to change the thermal margin state to the first state when the present temperature becomes lower than the return temperature,
Wherein the policy determining unit maintains the current thermal management policy while the thermal margin state is in the first state and the third state and maintains the current thermal management policy while the thermal margin state is in the second state, And to determine a management policy. ≪ Desc / Clms Page number 21 > 6. The apparatus of claim 5, wherein the thermal margin determining unit
Wherein the processor is operative to determine the thermal margin to be smaller as the priority of the threads is higher or the load of the processor cores is higher. 6. The apparatus of claim 5, wherein the thermal margin state determiner comprises:
Determining a thermal margin state as a first state when the current temperature is lower than the limit temperature, and determining a thermal margin state as a second state when the present temperature is higher than the limit temperature,
Wherein the policy decision unit maintains the current thermal management policy while the thermal margin state is in the first state and maintains the current thermal management policy while the thermal margin state is in the second state, And to repeatedly perform the observation of the change of the current temperature according to the management policy. delete 6. The thermal management apparatus of claim 5, wherein the secondary limiting temperature and the return temperature are determined based on the thermal margin. 6. The thermal management apparatus of claim 5, wherein the load of the processor cores is a load associated with processing threads directly interacting with a user among threads driven in the processor cores. The method of claim 5, further comprising: dividing threads running in the processor cores into threads that directly interact with the user and non-threads that are not interacting with the user, Further comprising a scheduler operative to adjust the temperature of the semiconductor device. 6. The method of claim 5, further comprising: monitoring occurrence of a performance acceleration situation in which a load related to threads directly interacting with a user among threads driven in the processor cores exceeds a threshold load, Further comprising a performance acceleration status monitoring unit for generating a performance acceleration status,
Wherein the policy determining unit selects a processor core setting that provides higher performance than a current performance among a plurality of processor core settings when a performance acceleration request is received from the performance acceleration status monitoring unit, Wherein the processor is operative to determine a policy. A thermal management method for a semiconductor processor device comprising one or more processor cores,
Determining a thermal margin based on any one of a priority of threads driven in the processor cores and a load on the processor cores;
Determining a thermal margin condition based on the current temperature and the thermal margin of the semiconductor processor device; And
Determining a thermal management policy for the processor cores based on the thermal margin state,
Wherein the thermal margin is a difference value between a limiting temperature, which is a temperature for protecting the semiconductor processor device, and a limiting temperature, which is a temperature causing a variation of the thermal management policy,
Wherein the thermal margin state is determined from a state in which the current temperature is lower than the limit temperature or not,
The step of determining the thermal margin condition
When the current thermal margin state is the first state, if the current temperature is lower than the limit temperature, the thermal margin state is maintained in the first state, and if the present temperature becomes higher than the limit temperature, the thermal margin state is changed from the first state to the second state State;
Changing the thermal margin state to a third state when the thermal management policy is changed when the current thermal margin state is the second state; And
When the current thermal margin state is the third state, the thermal margin state is changed to the second state when the present temperature is higher than the second limit temperature, and when the present temperature is lower than the second limit temperature but higher than the return temperature, Maintaining the third state, and changing the thermal margin state to the first state when the current temperature is lower than the return temperature,
The step of determining the thermal management policy
Maintaining a current thermal management policy while the thermal margin state is in a first state and a third state; And
And determining the thermal management policy such that the current temperature is lower than the second limit temperature or the return temperature while the thermal margin state is the second state. 14. The method of claim 13,
And controlling the activation, voltage and frequency of the processor cores according to the thermal management policy. 14. The method of claim 13, wherein determining the thermal margin comprises:
And determining the thermal margin to be smaller as the priority of the threads is higher or the load of the processor cores is higher. 14. The method of claim 13, wherein determining the thermal margin condition comprises:
Determining a thermal margin state as a first state if the current temperature is lower than the limit temperature and determining a thermal margin state as a second state when the current temperature is higher than the limit temperature,
The step of determining the thermal management policy
Maintaining a current thermal management policy while the thermal margin state is in a first state; And
Repeatedly performing the observation of the change of the thermal management policy and the change of the present temperature according to the changed thermal management policy until the current temperature becomes lower than the limit temperature while the thermal margin state is the second state A method of thermal management for a semiconductor processor device. delete 14. The method of claim 13, wherein threads running on the processor cores are first divided into threads that directly interact with threads and non-priority users and non-threads, Further comprising the step of adjusting time slices assigned to the threads. ≪ Desc / Clms Page number 17 > 14. The method of claim 13,
Monitoring a generation of a performance acceleration situation where a load related to threads directly interacting with a user among threads driven in the processor cores exceeds a threshold load and generating a performance acceleration request when a performance acceleration situation is detected, Further included,
Wherein the determining the thermal management policy comprises: selecting a processor core configuration that provides higher performance than the current performance among a plurality of processor core configurations in response to the performance acceleration request; And determining a temperature of the semiconductor device. A program recorded on a computer-readable recording medium which is created by a computer to perform the steps of a thermal management method for a semiconductor processor apparatus according to any one of claims 13 to 16 and claims 18 to 19.

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