KR101707767B1 - Molding process of a chip scale package - Google Patents

Molding process of a chip scale package Download PDF

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Publication number
KR101707767B1
KR101707767B1 KR1020160030964A KR20160030964A KR101707767B1 KR 101707767 B1 KR101707767 B1 KR 101707767B1 KR 1020160030964 A KR1020160030964 A KR 1020160030964A KR 20160030964 A KR20160030964 A KR 20160030964A KR 101707767 B1 KR101707767 B1 KR 101707767B1
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KR
South Korea
Prior art keywords
cavity
semiconductor chip
mold
contact member
lower mold
Prior art date
Application number
KR1020160030964A
Other languages
Korean (ko)
Inventor
이경준
정대성
Original Assignee
주식회사 참테크
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Publication date
Application filed by 주식회사 참테크 filed Critical 주식회사 참테크
Priority to KR1020160030964A priority Critical patent/KR101707767B1/en
Application granted granted Critical
Publication of KR101707767B1 publication Critical patent/KR101707767B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67126—Apparatus for sealing, encapsulating, glassing, decapsulating or the like
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/315—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the encapsulation having a cavity
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157—Partial encapsulation or coating
    • H01L23/3185—Partial encapsulation or coating the coating covering also the sidewalls of the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/1815—Shape

Abstract

The present invention solves a height deviation of a semiconductor chip by a simple manufacturing process to minimize defects in the molding process and also prevents defects in the molding process by a simple structure to simplify the structure of the mold apparatus itself To a molding method of a chip scale package capable of providing convenience in manufacturing.
According to the present invention, a plurality of semiconductor chips 11 are coupled to a base plate 10 in a cavity 33 formed in a lower mold 31 or a middle plate 32 coupled to the lower mold 31 (ST100); The cushion contact member 36 formed with the adhesive layer 38 to be pressed by the upper mold 30 positioned on the upper mold 31 or the middle plate 32 is brought into close contact with the upper surface of the semiconductor chip 11 Step ST200; And a step (ST300) of injecting a molding material into the cavity (33).

Description

[0001] The present invention relates to a method of forming a chip scale package,

The present invention relates to a method of forming a chip scale package, and more particularly, to a method of forming a chip scale package capable of minimizing defects in a molding process by a simple manufacturing process while providing convenience in manufacturing.

Generally, a chip scale package is formed in a size of a semiconductor chip level so that it can be easily applied to an electronic device seeking a small size and light weight. An example of a conventional molding method for manufacturing such a chip scale package is shown in the drawing The following will be outlined.

The upper mold 20 and the lower mold 21 form an object to be molded in which a plurality of semiconductor chips 11 are coupled to the base plate 10 as shown in FIG. A cavity 23 in which the semiconductor chip 11 is embedded in a state of covering the periphery of the base plate 10 mounted on the lower mold 21 and a cavity 23 communicating with the cavity 23, The upper mold 20 may be provided with a cavity block 25 corresponding to the cavity 23 and operated by an elastic member 26, will be.

The upper surface of the middle plate 22 is brought into close contact with the upper mold 20 while the base plate 10 is seated on the lower mold 21, So that the upper surface of the semiconductor chip 11 is in close contact with the upper surface of the semiconductor chip 11.

The upper mold 20 hermetically seals the upper portion of the cavity 23 to prevent leakage of the molding material and prevents the molding material from flowing into the upper surface of the semiconductor chip 11, The upper surface of the semiconductor chip 11 is formed with electrical contacts electrically connected in a subsequent process, thereby preventing the molding material from being fixedly formed in the molding process.

However, the height of each semiconductor chip 11 may be varied due to an error or the like generated during the manufacturing process of the semiconductor chip 11. However, according to the conventional mold or molding method, So that the molding material can be injected into the upper surface of the semiconductor chip 11 having a relatively low height.

As shown in FIG. 1 (b), in order to solve the above-mentioned problem, the pressing force of the upper mold 20 is increased and the cavity block 25 is formed on the upper surface of each semiconductor chip 11 as a whole There is a possibility that defects such as breakage of a part of the semiconductor chip 11 and deformation of the base plate 10 may occur due to an excessive pressing force of the upper mold 20. [

Korean Patent Publication No. 2001-0069064 (2001. 07. 23)

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and it is an object of the present invention to solve the height deviation of a semiconductor chip by a simple manufacturing process to minimize defects in the molding process, And to provide a molding method of a chip scale package that can simplify the structure of the mold apparatus itself and can provide convenience in manufacturing by preventing defects.

According to an aspect of the present invention, a molding object in which a plurality of semiconductor chips 11 are coupled to a base plate 10 is inserted into a lower mold 31 or a middle plate 32 coupled to the lower mold 31, (ST100) placing the object to be molded in the cavity (33) so that the upper part of the semiconductor chip (11) is exposed;

The upper mold 30 located at the upper portion of the lower mold 31 or the middle plate 32 has an area smaller than the cross sectional area of the cavity 33 and an adhesive layer 38 formed on the lower surface thereof, (ST200) having a tight contact member (36) and closely contacting the upper surface of the semiconductor chip (11) with the cushion contact member (36);

(ST300) of injecting a molding material into the cavity (33) in a state where the upper mold (30) and the lower mold (31) or the middle plate (32) are merged. Method is provided.

According to another aspect of the present invention, after the step (ST300) of injecting the molding material into the cavity (33), the adhesive layer (38) is cured so that the cushion contact member (36) (ST400) of removing the chip-scale package from the chip-scale package.

As described above, according to the present invention, as the upper surface of the molding object is closely contacted by the cushion contact member 36 pressed by the upper mold 30, the molding is performed by the cushion contact member 36 The upper surface of the semiconductor chip 11 can be covered so that the inflow of the molding material can be blocked and thereby the upper surface of the semiconductor chip 11 can be protected to smoothly perform the electrical connection work and the like in the post- There is an advantage that it can be prevented.

The adhesive layer 38 of the cushioning contact member 36 is cured and removed from the upper surface of the semiconductor chip 11 so that the adhesive layer 38 is formed by the UV curing device 40 irradiated with ultraviolet rays, Can be easily removed on the semiconductor chip 11, so that it is possible to reduce the troubles of the damage and removal of the product.

1 is a cross-sectional view showing a molding method according to a conventional example
2 is a flow chart illustrating a manufacturing process according to an embodiment of the present invention.
FIG. 3 is a cross-sectional view of a part of a manufacturing process according to an embodiment of the present invention
4 is a cross-sectional view showing another part according to an embodiment of the present invention
5 is a cross-sectional view showing another part according to an embodiment of the present invention

The objects, features and advantages of the present invention will become more apparent from the following detailed description. Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.

2 to 5 show a preferred embodiment of the present invention. 2, the molding method of the present invention includes the step of placing a molding object in a state where a plurality of semiconductor chips 11 are coupled to the cavity 33 of the lower mold 31 or the middle plate 32 A step ST200 of closely contacting the upper surface of the semiconductor chip 11 with the cushion contact member 36 in which the adhesive layer 38 is formed so as to be pressed by the upper mold 30, And a step ST400 of removing the cushion contact member 36 from the upper surface of the semiconductor chip 11 by curing the step of injecting ST300 and the adhesive layer 38. This is described in detail with reference to FIG. Then,

3, in step ST100 of placing a molding object in a state where a plurality of semiconductor chips 11 are coupled to the cavity 33 of the lower mold 31 or the middle plate 32, A separate intermediate plate 32 is further mounted on the upper surface of the base plate 10 so as to seat an object to be molded in which a plurality of semiconductor chips 11 are coupled to the base plate 10. A cavity 33 for embedding the semiconductor chip 11 and a gate 34 communicating with the cavity 33 for supplying a molding material are formed and a stopper 35 is provided around the bottom surface of the cavity 33 So as to support the upper surface of the base plate 10.

In the step ST200 of closely contacting the upper surface of the semiconductor chip 11 with the cushion contact member 36 formed with the adhesive layer 38 so as to be pressed by the upper mold 30, The cushion contact member 36 in the form of a plate similar to the cushion contact member 36 is prepared and brought into close contact with the upper surface of the semiconductor chip 11 in a state of covering the semiconductor chip 11 as a whole. The adhesive layer 38 is formed of an elastic material such as urethane or silicone and has a predetermined thickness so that the pressing force of the upper mold 30 It has a certain degree of cushion.

4, in step ST300 of injecting the molding material into the cavity 33, the cushion contact member 36 is pressed by the upper mold 30, as described above, The molding material is supplied to the cavity 33 through the gate 34 of the middle plate 32 while being in close contact with the upper surface of the chip 11.

Specifically, the cushion contact member 36 comes into contact with the upper surface of the semiconductor chip 11 due to the pressing of the upper mold 30, so that the cushion contact member 36 can be elastically deformed, The cushion contact member 36 can be adhered to the upper surface of all the semiconductor chips 11 and the groove 30a corresponding to the cushion contact member 36 is formed on the bottom surface of the upper mold 30. [ ) Can be formed.

5, in step ST400 of removing the cushion contact member 36 from the upper surface of the semiconductor chip 11 by curing the adhesive layer 38, As the ultraviolet rays are irradiated by the curing device 40 or the like, the adhesiveness is lost or decreased in the process of curing the adhesive layer 38 made of silicon or urethane, so that the removal from the semiconductor chip 11 is facilitated.

According to this manufacturing process, it is possible to prevent the semiconductor chip 11 from being damaged due to the minute damage of the semiconductor chip 11 or the residual adhesive component during the process of removing the cushion contact member 36, It is possible to eliminate the hassle and provide convenience in operation.

After the intermediate plate 22 is separated from the lower mold 31, the molded article 12 is integrally formed on the base plate 10 from the mold by an ejector or the like not shown around the semiconductor chip 11 It is possible to discharge the product and supply the formed product to a post-process or the like.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the inventions. It will be apparent to those of ordinary skill in the art.

10: base plate 11: semiconductor chip
12: Molded product 30: Upper mold
31: Lower mold 32: Middle plate
33: cavity 34: gate
35: engagement jaw 36: cushion contact member
37: substrate film 38: adhesive layer
40: UV curing device

Claims (2)

A molding object in which a plurality of semiconductor chips 11 are coupled to a base plate 10 is formed in a cavity 33 formed in a lower mold 31 or an intermediate plate 32 coupled to the lower mold 31 (ST100) placing the object to be molded in the cavity (33) so that the upper part of the semiconductor chip (11) is exposed;
The upper mold 30 located at the upper portion of the lower mold 31 or the middle plate 32 has an area smaller than the cross sectional area of the cavity 33 and an adhesive layer 38 formed on the lower surface thereof, (ST200) having a tight contact member (36) and closely contacting the upper surface of the semiconductor chip (11) with the cushion contact member (36);
(ST300) of injecting a molding material into the cavity (33) in a state where the upper mold (30) and the lower mold (31) or the middle plate (32) are merged. Way.
The method according to claim 1, wherein after the molding material is injected into the cavity (ST300), the adhesive layer (38) is cured to remove the cushion contact member (36) (ST400) of forming a chip-scale package.
KR1020160030964A 2016-03-15 2016-03-15 Molding process of a chip scale package KR101707767B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1020160030964A KR101707767B1 (en) 2016-03-15 2016-03-15 Molding process of a chip scale package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020160030964A KR101707767B1 (en) 2016-03-15 2016-03-15 Molding process of a chip scale package

Publications (1)

Publication Number Publication Date
KR101707767B1 true KR101707767B1 (en) 2017-02-16

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08156029A (en) * 1994-12-08 1996-06-18 Nitto Denko Corp Manufacture of semiconductor package, film used therefor, and its mold
KR20010069064A (en) 2000-01-12 2001-07-23 윤종용 Manufacturing method for chip scale package
KR100373554B1 (en) * 1996-07-12 2003-02-26 후지쯔 가부시끼가이샤 Method for manufacturing semiconductor divice, semiconductor device and mounting structure thereof

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08156029A (en) * 1994-12-08 1996-06-18 Nitto Denko Corp Manufacture of semiconductor package, film used therefor, and its mold
KR100373554B1 (en) * 1996-07-12 2003-02-26 후지쯔 가부시끼가이샤 Method for manufacturing semiconductor divice, semiconductor device and mounting structure thereof
KR20010069064A (en) 2000-01-12 2001-07-23 윤종용 Manufacturing method for chip scale package

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