KR101490486B1 - Display device and method for manufacturing the same - Google Patents

Abstract

A display device according to an embodiment of the present invention includes a first insulating substrate, a gate line formed on the first insulating substrate, a data line crossing the gate line, a thin film transistor connected to the gate line and the data line, A pixel electrode connected to the thin film transistor, a second insulating substrate facing the first insulating substrate, a common electrode formed on the second insulating substrate, a first insulating substrate and a second insulating substrate, And a spacing member which is formed integrally with the partition and which maintains a gap between the first insulating substrate and the second insulating substrate.

Display device, spacers, inkjet, shielding member

Description

TECHNICAL FIELD [0001] The present invention relates to a display device,

The present invention relates to a display device and a method of manufacturing the same.

The liquid crystal display device is one of the most widely used flat panel display devices, and is composed of two display panels having electrodes formed thereon and a liquid crystal layer interposed therebetween, and applying voltage to the electrodes to rearrange the liquid crystal molecules of the liquid crystal layer It is a display device that adjusts the amount of transmitted light.

Among the liquid crystal display devices, a structure which is mainly used at present is a structure in which electric field generating electrodes are provided on two display panels. Among them, a plurality of thin film transistors and pixel electrodes are arranged in the form of a matrix in one display panel (hereinafter referred to as 'thin film transistor display panel'), and red, green, and blue A structure in which a blue color filter is formed and a common electrode covers the entire surface is the mainstream.

However, since the pixel electrode and the color filter are formed on different display panels, it is difficult to precisely align the pixel electrode and the color filter, so that an alignment error may occur.

To solve this problem, a color filter on array (COA) structure in which a color filter and a pixel electrode are formed on the same display panel has been proposed.

When forming the color filter together with the thin film transistor, the color filter may be formed by an inkjet printing method. The ink-jet printing method is a technique in which liquid inks are jetted to a predetermined position partitioned by each ink to realize a colored image, and a plurality of color filters including a red filter, a green filter and a blue filter can be formed at one time, , Time and cost can be greatly reduced.

At this time, since the ink jet printing method uses ink in a liquid state, it requires a partition wall capable of confining them, which may be lost due to insufficient adhesion between the particles and the substrate in the exposure machine. In this case, the ink in the liquid state may be mixed with the color of the neighboring pixel through the lost portion of the partition wall.

In addition, due to the characteristics of the liquid, the thickness of the color filter at the edge and the center of the color filter of one pixel may be different, and the color of the center and the edge of the color filter may be different from each other.

SUMMARY OF THE INVENTION Accordingly, the present invention has been made to solve the above-mentioned problems occurring in the prior art, and it is an object of the present invention to provide a liquid crystal display device and a method of manufacturing the same that can prevent color mixing due to barrier rib loss and improve color reproducibility.

According to an aspect of the present invention, there is provided a display device including a first insulating substrate, a gate line formed on the first insulating substrate, a data line crossing the gate line, a gate line, and a data line A pixel electrode connected to the thin film transistor; a second insulating substrate facing the first insulating substrate; a common electrode formed on the second insulating substrate; A liquid crystal layer formed between the first insulating substrate and the second insulating substrate; and a spacing member formed integrally with the partition wall and maintaining a gap between the first insulating substrate and the second insulating substrate.

The color filter further includes a color filter filled in the region partitioned by the barrier, and the pixel electrode may be formed on the color filter.

The barrier ribs may include a lower barrier rib and an upper barrier rib that is narrower than the lower barrier rib.

The edge of the color filter may be located above the lower bulkhead.

And an upper protective layer formed between the color filter and the pixel electrode. The upper protective layer may be formed to have the same height as the upper partition or cover the upper partition.

And a lower protective film formed between the thin film transistor, the gate line, the data line, and the barrier rib.

According to another aspect of the present invention, there is provided a method of manufacturing a display device including forming a gate line, a data line, a thin film transistor connected to a gate line and a data line on a substrate, Forming a pixel electrode connected to the thin film transistor, forming a common electrode on a second insulating substrate facing the first insulating substrate, forming a first insulating substrate and a second insulating substrate on the first insulating substrate, Forming a liquid crystal layer between the first insulating substrate and the second insulating substrate, and forming a gap member that is formed integrally with the partition and maintains a gap between the first insulating substrate and the second insulating substrate.

The upper partition wall may be narrower than the lower partition wall.

And forming a color filter in the region partitioned by the barrier ribs before the step of forming the pixel electrodes.

The spacers may be formed together using a halftone exposure method when forming the upper barrier ribs and thicker than the upper barrier ribs.

Forming a lower protective film between the gate line, the data line, and the thin film transistor and the color filter.

And forming a top protective film between the color filter and the pixel electrode.

The upper protective film can be formed by an ink-jet method.

The color filter can be formed by an ink-jet method.

Forming a lower protective film between the gate line, the data line, and the thin film transistor and the color filter.

And forming a top protective film between the color filter and the pixel electrode.

The color filter can be formed by an ink-jet method.

According to the embodiment of the present invention, the barrier ribs are formed as a double layer having different widths, thereby preventing color mixture with neighboring pixels and increasing color reproducibility.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily carry out the present invention. The present invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein.

In the drawings, the thickness is enlarged to clearly represent the layers and regions. Like parts are designated with like reference numerals throughout the specification. Whenever a portion of a layer, film, region, plate, or the like is referred to as being "on" another portion, it includes not only the case where it is "directly on" another portion, but also the case where there is another portion in between. Conversely, when a part is "directly over" another part, it means that there is no other part in the middle.

1 is an equivalent circuit diagram of a pixel of a liquid crystal display according to an embodiment of the present invention.

1, the liquid crystal display according to the present embodiment includes a plurality of signal lines including a plurality of gate lines GL, a plurality of data lines DLa and DLb and a plurality of sustain electrode lines SL, And a pixel PX. The liquid crystal display device includes a lower panel 100, an upper panel 200, and a liquid crystal layer 3 interposed therebetween.

Each pixel PX includes a pair of subpixels PXa and PXb and the subpixels PXa and PXb are connected to the switching elements Qa and Qb and liquid crystal capacitors Clca and Clcb and a storage capacitor, (Csta, Cstb).

The switching elements Qa and Qb are three terminal elements such as a thin film transistor provided on the lower panel 100. The control terminal is connected to the gate line GL and the input terminal is connected to the data lines DLa and DLb. And the output terminal is connected to the liquid crystal capacitors Clca and Clcb and the storage capacitors Csta and Cstb.

The liquid crystal capacitors Clca and Clcb are formed by using the sub-pixel electrodes 191a and 191b and the common electrode 270 as two terminals and the liquid crystal layer 3 between the two terminals as a dielectric.

The storage capacitors Csta and Cstb serving as auxiliary capacitors of the liquid crystal capacitors Clca and Clcb are formed by stacking the sustain electrode lines SL and the sub pixel electrodes 191a and 191b provided in the lower panel 100, And a predetermined voltage such as the common voltage Vcom is applied to the sustain electrode lines SL.

The voltages charged in the two liquid crystal capacitors (Clca, Clcb) are set so as to slightly differ from each other. For example, the data voltage applied to the liquid crystal capacitor Clca is always set to be lower or higher than the data voltage applied to the liquid crystal capacitor Clcb. By appropriately adjusting the voltages of the two liquid crystal capacitors Clca and Clcb, the image viewed from the side can be made as close as possible to the image viewed from the front, thereby improving the lateral visibility of the liquid crystal display device.

A liquid crystal display according to an embodiment of the present invention will now be described in more detail with reference to FIGS. 2 to 6. FIG.

FIG. 2 is a layout diagram of a liquid crystal display device according to an embodiment of the present invention, FIG. 3 is a cross-sectional view of the liquid crystal display device of FIG. 2 taken along line III-III, 5 is a plan view showing a pixel electrode, FIG. 6 is a cross-sectional view showing a color filter and a barrier rib in a pixel according to an embodiment of the present invention, and FIG. 7 is a cross- 1 is a plan view showing a basic electrode as a basic element of a pixel electrode according to an embodiment of the present invention.

2 and 3, a liquid crystal display according to an exemplary embodiment of the present invention includes a lower panel 100, an upper panel 200, and a liquid crystal layer 3).

First, the lower panel 100 will be described.

A plurality of gate lines 121 and a plurality of storage electrode lines 131 and 135 are formed on the insulating substrate 110.

The gate line 121 transmits the gate signal and extends mainly in the horizontal direction. Each gate line 121 includes a plurality of first and second gate electrodes 124a and 124b protruding upward.

The sustain electrode lines 131 and 135 include a stem 131 extending substantially in parallel with the gate line 121 and a plurality of sustain electrodes 135 extending therefrom.

The shape and arrangement of the sustain electrode lines 131 and 135 may be modified in various forms.

A gate insulating layer 140 is formed on the gate line 121 and the sustain electrode lines 131 and 135. A plurality of semiconductors 154a and 154b made of amorphous or crystalline silicon are formed on the gate insulating layer 140, Respectively.

A plurality of pairs of ohmic contacts 161a, 161b, 163a, 163b, 165a and 165b are formed on the semiconductors 154a and 154b, respectively. The ohmic contacts 161a, 161b, 163a, 163b, 165a, 165b may be made of silicide or a material such as n + hydrogenated amorphous silicon in which n-type impurity is heavily doped.

A plurality of data lines 171a and 171b and a plurality of pairs of first and second drain electrodes (drains) are formed on the resistive contact members 161a, 161b, 163a, 163b, 165a, and 165b and the gate insulating layer 140, electrodes 175a and 175b are formed.

The data lines 171a and 171b transmit data signals and extend mainly in the vertical direction and cross the gate lines 121 and the stem lines 131 of the sustain electrode lines. The data lines 171a and 171b include first and second source electrodes 173a and 173b extending toward the first and second gate electrodes 124a and 124b and bent in a U shape, The second source electrodes 173a and 173b face the first and second drain electrodes 175a and 175b around the first and second gate electrodes 124a and 124b, respectively.

The first and second drain electrodes 175a and 175b extend upward from one end partially surrounded by the first source electrode 173a and the opposite end may be wide for connection with another layer.

However, the shapes and arrangements of the data lines 171a and 171b including the first and second drain electrodes 175a and 175b may be modified into various forms.

The first and second gate electrodes 124a and 124b and the first and second source electrodes 173a and 173b and the first and second drain electrodes 175a and 175b are electrically connected to the first and second semiconductors 154a and 154b, And the channel of the first and second thin film transistors Qa and Qb is connected to the first and second source electrodes (Qa and Qb) 173a and 173b and the first and second semiconductors 154a and 154b between the first and second drain electrodes 175a and 175b.

The resistive contact members 161a, 161b, 163a, 163b, 165a, and 165b are present only between the underlying semiconductor layers 154a and 154b and the data lines 171a and 171b and the drain electrodes 175a and 175b thereon, Thereby lowering the contact resistance. Semiconductors 154a and 154b are exposed between the source electrodes 173a and 173b and the drain electrodes 175a and 175b as well as between the data lines 171a and 171b and the drain electrodes 175a and 175b.

A lower protective film 180p made of silicon nitride or silicon oxide is formed on the data lines 171a and 171b, the drain electrodes 175a and 175b and the exposed semiconductor portions 154a and 154b.

A partition wall 361 is formed on the lower protective film 180p. The barrier ribs 361 are formed along the gate lines 121 and the data lines 171a and 171b, and are also formed over the thin film transistors. The region enclosed by the barrier ribs 361 is a filling region filled with the color filter 230 and the upper protective film 180q and has a substantially rectangular shape.

The barrier rib 361 includes a lower barrier rib 361 and an upper barrier rib 362 formed on the lower barrier rib 361. The lower barrier rib 361 and the upper barrier rib 362 have the same planar pattern and the upper barrier rib 362 is narrower than the lower barrier rib 361.

The lower and upper partitions 361 and 362 include first portions 361a and 362a corresponding to the thin film transistors and second portions 361b and 362b formed on the gate lines 121 and the data lines 171. [ A spacing member 363 rising above the upper partition wall 362 is formed in a part of the first portion 362a of the upper partition wall 362. [

The lower and upper partitions 361 and 362 may be formed of a black organic material and used as a light shielding member for preventing light leakage. The spacers 363 may also be formed of a black organic material.

Referring again to FIGS. 2 and 3, the filling area is filled with a color filter 230. The edge of the color filter 230 is located above the lower partition wall 361. 6, when the edge of the color filter 230 is positioned on the lower partition wall 361, the edge A having a smaller thickness than the center of the color filter is not formed due to the lower partition wall 361 The portion B having a thickness different from the center C of the color filter 230 is reduced as compared with the conventional case. Since the edge portion B is covered by the lower partition wall 361, a color different from the center is not expressed. Therefore, the color reproducibility can be reduced due to the difference in thickness between the center C and the edges A and B of the color filter 230.

On the color filter 230, an upper protective film 180q is formed. The upper protective film 180q is formed to have the same height as the first and second portions 362a and 363b of the upper partition wall 362 or to cover these portions 362a and 362b and on the third portion 363 The upper protective film 180q protects the color filter 230 and flattenes the substrate 100. [

Here, the lower protective film 180p can prevent the pigment of the color filter 230 from flowing into the exposed portions of the semiconductors 154a and 154b.

The upper protective film 180q may be formed of an organic material having photosensitivity. The upper protective film 180q may be formed to have a thickness of 1.0 mu m or more in order to reduce the coupling phenomenon between the pixel electrode 191 and the data lines 171a and 171b and planarize the substrate.

A plurality of contact holes 185a and 185b are formed in the upper protective film 180q, the color filter 230 and the lower protective film 180p to expose the first and second drain electrodes 175a and 175b.

A plurality of pixel electrodes 191 are formed on the upper protective film 180q.

Each of the pixel electrodes 191 includes first and second sub-pixel electrodes 191a and 191b which are separated from each other with a gap 91 therebetween. The first and second sub-pixel electrodes 191a and 191b Each of which includes at least one of the basic electrode 199 shown in Fig. 7 or a modification thereof.

7, the basic electrode 199 will be described in detail.

As shown in FIG. 7, the overall shape of the base electrode 199 is rectangular, and includes a cruciform stem made up of a transverse stem 193 and a vertical stem base 192 that is orthogonal thereto. The basic electrode 199 is divided into a first sub-area Da, a second sub-area Db, a third sub-area Dc, and a fourth sub-area Dc by the transverse strike line 193 and the vertical strike line 192, And each sub-area Da-Dd includes a plurality of first to fourth fine branches 194a, 194b, 194c, and 194d.

The first fine arcuate portion 194a extends obliquely from the transverse arcuate portion 193 or the vertical arbor portion 192 in the upper left direction and the second fine arbor portion 194b extends obliquely from the transverse arcuate portion 193 or the vertical stripe portion 192, And extends obliquely from the base 192 in the upper right direction. The third fine arcuate portion 194c extends from the transverse arcuate portion 193 or the vertical arbor portion 192 in the lower left direction and the fourth fine arbor portion 194d extends from the transverse arbor portion 193 or the vertical arbor portion 192. [ And extends obliquely downward in the right-down direction from the upper side 192.

The first to fourth fine branches 194a to 194d form an angle of approximately 45 degrees or 135 degrees with respect to the gate line 121 or the transverse branch 193. Further, the fine branches 194a-194d of the neighboring two sub-regions Da-Dd may be orthogonal to each other.

Although not shown, the width of the fine branch portions 194a-194d may become wider as they approach the transverse branch base 193 or the vertical branch base 192. [

Referring again to FIGS. 2 to 5, the first and second sub-pixel electrodes 191a and 191b include one basic electrode 199, respectively. The area occupied by the second sub-pixel electrode 191b in the entire pixel electrode 191 may be larger than the area occupied by the first sub-pixel electrode 191a. At this time, the second sub- The size of the basic electrode 199 is formed to be different from the area of the pixel electrode 191a by 1.0 to 2.2 times.

The second sub-pixel electrode 191b includes a pair of branches 195 extending along the data line 171. The second sub- Pixel electrode 191b and the data line 171 and is connected at the lower end of the first sub-pixel electrode 191b. One of the two is extended and physically and electrically connected to the second drain electrode 175b through the contact hole 185b. The first sub-pixel electrode 191a is connected to the first drain electrode 175a through a contact hole 185a.

The first and second sub-pixel electrodes 191a and 191b receive the data voltages from the first and second drain electrodes 175a and 175b.

Referring to FIG. 3, the third portion 363 of the upper barrier rib 362 protrudes above the pixel electrode 191.

Next, the upper display panel 200 will be described.

In the upper panel 200, a common electrode 270 is formed on a transparent insulating substrate 210, and an alignment layer 21 is formed on the common electrode 270.

A light shielding member may be formed on the substrate 210 separately from the barrier ribs 361 and 362 although not shown. A separate light shielding member may be formed on the lower substrate 110.

The third portion 363 is used as a spacing member for maintaining a gap between the upper display panel 200 and the lower display panel 100.

The manufacturing method of the thin film transistor substrate for a liquid crystal display of Figs. 2 and 3 will be described with reference to Figs. 8 to 13. Fig.

Figs. 8 to 13 are sectional views sequentially showing the method of manufacturing the thin film transistor substrate for a liquid crystal display shown in Figs. 2 and 3. Fig.

As shown in FIG. 8, a gate line 121 including gate electrodes 124a and 124b is formed on an insulating substrate 110. As shown in FIG.

9, a silicon oxide film or the like is deposited on the substrate 110 including the gate line 121 to form a gate insulating film 140. Next, as shown in FIG.

An amorphous silicon film not doped with an impurity and an amorphous silicon film doped with an impurity are formed on the gate insulating film 140 and patterned to form the resistive contact layer pattern and the semiconductors 154a and 154b.

Thereafter, a conductive material is deposited on the resistive contact layer pattern and then patterned to form data lines 171a and 171b and drain electrodes 175a and 175b including the source electrodes 173a and 173b.

The resistive contact layer patterns exposed between the source electrodes 1731 and 173b and the drain electrodes 175a and 175b are used as a mask to form resistive contact layers 163a and 163b and 165a and 165b.

Although the semiconductors 154a and 154b, the resistive contact layers 163a and 163b and 165a and 165b, the data lines 171a and 171b and the drain electrodes 175a and 175b can be formed using respective masks, It can be formed together using photoresist patterns having different thicknesses. In this case, the ohmic contact layer has the same planar pattern as the data line and the drain electrode.

The lower protective film 180p is formed on the data lines 171a and 171b and the drain electrodes 175a and 175b as shown in Fig. Then, an organic insulating layer is formed on the lower protective layer 180p and then patterned to form lower barrier ribs 361a and 361b.

The upper partition walls 362a and 362b and the spacing member 363 are formed on the lower partition walls 361a and 361b as shown in FIG. 11, which are narrower than the lower partition walls 361a and 361b.

The organic insulating layer for forming the upper partition walls 362a and 362b and the spacers 363 may be formed by using a half-tone mask such as a mask including a slit mask, a lattice mask or a translucent film, The upper partition walls 362a and 362b and the spacing member 363 may be formed to have different thicknesses from each other.

Even if the lower partition walls 361a and 361b are damaged due to poor contact between the particles of the exposure unit and the substrate when the lower partition walls 361a and 361b are formed, the upper partition walls 362a and 362b are also formed in the damaged portion, It is possible to prevent the ink of the pixel from mixing.

The upper partitions 362a and 362b should be formed in the damaged part of the lower partitions 361a and 361b so that the upper partitions 362a and 362b are formed thicker than the lower partitions 361a and 361b.

As shown in Fig. 12, a color filter 230 is formed in a pixel defined by partition walls 361a, 361b, 362a, and 362b. The color filter 230 can be formed by an inkjet printing method. In the inkjet printing method, the color filter solution is dripped while moving the inkjet head, and the color filter solution is dried. The edge of the color filter 230 is formed to be positioned above the lower partition walls 361a and 361b.

Then, an upper protective film 180q is formed on the color filter 230. The upper protective film 180q may be formed by an inkjet printing method such as the color filter 230. [ At this time, the upper protective film 180q is formed to cover the upper partition walls 362a and 362b, and the gap material 363 is formed to be exposed.

The contact portions 185a and 185b are formed by patterning the upper protective film 180q, the first portions 362a and 361a of the upper and lower partitions and the lower protective film 180p as shown in FIG. At this time, the lower protective film 180p is dry-etched. The contact holes 185a and 185b formed in the upper protective film 180q, the barrier ribs 362a and 361a and the lower protective film 180p because the upper protective film 180q, the barrier ribs 362a and 361a and the lower protective film 180p are etched together. ) Have substantially the same planar pattern and their boundaries coincide.

Then, as shown in FIG. 3, the pixel electrode 191 is formed on the upper protective film 180q. Then, an alignment film 11 is formed on the pixel electrode 191.

Although the liquid crystal display device has been described as an example in the above description, the present invention can also be applied to an organic light emitting display device in which barrier ribs are formed to partition a region and fill a color filter or a light emitting material in the region.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, Of the right.

1 is an equivalent circuit diagram of a pixel of a liquid crystal display according to an embodiment of the present invention.

2 is a layout diagram of a liquid crystal display device according to an embodiment of the present invention.

FIG. 3 is a cross-sectional view of the liquid crystal display of FIG. 2 taken along line III-III.

4 is a layout diagram of a thin film transistor panel except the pixel electrode of the liquid crystal display of FIG.

5 is a plan view showing a pixel electrode.

6 is a cross-sectional view illustrating a color filter and a barrier rib in a pixel according to an exemplary embodiment of the present invention.

7 is a plan view showing a basic electrode as a basic element of a pixel electrode according to an embodiment of the present invention.

Figs. 8 to 13 are sectional views sequentially showing the method of manufacturing the thin film transistor substrate for a liquid crystal display shown in Figs. 2 and 3. Fig.

Description of the Related Art

3: liquid crystal layer 11, 21: alignment layer

31: liquid crystal molecule 100: thin film transistor display panel

110, 210: insulating substrate 121: gate line

124a, 124b: gate electrode 131: sustain electrode line

135: Branch line

140: gate insulating film 154a, 154b: semiconductor

163a, 163b, 165a, 165b: resistive contact member

171a and 171b: data lines 173a and 173b: source electrodes

175a and 175b: drain electrodes 180p and 180q:

185a 185b: contact hole 191: pixel electrode

191a: first sub-pixel electrode

191b: second sub-pixel electrode

200: common electrode display panel

230: Color filter

270: common electrode

Claims (17)

A first insulating substrate, A gate line formed on the first insulating substrate, A data line crossing the gate line, A thin film transistor connected to the gate line and the data line, A barrier rib formed on the thin film transistor, the gate line, and the data line, A color filter filled in a region partitioned by the partition wall, A pixel electrode connected to the thin film transistor, A second insulating substrate facing the first insulating substrate, A common electrode formed on the second insulating substrate, A liquid crystal layer formed between the first insulating substrate and the second insulating substrate, and And a spacing member formed integrally with the partition wall and maintaining a gap between the first insulating substrate and the second insulating substrate, Wherein the barrier rib includes a lower barrier rib and an upper barrier rib that is narrower than the lower barrier rib, And an edge of the color filter is positioned on the lower partition. The method of claim 1, And the pixel electrode is formed on the color filter. delete delete 3. The method of claim 2, And an upper protective layer formed between the color filter and the pixel electrode, Wherein the upper protective film is formed to have the same height as the upper barrier rib or cover the upper barrier rib. The method of claim 5, And a lower protective film formed between the thin film transistor, the gate line, and the data line and the barrier rib. Forming a gate line, a data line, and a thin film transistor connected to the gate line and the data line on the first insulating substrate, Forming a barrier rib including a lower barrier rib and an upper barrier rib on the gate line, the data line and the thin film transistor, Forming a color filter in a region partitioned by the barrier ribs, Forming a pixel electrode connected to the thin film transistor on the color filter, Forming a common electrode on a second insulating substrate facing the first insulating substrate, Forming a liquid crystal layer between the first insulating substrate and the second insulating substrate, and And forming a spacing member that is formed integrally with the partition and that maintains a gap between the first insulating substrate and the second insulating substrate, Wherein the upper barrier rib is narrower than the lower barrier rib, And an edge of the color filter is located on the lower partition. delete delete 8. The method of claim 7, Wherein the spacers are formed together by using a halftone exposure method when forming the upper barrier ribs, and are thicker than the upper barrier ribs. 11. The method of claim 10, And forming a lower protective film between the gate line, the data line and the thin film transistor and the color filter. 12. The method of claim 11, And forming an upper protective film between the color filter and the pixel electrode. The method of claim 12, Wherein the upper protective film is formed by an ink-jet method. The method of claim 13, Wherein the color filter is formed by an ink-jet method. 8. The method of claim 7, And forming a lower protective film between the gate line, the data line and the thin film transistor and the color filter. 8. The method of claim 7, And forming an upper protective film between the color filter and the pixel electrode. 8. The method of claim 7, Wherein the color filter is formed by an ink-jet method.

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