KR101418456B1 - Solid state disk - Google Patents

Abstract

Disclosed is a solid state disk in which ease of use and reliability are ensured. The solid-state disk according to the present invention comprises a substrate having a first side and a second side opposite to each other, a semiconductor chip mounted on the substrate, a semiconductor chip mounted on the substrate, for receiving data to be written into the semiconductor chip by using an optical signal, And a casing that is mounted on the substrate and surrounds the substrate and the substrate, the semiconductor chip, the heat sink, and the optical signal portion for controlling the temperature of the substrate and the semiconductor chip.

Description

Solid state disk

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid state disc, and more particularly to a solid state disc that transmits and receives an optical signal and includes a thermoelectric element.

As the performance of the hardware of the computing device is improved, the data or the program used by the user in the computing device is also rapidly increasing in size. Accordingly, a solid state disk (SSD) method has been proposed as a technique for solving performance degradation due to a bottleneck in data input / output in a data processing apparatus for a computer apparatus. Solid state disks are data storage devices based on semiconductor memory devices rather than hard disk drives (HDD). In addition, by eliminating the motor and mechanical drive, which are essential for existing HDDs, it generates little heat and noise during operation and is strong against external shocks. see.

However, since the conventional solid state disk is connected to the external host and the power source and the signal by wire, when the connection port is insufficient, the connection with the external host is limited and connection to the external host for installation is troublesome.

In addition, as the number and the number of semiconductor memory devices used to increase the capacity of a solid state disk increases, the heat generated in the solid state disk further increases. As a result, Problems can arise.

Disclosure of Invention Technical Problem [8] The present invention provides a solid-state disk having an easy connection to an external host and improved heat dissipation.

In order to accomplish the above object, the present invention provides a solid state disk as described below. The solid-state disk according to the present invention includes a substrate having a first surface and a second surface opposite to each other, a semiconductor chip mounted on the substrate, and a semiconductor chip mounted on the substrate and receiving data to be written to the semiconductor chip A semiconductor chip mounted on the substrate and configured to surround the substrate, the semiconductor chip, the heat sink, and the optical signal portion; Includes a case.

The optical signal unit may include a light emitting unit for transmitting an optical signal to an external device and light receiving units for receiving an optical signal from an external device.

The case may further include an opening, and the light emitting unit and the light receiving unit may transmit and receive an optical signal to an external device through the opening.

The substrate may include a recessed region in at least one of the first surface or the second surface, and the optical signal portion may be located in the recessed region.

The semiconductor chips may be overlapped with the optical signal portion.

The thermoelectric part may be attached on one of the upper surface of the semiconductor chip and the second surface of the substrate. Or the thermoelectric part may be attached to the upper surface of the semiconductor chip and the second surface of the substrate, respectively.

The semiconductor chip may be a non-volatile memory.

The semiconductor device may further include a buffer unit for temporarily storing data to be written in the semiconductor chip, temporarily storing data read from the semiconductor chip, and a volatile memory.

And a recognition unit installed adjacent to the light emitting unit and the light receiving unit to allow the external device to sense the light emitting unit and the light receiving unit using the wireless signal and to transmit and receive the optical signal.

The solid-state disk according to the present invention transmits and receives data as an optical signal, thereby minimizing the inconvenience of connecting an external device and a data line.

In addition, the heat generated inside the solid state disk can be reduced by using the thermoelectric element, and the occurrence of defects can be reduced even in long-term use.

Therefore, the solid state disk according to the present invention can ensure both ease of use and reliability.

1 is a block diagram schematically illustrating components of a solid state disk and a method of operation according to an embodiment of the present invention, in relation to a host H. FIG.
FIG. 2 is a block diagram schematically illustrating the operation of the power supply element 1300 of the SSD device according to an embodiment of the present invention, in relation to the host H. FIG.
3 is a block diagram schematically illustrating the operation of an optical signal element 1400 of an SSD device in accordance with an embodiment of the present invention in relation to a host H. FIG.
4 to 10 are cross-sectional views illustrating an SSD device according to some embodiments of the present invention.
Fig. 11 is a schematic view for explaining the operation principle of the thermal elements 70, 70a and 70b of Figs. 4 to 10.
FIG. 12 is a perspective view schematically showing one example of the heat sinks 70, 70a and 70b of FIGS. 4 to 10. FIG.

Next, embodiments according to the technical idea of the present invention will be described in detail with reference to the accompanying drawings. However, the embodiments of the present invention can be modified in various ways, and the scope of the present invention should not be construed as being limited by the embodiments described below. The embodiments of the present invention will be described in more detail with reference to the accompanying drawings. In the accompanying drawings, the same reference numerals denote the same elements at all times. Further, various elements and regions in the accompanying drawings are schematically drawn. Accordingly, the invention is not limited by the relative size or spacing depicted in the accompanying drawings.

FIG. 1 is a block diagram schematically showing components of a solid state disk (hereinafter referred to as SSD device) and an operation method according to an embodiment of the present invention in relation to the host H. FIG.

Referring to FIG. 1, an SSD device 1000 includes a control element 1200, a power source element 1300, an optical signal element 1400, and a memory element 1600. The memory element 1600 may store data, store data, and may include a storage element 1600a that does not lose data even in the absence of power. Storage element 1600a may comprise a non-volatile memory, for example a flash memory. The memory element 1600 may further include a buffer element 1600b. The buffer element 1600b may include volatile memory capable of random access, for example, DRAM, SRAM, SDRAM, DDR, and the like.

Control element 1200 may control access to data stored in storage element 1600a. That is, the control element 1200 can control write / read operations of the flash memory and the like included in the storage element 1600a in accordance with the control command of the host H. [ The control element 1200 may also control write / read operations of the buffer element 1600b. Control element 1200 may be a separate control semiconductor chip, such as an application specific integrated circuit (ASIC), or may be a control program stored in the system area of memory element 1600. The control element 1200 may be designed to be automatically executed by the operating system of the host H, for example when the SSD device 1000 is connected to the host H. [ In this case, the control element 1200 may include a script for automatic execution and an application program that can be executed on the host (H).

The buffer element 1600b may temporarily store data to be written to the storage element 1600a or temporarily store data read from the storage element 1600a. When the host element H is provided with the buffer element 1600b, it is possible to reduce the time required for the data read operation by storing frequently used data in the buffer element 1600b when the host H accesses the SSD device 1000 . A control signal and address from the host H may be input to the control element 1200 via the optical signal element 1400 during a data read operation. The control element 1200 may read data from the storage element 1600a corresponding to that address. The read data may be stored together with the buffer element 1600b. The buffer element 1600b having a predetermined capacity, for example, 8MBytes or 32MBytes, temporarily stores data to be accessed frequently. When a data read command is input from the host H as the buffer element 1600b temporarily stores such data, the control element 1200 reads out the data stored in the buffer element 1600b at high speed, 1400) to the host (H). Thereafter, when an internal signal for reading data stored in the buffer element 1600b is input to the control element 1200, the control element 1200 does not access the storage element 1600a and accesses the buffer element 1600b And reads the data stored in the corresponding address.

The storage element 1600a may be comprised of one or more semiconductor chips. Or the storage element 1600a may be a stacked semiconductor package in which a plurality of semiconductor dies are stacked. The buffer element 1600b may be an independent semiconductor chip, but may be a portion of the semiconductor die constituting the storage element 1600a or a part of the semiconductor die stacked in the stacked semiconductor package constituting the storage element 1600a. Or buffer element 1600b may be part of the control semiconductor chip when control element 1200 is comprised of a separate control semiconductor chip.

The power supply element 1300 can be powered from the host H or from a separate external device and the power supply element 1300 can provide power to the control element 1200, the optical signal element 1400, and the memory element 1600, Can be supplied and operated. The power provided by the power supply element 1300 may be, for example, a voltage between 1.5V and 12V and a current between 100 and 500 mA. In addition, the optical signal element 1400 may be powered by power from the power supply element 1300 and may transmit and receive signals wirelessly with the host H. Optical signal component 1400 may be controlled by control element 1200. The optical signal element 1400 can transmit serial data and inverse serial data obtained by inverting the serial data, respectively. As described above, by simultaneously transmitting the serial data and the inverted serial data, it is possible to minimize the noise that may occur when data is transmitted.

The host H may be, for example, a computer system such as a personal computer. However, the host H may be a server, a portable computer, a personal digital assistant (PDA), a mobile phone, an MP3 player, navigation, a portable multimedia player (PMP), a repeater, , An access point), a portable electronic device, or an electronic device capable of transmitting and receiving data with an external device such as a home appliance. When the host H is a computer system, the host H transfers control signals and data between the CPU section H2, the memory section H6 and the interface section H5 via the internal bus B. The interface unit H5 may be a SATA interface (SATA I / F) as shown, or a wired standard interface device supporting ATA, SATA1, SATA2, and SAS protocols. When the interface unit H5 is a wired standard interface device, a separate optical signal interface unit H4 may be additionally provided in the host H and used. Alternatively, the interface unit H5 and the optical signal interface unit H4 can be integrally configured to interface wirelessly with an external device. The configuration of the illustrated host H is not limited to the use of a general computer system but may be applied to any electronic device capable of transmitting and receiving data wirelessly with an external device as described above .

The power supply H3 may be part of the host H or may be a separate external power supply. Here, the external device is assumed to be the host H in contrast to the SSD device 1000, but the present invention is not limited thereto. The power supply unit H3 may be a power supply line connected to the power supply unit 1300, that is, the SSD device 1000 directly or through an adapter, for example, a power supply line of 220V.

FIG. 2 is a block diagram schematically illustrating the operation of the power supply element 1300 of the SSD device according to an embodiment of the present invention, in relation to the host H. FIG.

Referring to FIG. 2, the power supply element 1300 may receive power necessary for the SSD device 1000 by wire or wirelessly. The power supply element 1300 may include a power receiving unit 3a, a power storage unit 3b, a power providing unit 3c, a power detecting unit 3d, and a power control unit 3e.

The power receiving terminal 3a can receive power supplied from the outside, for example, from the host H. [ When the power supplied from the host H is different from that required for the SSD device 1000, for example, when there is a difference in AC / DC difference or voltage / current, the power receiving terminal 3a performs power conversion And < / RTI > The power receiving stage 3a may include, for example, an adapter connecting terminal, a transformer, a voltage limiting circuit, a rectifying circuit, and the like. The voltage limiting circuit may function to prevent the AC signal from being excessively supplied. The rectifying circuit may rectify the AC signal to a DC current. Subsequently, the power supplied by the power receiving terminal 3a may be transmitted to the power storage unit 3b.

The power storage unit 3b may include a power storage element such as a capacitor, and may store power transmitted from the power receiving station 3a. The power storage unit 3b may also include secondary electricity. That is, the power storage unit 3b may temporarily store power during the operation of the SSD device 1000, store the power for a long period of time, or both.

The power supply 3c is controlled by a power control unit 3e described later and can supply power from the power storage unit 3b to the memory element 1600 and the SSD apparatus 1000 as a whole. The power supply 3c and the memory element 1600 may be powered by a wiring line or an optical signal.

The power detector 3d continuously measures a power value supplied from the power receiving terminal 3a to the power storage unit 3b or a power value stored in the power storage unit 3b such as a voltage value and a current value, And transmits information about the voltage value and the current value to the power control unit 3e. For example, the power detection section 3d may be a circuit including a resistance element capable of directly measuring the voltage value and the current value.

The power control unit 3e can control the overall operation of the power supply element 1300. [ The power control unit 3e receives the voltage value and the current value transmitted from the power detection unit 3d and can control the driving of the power supply unit 3c accordingly. For example, the power control section 3e compares the voltage value and the current value measured and transmitted by the power detection section 3d with a predetermined reference voltage value and a reference current value to determine whether the power storage section 32b or the power It is possible to control not to generate an overvoltage or an overcurrent in the supplying part 32c.

The power control unit 3e may be a part of the power supply element 1300, but may be integrated with the control element 1200 of FIG.

When the SSD device 1000 is powered wirelessly, the power supply element 1300 may be a radiative system using radio frequency (RF) waves or ultrasonic waves, an inductive coupling using magnetic induction, an inductive coupling scheme, or a non-radiative scheme using magnetic field resonance. The radial system can receive power energy wirelessly using an antenna such as a monopole or planar inverted-F antenna (PIFA). In the radial system, radiation is generated while an electric field or a magnetic field varying with time interacts with each other. When there is an antenna of the same frequency, power can be received in accordance with the polarization characteristic of the incident wave. In the inductive coupling system, a strong magnetic field is generated in one direction by winding a coil a plurality of times, and a coupling is generated by bringing a coil that resonates within a similar range of frequencies to receive power energy wirelessly. The non-radiative scheme can receive power energy wirelessly by using evanescent wave coupling that moves electromagnetic waves between two media that resonate at the same frequency through a near field.

The power receiving unit 3a of the power supply unit 1300 may be a monopole or a PIFA or a PIFA or a PIFA, and a planar inverted-F antenna.

In the case of the inductive coupling method described above, that is, when the power supply element 1300 uses magnetic induction, the power receiving end 3a of the power supply element 1300 may include a coil.

In the case of the above-described non-radiation type wireless power transmission method, that is, when the power source element 1300 uses magnetic field resonance, the power receiving end 3a includes a resonator for generating an evanescent wave . The attenuation wave produces a steel sheet field in a short distance and the intensity decreases exponentially as the distance increases.

3 is a block diagram schematically illustrating the operation of an optical signal element 1400 of an SSD device in accordance with an embodiment of the present invention in relation to a host H. FIG.

3, the optical signal element 1400 of the SSD device 1000 may include a light emitting element 4a, a light receiving element 4b, a light circuit element 4c, and an optical signal control element 4d . For example, the light emitting element 4a may be a light emitting diode (LED), a laser diode (LD), or an infrared LED, and the wavelength of the emitted light may be infrared, visible, . Further, the light receiving element 4b may be a photodiode, and the wavelength of light received may be infrared, visible, or ultraviolet.

The light-emitting element 4a may be composed of light-emitting sources having a plurality of distinguishable wavelengths. For example, the light emitting element 4a may include an infrared LED, a red LED, a green LED, and a blue LED, and may output a plurality of optical signals through one optical path. In this case, the light-receiving element 4b may be made of the same number of light-receiving elements to receive the light of the corresponding wavelength. In addition, an optical filter for passing only the light of the wavelength corresponding to the light receiving elements may be disposed at the front end of the light receiving elements.

However, the types of the light emitting element 4a and the light receiving element 4b are illustrative, and the present invention is not limited thereto.

The host H may be an external device capable of exchanging information with the SSD device 1000, and may include, for example, an optical signal interface H4. Accordingly, the optical signal element 1400 can transmit and receive data to and from the host H, and for this purpose, the optical signal element 1400 can transmit and receive the data through the light emitting element 4a or the light receiving element 4b and the optical signal interface H4. Can be transmitted / received as an optical signal.

The optical signal interface unit H4 may include a light emitting diode (LED) and a laser diode (LD), and the wavelength of the emitted light may include a light emitting device such as an infrared ray, a visible ray, or an ultraviolet ray . In addition, the optical signal interface unit H4 may be a photodiode, and the wavelength of the light received may include a light receiving element such as an infrared ray, a visible ray, or an ultraviolet ray. However, the types of the light emitting element and the light receiving element that the optical signal interface unit H4 can include are illustrative, and the present invention is not limited thereto. In addition, the optical signal interface unit H4 may be a separate device that can be mounted on the host H, and may be implemented by separately connecting a device having an optical signal transmitting / receiving function to an existing host that does not have an optical signal transmitting / . Alternatively, the optical signal interface unit H4 may be an apparatus integrally formed with the host H, and the optical signal transmission / reception function may be embodied in the host H.

The process of the SSD device 1000 receiving data from the host H will be described in detail. The process by which the SSD device 1000 receives data from the host H is illustrated by the solid arrows. And the light emitting element of the host H transmits the data as the optical signal to the light receiving element 4b. The optical signal received by the light receiving element 4b is converted into an electrical signal by, for example, a photodiode, and the electrical signal is transmitted to the optical signal circuit element 4c. The optical circuit element 4c can be controlled by the optical signal control element 4d. The optical circuit element 4c may comprise a detecting element 4cb. The detecting element 4cb converts the electric currents output by the light receiving element 4b into a digital value and converts the received electrical signal into a signal in a form available in the memory element 1600, can do. Further, when the light emitting element of the host H outputs a quantized optical signal for transmitting a plurality of bits, the detecting element 4cb may include a monolithic digital converter having the same bit resolution to detect them. In addition, the optical circuit element 4c may include a filter (not shown) for filtering the actual available data among the received data transmitted from the host H to the optical signal. The optical circuit element 4b has information on a predefined optical wavelength band and protocol with respect to data that can be exchanged between the host H and the SSD device 1000 or transmits this information to the optical signal control element 4d ). Some of the transformed data in the optical circuit element 4b may be controlled and transmitted and stored in the memory element 1600 by the optical signal control element 4d. Data transmission from the optical circuit element 4c to the memory element 1600 may be implemented by wire, wireless, or optical communication. Also, the optical circuit element 4c and the optical signal control element 4d may be integrated.

The optical signal control element 4d may be comprised of a portion of the optical signal element 1400, but may be integral with the control element 1200 of FIG.

A process of transmitting data to the host H by the SSD device 1000 will be described in detail. The process of transmitting data from the SSD device 1000 to the host H is shown by the dotted arrow. Data to be transmitted among the data stored in the memory element 1600 by the optical signal control element 4d can be transmitted to the optical circuit element 4c. Data transmission from the memory element 1600 to the optical circuit element 4c may be implemented by wire, wireless, or optical communication. The optical circuit element 5c can be controlled by the optical signal control element 4d. The light circuit element 4c may comprise a driving element 4ca. The driving element 4ca may generate a driving signal for driving the light-emitting element 4a to match the optical signal according to the data provided from the optical signal control element 4d. The driving element 4ca may comprise, for example, an impulse generator. The data may be encoded data. For example, when the data value is 0, the driving element 4ca prevents the current from flowing to the light emitting element 4a, and when the data value is 1, the current flows through the light emitting element 4a, It is possible to output an optical signal. Alternatively, it may be operated on the contrary. In addition, the driving element 4ca may have a plurality of analog outputs capable of representing a plurality of bits. For example, to represent four bits, the driving element 4ca can output twenty four different currents such that the current of twenty-four analog values flows through the light-emitting element 4a. The light emitting element 4a generates an optical signal by the driving signal generated by the driving element 4ca. Thereafter, the signal transmitted through the optical signal can be received by the light receiving element of the optical signal interface H4 and transmitted to the host H.

The modulation scheme of the optical communication between the host H and the SSD device 1000 is not limited. For example, the modulation method may be an On-Off Keying (OOK) method in which "1" is expressed as optical signal emission and "0" is expressed as optical signal cancellation. Also, there are a pulse position modulation (PSM) method in which n binary signal groups are represented by 2n optical pulse position times, a pulse interval modulation method in which n binary signal groups are represented by 2n optical pulse position time intervals (PSK), amplitude modulation (ASK), and so on, and then modulated by a conventional digital communication method such as a pulse width modulation (PIM), a dual head PIM Sub-carrier modulation (SCM) or the like, which is re-modulated by the strength of the received signal.

Therefore, through the optical communication between the host H and the SSD device 1000, highly reliable communication that is not affected by external noise can be achieved. Also, by using optical communication, data can be transmitted and received at high speed.

The optical signal component 1400 of the SSD device 1000 may further include a recognition element 4f. The host H may further include a sensing element Hf corresponding to the sensing element 4f. In order to communicate with the optical signal, the host H can detect the SSD device 1000. That is, when the optical signal transmitted from the host H has directionality, the host H may sense the SSD device 1000 and transmit the optical signal to match the position of the SSD device 1000. [ The cognition element 4f can be provided adjacent to the light emitting element 4a and the light receiving element 4b and the cognition element 4f allows the host H to be substantially illuminated by the light emitting element 4a and the light receiving element 4b, 4b.

The cognitive element 4f and the sensing element Hf can recognize the mutual recognition between the host H and the SSD device 1000 by using a wireless signaling method which is not affected by the directionality. The wireless signal transmission between the host H and the SSD device 1000 can be performed by a wireless signal transmission between the host 9000 and the terminal 1000 using an infrared data association (IrDA), a radio frequency identification (RFID) (Zigbee), and a Bluetooth (Bluetooth) method. That is, a wireless signal is transmitted from the sensing element Hf of the host H in the same manner as IrDA, RFID, Zigbee, and Bluetooth. When the wireless signal is received by the recognition element 4f of the SSD device 1000, the wireless signal may be transmitted in the same manner so that the sensing element Hf of the host H can receive the wireless signal.

Through this process, the host H can recognize the SSD device 1000 and transmit the optical signal having the directivity toward the SSD device 1000. [ For this purpose, the optical signal interface unit H4 may include a device that adjusts the directionality of the optical signal transmitted from the light emitting device or adjusts the light receiving device to match the directionality of the received optical signal.

The sensing element Hf may be a separate device from the optical signal interface H4, but may be an integrated device. The cognitive element 4f is controlled by the optical signal control element 4d so that when the host H recognizes the SSD device 1000 by the cognitive element 4f, 4d so that the optical signal control element 4d can control the light emitting element 4a, the light receiving element 4b or the optical circuit element 4c.

4 is a cross-sectional view illustrating an SSD device according to some embodiments of the present invention.

Referring to FIG. 4, the SSD device 1000 may include a substrate 1 and one or more semiconductor chips 100a, 100b, and 100c mounted on the substrate 1. Also not shown, it may further comprise one or more semiconductor elements and one or more passive elements. The SSD device 1000 may include a control unit 20, a power source unit 30, and an optical signal unit 40 and a thermal unit 70 mounted on the substrate 1. The control unit 20 may consist of one or more control semiconductor chips and one or more passive components. Optionally, the SSD device 1000 further includes a sealing material (not shown) for sealing the semiconductor chips 100a, 100b, and 100c, the control semiconductor chip, the passive device, the control unit 20, and the power source unit 30 And may further include a case C surrounding the outside thereof. Further, the sealing material can seal a part of the optical signal receiving portion 40. The case C may include an opening O formed in a portion adjacent to the optical signal portion 40. [ In this case, the sealant may not be filled between the optical signal port 40 and the opening O. Alternatively, the sealing material may be a transparent material. In this case, the sealing material may seal the optical signal portion 40 or fill a space between the optical signal portion 40 and the opening portion O. [ Or the optical signal portion 40 may be arranged to be in direct contact with the opening portion O. [ The optical signal port 40 and the opening O will be described later in detail.

Hereinafter, the substrate 1 may be used to designate the control unit 20, the power supply unit 30, and the optical signal unit 40 mounted on the base unit 10 and the base unit 10 together.

The base 10 includes a first side 12 and a second side 14 opposite the first side 12. The control unit 20, the power supply unit 30, and the optical signal unit 40 may be located in a part of the first surface 12. The control unit 20, the power supply unit 30, and the optical signal unit 40 are shown attached to the surface on the first surface 12, but are not limited thereto. For example, the control unit 20, the power supply unit 30, and the optical signal unit 40 may be selectively provided on the surface on the first surface 12 of the base unit 10 or on the inside of the base unit 10 adjacent to the first surface 12. [ As shown in FIG.

Further, the semiconductor chips, the passive elements, and the semiconductor chips 100a, 100b, and 100c may be positioned in a part of the first surface 12. The control semiconductor chips, the passive elements, the power supply unit 30, the optical signal unit 40, and the semiconductor chips 100a, 100b, and 100c may be electrically connected by a wiring pattern (not shown). Electric power can be supplied from the power supply unit 30 to the control semiconductor chips, the passive elements, the optical signal unit 40, and the semiconductor chips 100a, 100b, and 100c through the wiring pattern.

On the second side 14, the thermal front 70 may be located. The thermal front 70 may be adhered to the second side 14 using an adhesive layer 76. The adhesive layer 76 may be a solder, an epoxy, a resin-based epoxy, or an adhesive tape excellent in heat resistance.

The base 10 may include an epoxy resin, a polyimide resin, a bismaleimide triazine (BT) resin, FR-4 (Flame Retardant 4), FR-5, ceramic, silicone, or glass, And the present invention is not limited thereto. The base 10 may be a single layer or may include a multi-layer structure including wiring patterns therein. For example, the base 10 may be a rigid flat plate, a plurality of rigid flat plates adhered to each other, or a thin flexible printed circuit board and a rigid flat plate adhered to each other. The plurality of rigid flat plates, or the printed circuit boards, which are adhered to each other, may each include a wiring pattern. The base 10 may also be a low temperature co-fired ceramic (LTCC) substrate. The LTCC substrate may include a plurality of ceramic layers stacked, and may include a wiring pattern therein.

The control unit 20 may correspond to the control element 1200 of FIG. The control unit 20 controls the optical communication between the SSD device 1000 and the host H and also controls the operation of writing / reading and erasing data to / from the semiconductor chips 100a, 100b and 100c. In addition, the control unit 20 may be a semiconductor die or a semiconductor package. The control unit 20 may be electrically connected to the wiring pattern through a bonding wire. The bonding wire may be gold, silver, copper, aluminum, or an alloy thereof. The bonding wire may be formed in a normal forward folded loop mode or a reverse loop mode. Or the control unit 20 may be electrically connected to the wiring pattern through the wiring pattern and conductive vias such as solder balls, flip-chip bonding members, bumps, though silicon vias, or a combination thereof. However, this is illustrative and the present invention is not limited thereto.

The passive element may be electrically connected to the wiring pattern via solder or solder. The passive element may be a resistance element, an inductor element, a capacitor element, or a switch element, but the present invention is not limited thereto.

The power supply unit 30 may correspond to the power supply element 1300 of FIG. The power supply section 30 can receive power from the outside, for example, from the host H, and can supply power to the control section 20, the passive elements, the optical signal section 40, and the semiconductor chips 100a, 100b and 100c Can be supplied. Further, the power supply unit 30 can be supplied with power to the thermal power supply 70. [ Although not shown, the power supply 30 may be connected to the passive components, the semiconductor chips 100a, 100b, 100c, or the heat sink 70 through conductive vias such as bonding wires, solder balls, flip chip bonding members, bumps, Power can be provided.

The optical signal portion 40 may correspond to the optical signal element 1400 of FIG. The optical signal transmitter 40 can transmit and receive optical signals, or can transmit or receive optical signals only. The optical signal terminal 40 can transmit or receive an optical signal from the host H (see FIG. 1).

In addition, the optical signal terminal 40 can transmit or receive data with the semiconductor chips 100a, 100b, and 100c as optical signals. In this case, the optical signal section 40 may include an optical waveguide (not shown) capable of exchanging optical signals with the semiconductor chips 100a, 100b, and 100c, and each of the semiconductor chips 100a, 100b, May include optical signal elements that are the same as or similar to optical signal element 1400 described in FIGS. Alternatively, the optical signal section 40 may include components similar or similar to the light emitting element 4a, the light receiving element 4b, and the optical circuit element 4c for transmitting optical signals to the host H, And may further be provided for signal transmission.

The semiconductor chips 100a, 100b, and 100c may be electrically connected to the wiring patterns through conductive vias such as bonding wires, solder balls, flip chip bonding members, bumps, and TSV. The semiconductor chips 100a, 100b, and 100c may correspond to the memory element 1600 of FIG. Or semiconductor chips 100a, 100b, and 100c may correspond to the storage element 1600a of FIG. The buffer element 1600b may temporarily store data to be written to the storage element 1600a or temporarily store data read from the storage element 1600a.

The semiconductor chips 100a, 100b and 100c may be a storage device capable of storing data, such as a NAND flash memory, a NOR flash memory, a PRAM (Phase-change random access memory), an RRAM (Resistive RAM), a FeRAM Or non-volatile memory such as MRAM (Magnetic RAM). In addition, the semiconductor chips 100a, 100b, and 100c may have the same or different sizes. Further, the semiconductor chips 100a, 100b, and 100c may be a semiconductor die or a semiconductor package. The types, the number, the size, the stacking method, and the lamination shape of the semiconductor chips 100a, 100b, and 100c shown in the figure are illustrative and the present invention is not limited thereto. That is, although three semiconductor chips 100a, 100b, and 100c are stacked in the same size, the present invention is not limited thereto.

The heat source unit 70 can receive electric power from the power source unit 30 and generate a heat flow. The heat generated by the operation of the semiconductor chip or the like mounted on the substrate 10 by the heat dissipation part 70 can be emitted to the outside through the heat dissipation part 70. The heat sink 70 may further include a heat sink 90 that radiates heat to the outside. Alternatively, the case C may function as a heat sink. The heat source unit 70 will be described in detail below with reference to FIGS. 11 and 12. FIG. The heat sink 90 can be attached to the thermoelectric part 70 by a resin-based epoxy or an adhesive member 92 such as an adhesive tape excellent in heat resistance. The adhesive tape may be a commercially available high-temperature tape such as a known glass tape, a silicone tape, a Teflon tape, a stainless steel foil tape, a ceramic tape, or the like, and may be a tape containing aluminum oxide, aluminum nitride, silicon oxide, It is possible. The solder may also include metals such as lead (Pb), lead / tin (Pb / Sn), tin / silver (Sn / Ag), lead / tin / silver (Pb / Sn / Ag)

The heat sink 90 may comprise a metal, a metal nitride, a ceramic, a resin, or a combination thereof. For example, the heat sink 90 may be made of aluminum, an aluminum alloy, copper, a copper alloy, aluminum oxide (Al2O3), beryllium oxide (BeO), aluminum nitride (AlN), silicon nitride (SiN) As shown in FIG. In addition, the heat sink 90 may have various dimensions and shapes for more effective heat radiation.

The encapsulant can be an encapsulant material and can be, for example, an epoxy resin or a silicone resin, which is exemplary and the present invention is not limited thereto. The encapsulation material can protect the substrate 1 and the semiconductor chips 100a, 100b, and 100c from the outside by filling all or a part of the empty space in the case (C). In addition, the case C may include a metal or a polymer, protect the SSD device 1000 from the outside, and at least a part of the case C may be omitted in some cases. Further, the sealing material can replace the function of the case C.

The opening (O) may be simply a space formed in the case (C). In this case, the light-emitting part 4a and the light-receiving element 4b shown in FIG. 3 can be exposed through the opening part O, and the optical signal part 40 can be arranged to be in direct contact with the opening part O. In this case, the case C and the optical signal port 40 may be in direct contact with each other to seal the opening O.

Or the opening O may be in the form of a transparent material filled in the opening space formed in the case C. In this case, the optical signal portion 40 is formed in the opening O so that the light emitting element 4a and the light receiving element 4b shown in FIG. 3 can exchange optical signals through the external host H and the opening portion O, As shown in FIG. The opening O may be a transparent glass, plastic, or ceramic material, and may be designed to function as a lens if necessary.

3, the light-emitting element 4a and the light-receiving element 4b may be disposed on the side of the optical signal section 40 facing the opening O. In this case,

5 is a cross-sectional view illustrating an SSD device according to some embodiments of the present invention.

5, the thermal front 70 and the heat sink 90 are sequentially attached to the top surface of the semiconductor chips 100a, 100b, and 100c, that is, the top surface of the third semiconductor chip 100c, .

4 and 5, there is a difference that the positions of the heat sink 70 and the heat sink 90 are opposite to each other in the SSD device 1000. [ In the case of FIG. 4, it may be more useful when there is a lot of heat generated or accumulated between the substrate 1 and the semiconductor chips 100a, 100b, and 100c. And the generated heat can be discharged to the outside through the substrate 1. [ In this case, since the heat emission path is independent of the semiconductor chips 100a, 100b, and 100c, it may be advantageous to increase the reliability of the semiconductor chips 100a, 100b, and 100c.

On the other hand, in the case of FIG. 5, the semiconductor chips 100a, 100b, and 100c may be more usefully used when the heat generated from the semiconductor chips 100a, 100b, and 100c is large. The heat generated from the semiconductor chips 100a, 100b and 100c can be directly radiated to the outside through the thermal power 70 directly attached to the semiconductor chips 100a, 100b and 100c.

6 is a cross-sectional view illustrating an SSD device according to some embodiments of the present invention.

Referring to FIG. 6, the SSD device 1000 may further include a recognition unit 40f. The recognition unit 40f may be a part of the optical signal unit 40 or may be a separate device that is electrically connected to the optical signal unit 40 to exchange signals. The recognition unit 40f may correspond to the recognition element 4f in Fig. The recognition portion 40f may be attached to the outside of the case C, that is, to the outside surface, or may be installed so as to be exposed to the outside surface of the case C. The recognition portion 40f may be disposed adjacent to the opening O or exposed in the same direction as the opening O when viewed from the outside. Or the recognition unit 40f may be installed inside the case C adjacent to the opening O when the case C is made of an insulating material.

By the recognition unit 40f, the host H and the SSD apparatus 1000 of FIG. 3 can detect each other and can exchange optical signals through the detection. This recognition section 40f is selectively attachable to the SSD device 1000 described above or below.

7 is a cross-sectional view illustrating an SSD device in accordance with some embodiments of the present invention.

Referring to FIG. 7, the SSD device 1000 further includes a first recessed area 15a on the first side 12 of the base 10, as compared to FIG. The control unit 20, the power supply unit 30, and the optical signal unit 40 may be all or selectively mounted in the first recessed area 15a. The control unit 20 and the power supply unit 30 can be selectively sealed by an encapsulating material (not shown). The encapsulation material may encapsulate a part of the optical signal portion 40. Alternatively, the sealing material may be a transparent material. In this case, the sealing material may seal the optical signal portion 40 or fill a space between the optical signal portion 40 and the opening portion O. [ The first recessed area 15a is formed by a sidewall between the first surface 12 and the second surface 14 of the base 10 and a second recessed area 15b formed in the first recessed area 15a, So that the optical signal port 40 can be exposed.

The first recess region 15a of the control unit 20, the power source unit 30 and the optical signal unit 40 may be mounted so as not to protrude from the first recess region 15a. The control section 20, the power supply section 30 and the radio signal section 40 are separately provided in the plurality of first recessed areas 15a, and the plurality of first recessed areas 15a, .

In this embodiment, the semiconductor chips 100a, 100b, and 100c may be superposed on the control unit 20, the power supply unit 30, and the optical signal unit 40, And can be mounted on a wider area. Therefore, the semiconductor chips 100a, 100b, and 100c of this embodiment can have a larger size, compared to the embodiments of Figs.

In addition, since the area of the semiconductor chips 100a, 100b, and 100c can be made almost the same as the area of the case C, the area of the heat sink 70 and the heat sink 90 can be similarly formed.

8 is a cross-sectional view illustrating an SSD device according to some embodiments of the present invention.

7 and 8 together, the SSD device 1000 may include a thermal front end 70 as in FIGS. 4 and 5. FIG. The SSD device 1000 may also optionally include a heat sink 90. 7 and 8 are similar to FIGS. 4 and 5 in that the positions of the heat sink 70 and the heat sink 90 are opposite to each other in the SSD device 1000. This is selectively applicable in consideration of the degree and position of heat generation or accumulation, as described above.

9 is a cross-sectional view illustrating an SSD device according to some embodiments of the present invention.

Referring to FIG. 9, the SSD device 1000 further includes a second recessed area 15b on the second side 12 of the base 10, as compared to FIG. The control section 20, the power supply section 30 and the optical signal section 40 may be all or selectively mounted in the second recess region 15b. The control unit 20 and the power supply unit 30 can be selectively sealed by an encapsulating material (not shown). The encapsulation material may encapsulate a part of the optical signal portion 40. Alternatively, the sealing material may be a transparent material. In this case, the sealing material may seal the optical signal portion 40 or fill a space between the optical signal portion 40 and the opening portion O. [

The control unit 20, the power source unit 30 and the optical signal unit 40 may be mounted so as not to protrude from the second recessed area 15b in the second recessed area 15b. The control section 20, the power supply section 30 and the radio signal section 40 are separately provided in the plurality of second recess regions 15b, .

Or the second recessed area 15b of the control part 20, the power supply part 30 and the optical signal part 40 is formed in such a manner as to protrude from the second recessed area 15b, It can be mounted so as not to protrude more.

The opening O may be formed in the case C on the second side 14 of the base 10. In this case, the light-emitting element 4a and the light-receiving element 4b shown in FIG. 3 can be arranged so that the light-emitting element 40 faces the direction in which the opening O is formed. Or the opening O may be formed to abut the side surface between the first surface 12 and the second surface 14 of the base 10 as shown in Fig.

In the present embodiment, the semiconductor chips 100a, 100b, and 100c may be superposed on the control unit 20, the power supply unit 30, and the wireless signal unit 40, As shown in FIG. Therefore, the semiconductor chips 100a, 100b, and 100c of this embodiment can have a larger size, compared to the embodiments of Figs.

Also, although not shown, the first recess region 15a shown in FIG. 7 and the second recess region 15b shown in FIG. 9 may be included together. The control section 20, the power source section 30 and the optical signal section 40 may be selectively mounted in the first recess area 15a or the second recess area 15b.

7 and Fig. 8, an embodiment in which the positions of the heat sink 70 and the heat sink 90 are adhered to the opposite side of the substrate 1 in Fig. 9 is also possible.

10 is a cross-sectional view illustrating an SSD device in accordance with some embodiments of the present invention.

Referring to FIG. 10, as compared to FIG. 9, it may include all two heat sources 70a and 70b. That is to say, two heat collectors 70a and 70b may be disposed on both sides of the substrate 1, that is, on the third semiconductor chip 100c and the second surface 14, respectively. Accordingly, the heat generated in the SSD device 1000 can be rapidly discharged to both sides. In addition, heat sinks 90a and 90b can be selectively mounted on the two heaters 70a and 70b, respectively.

Although not separately shown, the two heaters 70a and 70b can be selectively attached to the inside or the outside of the case C as required. These two heat sinks 70a and 70b are applicable to some embodiments of the present invention as shown in FIGS. 4 to 6 or to some embodiments of the present invention as shown in FIGS.

9, the opening O may be formed so as to be in contact with the side surface between the first surface 12 and the second surface 14 of the base portion 10.

SSD devices 1000 according to some embodiments of the present invention shown in FIGS. 4 to 10 may be used to determine whether or not the first and second recess regions 15a and 15b are formed, the attachment position of the heat sink 70, O, and the present invention is not limited thereto, and all combinations of the embodiments are applicable.

Fig. 11 is a schematic view for explaining the operation principle of the thermal elements 70, 70a and 70b of Figs. 4 to 10.

Referring to Fig. 11, the n-type impurity element 72a and the p-type impurity element 72b are electrically connected to each other in the thermal power source. The n-type impurity element 72a and the p-type impurity element 72b are electrically connected to each other by an upper conductive member 72d at an upper portion thereof and spaced apart from each other at a lower portion thereof via a lower conductive member 72e, And is connected to the power source 74. Insulating members 72f and 72g such as ceramics are respectively formed on the upper side and the lower side of the upper conductive member 72d and the lower conductive member 72e opposite to the n-type impurity element 72a and the p-type impurity element 72b, Respectively. The n-type impurity element 72a is configured to further include an n-type impurity in the medium such as silicon or silicon-germanium. Such n-type impurities may be selected from nitrogen (N), phosphorus (P), arsenic (As), antimony (Sb), bismuth (Bi), sulfur (S), selenium (Se), tellurium (Te) Po). ≪ / RTI > The p-type impurity element 72b is further configured to further include a p-type impurity in a medium such as silicon or silicon-germanium. The p-type impurity may be one of boron (B), aluminum (Al), gallium (Ga), indium (In), thallium (Tl), zinc (Zn), cadmium (Cd) Or more. Further, the n-type impurity element 72a and the p-type impurity element 72b may be constituted by using commercially available bismuth (Bi2Te3) or tellurium (PbTe).

When a direct current is applied to the n-type impurity element 72a and the p-type impurity element 72b by the external power supply 74, the electrons move in the opposite direction with respect to the direction of current flow, . Thus, in the n-type impurity element 72a, the main carrier is electrons, and the electrons flow from the downward direction opposite to the direction of the current, that is, from the region adjacent to the upper conductive member 72d to the region adjacent to the lower conductive member 72e Move. On the other hand, in the p-type impurity element 72b, the main carrier is a hole, and the holes are moved in the downward direction in the same direction of the current, that is, from a region adjacent to the upper conductive member 72d to a region adjacent to the lower conductive member 72e Move. As a result, the direction of movement of the electrons and the holes is the same. Due to the applied direct current, the electrons and the holes become mediums for transferring heat, and the direction of heat transfer is the same as the arrow shown. As described above, when a current is applied across different solids or semiconductors, a phenomenon in which a heat generation or an endotherm different from joule heat occurs is called a Peltier effect. Typically, this Peltier effect refers to the movement of heat as a function of the current flow when other materials, such as metals and semiconductors, form junctions with each other. In other words, in the process of absorbing the energy to move the free electrons moving by the electromotive force to the higher Fermi energy level, the heat is absorbed constantly on the side where electrons are emitted by absorbing the most easily obtainable heat energy, Heat is released continuously. Thus, in Fig. 16, the n-type impurity element 72a forms a junction with the upper conductive member 72d and the lower conductive member 72e, and the p-type impurity element 72b forms a junction with the upper conductive member 72d. And the lower conductive member 72e. As a result, the upper conductive member 72d becomes a low-temperature portion and the lower conductive member 72e becomes a high-temperature portion due to the heat transmission as described above.

1, the base portion 10 is located on the upper conductive member 72d and the heat generated by the operation of the semiconductor chip 100 mounted on the base portion 10 is transferred to the n- Is moved toward the lower conductive member 72e through the impurity element 72a and the p-type impurity element 72b, and then is discharged to the outside.

The semiconductor chip 100 is positioned on the upper conductive member 72d and the heat generated by the operation of the semiconductor chip 100 or the like is transferred to the n-type impurity element 72a and / is moved in the direction of the lower conductive member 72e through the p-type impurity element 72b, and is then discharged to the outside.

This thermal element 70 has the following advantages. Firstly, since it does not require a mechanical device for operation, it is easy to handle, can be reduced in size and weight, can be freely deformed in shape, has no vibration or noise, has a long life and has high reliability. It is possible. Secondly, it is possible to easily replace the cooling region and the heating region as the current direction is changed, excellent temperature responsiveness, and temperature control at room temperature is possible. Third, it does not use refrigerant like CFC, so it is environment-friendly and has excellent durability.

FIG. 12 is a perspective view schematically showing one example of the heat sinks 70, 70a and 70b of FIGS. 4 to 10. FIG.

Referring to Fig. 12, the thermal element 70 includes an impurity element array portion 72c, conductive members 72d and 72e, a power wiring 72h, and insulating members 72f and 72g. A plurality of n-type impurity elements 72a and a plurality of p-type impurity elements 72b as described in Fig. 16 are arranged alternately in the impurity element array portion 72c. The plurality of conductive members 72d and 72e include upper conductive members 72d and lower conductive members 72e located on the upper side and the lower side of the impurity element array, respectively. The plurality of conductive members 72d and 72e electrically connect the plurality of n-type impurity elements 72a and the plurality of p-type impurity elements 72b electrically in series. The plurality of conductive members 72d and 72e may include aluminum, an aluminum alloy, copper, a copper alloy, nickel, a nickel alloy, or a combination thereof. The power wiring 72h is electrically connected to the thermoelectric module wireless power supply unit 74 and electrically connected to a part of the conductive members 72d and 72e to electrically connect the impurity element arrangement portion And 72c. The insulating members 72f and 72g are respectively attached to the upper side and the lower side of the plurality of conductive members 72d and 72e facing the impurity element array portion 72c. With this configuration, the direct current applied through the power wiring 72h alternately passes through the n-type impurity elements 72a and the p-type impurity elements 72b. Accordingly, the Peltier effect as described above with reference to Fig. 8 transfers heat from the upper conductive members 72d toward the lower conductive members 72e, and consequently releases the heat to the outside.

Claims (10)

A substrate having opposing first and second surfaces;
A semiconductor chip mounted on the substrate;
An optical signal unit mounted on the substrate and receiving data to be written to the semiconductor chip using an optical signal or transmitting data read from the semiconductor chip;
A thermal all element mounted on the substrate and controlling a temperature of the substrate and the semiconductor chip; And
A case surrounding the substrate, the semiconductor chip, the heat sink, and the optical signal portion;
/ RTI > The method according to claim 1,
Wherein the optical signal unit includes a light emitting unit for transmitting an optical signal to an external device and a light receiving unit for receiving an optical signal from an external device. 3. The method of claim 2,
The case further includes an opening,
Wherein the light emitting portion and the light receiving portion transmit and receive an optical signal to an external device through the opening. The method according to claim 1,
Wherein the singulated substrate includes a recessed region in at least one of the first surface or the second surface,
Wherein the optical signal portion is located within the recessed region. 5. The method of claim 4,
Wherein the semiconductor chips are located in overlapping relation with the optical signal portion. The method according to claim 1,
Wherein the thermoelectric part is attached on one of the upper surface of the semiconductor chip and the second surface of the substrate. The method according to claim 1,
And the thermoelectric part is attached to the upper surface of the semiconductor chip and the second surface of the substrate, respectively. The method according to claim 1,
Wherein the semiconductor chip is a non-volatile memory. The method according to claim 1,
Further comprising a buffer unit for temporarily storing data to be written in the semiconductor chip, temporarily storing data read from the semiconductor chip, and a volatile memory. 3. The method of claim 2,
Further comprising a recognizing unit provided adjacent to the light emitting unit and the light receiving unit and configured to allow the external device to sense the light emitting unit and the light receiving unit using a radio signal and to transmit and receive an optical signal.

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