KR101276829B1 - Method For Providing Interleaver, Method For Interleaving, Both With Continuous Length, And Method For Decoding Using The Same - Google Patents

Abstract

The present invention relates to an interleaver providing method for providing a continuous length, an interleaving method, and a decoding method using the same. According to the present invention, interleaving is possible even when the length of the number of windows used for parallel decoding is not a multiple length by using the basic interleaver concept. This can be avoided by delaying the reading for a time.

Turbo code, interleaver, parallel decoding, delay

Description

Method for Providing Interleaver, Method For Interleaving, Both With Continuous Length, And Method For Decoding Using The Same}

1 shows the basic structure of a turbo encoder.

2 is a diagram showing the basic structure of a turbo decoder.

3 is a diagram illustrating that each window of a first component decoder included in a turbo code decoder performing parallel decoding calculates extrinsic information and stores the parallel information in a memory composed of a plurality of memory banks in parallel;

FIG. 4 is a diagram for explaining a memory bank contention problem that occurs when each window of a second component decoder included in a turbo code decoder that performs parallel decoding reads incident information from memory; FIG.

5 is a diagram for explaining a parallel decoding method using an interleaver without contention.

FIG. 6 is a flow chart illustrating a method of providing an interleaver having a continuous length using a basic interleaver concept according to an embodiment of the present invention. FIG.

FIG. 7 is a diagram illustrating a memory bank contention problem that may occur when decoding is performed after interleaving a sequence having a continuous length in a parallel decoding process using a simple basic interleaver concept. FIG.

8 is a flowchart for explaining a method of preventing a memory bank contention problem in a parallel decoding process even when reading of some index portions is omitted in an interleaving process according to an embodiment of the present invention.

FIG. 9 is a view for explaining an operation when decoding is performed according to the method of FIG. 8; FIG.

The present invention relates to a wireless communication technology, and more particularly, to an interleaver providing method for providing a continuous length, an interleaving method, and a decoding method using the same.

FIG. 1 is a diagram illustrating a basic structure of a turbo encoder.

The turbo code (hereinafter referred to as "TC") is a code obtained by connecting two recursive symmetric convolutional codes in parallel using an interleaver. This TC uses the interleaver 102 to input the input data X of the turbo encoder as shown in FIG. 1 by parity bits Y ₁ encoded by the first configuration encoder EN ₁ 101, and the input data by the interleaver 102. After interleaving, it may be generated through a combination with parity bits Y ₂ encoded by the second configuration encoder EN ₂ 103.

2 is a diagram illustrating a basic structure of a turbo decoder.

The decoder which decodes the TC comprises two component decoders 201 and 203 symmetrically with the encoder shown in FIG. 1, and the two component decoders 201 and 203 repeatedly send and receive extrinsic information. Decoding is performed. That is, the first component decoder 201 (hereinafter “DEC ₁ ”) corresponds to the received signal of the input data X, the first parity bit Y ₁ , and the second parity bit Y ₂ transmitted from the transmitter. After calculating R ^X , R ^Y1 , and R ^Y2 , and calculating the side information corresponding to the entire length of the received signal, the calculated side information is interleaved by the interleaver 202 to perform a second component decoder 203 (hereinafter referred to as “DEC ₂ ”). Used by. Incidental information calculated by DEC ₂ 203 is deinterleaved by reverse interleaver 204 and used again in DEC ₁ 201. As such, the collateral information transmitted and received by two component decoders, such as DEC ₁ and DEC ₂ , is repeatedly calculated and updated in these component decoders, so that TC exhibits good performance.

The above-described configuration decoder first calculates a forward metric, a backward metric, and a branch metric in order to calculate the side information. In this case, instead of calculating the three metrics for the total length, a constituent encoder divides the total length into several windows and sequentially calculates the three metrics for each window, and calculates side information as much as the window length. There is a way.

In this way, when the unit information is calculated for all windows sequentially and the calculation of the unit information is completed for the entire length, the calculated unit information is interleaved or deinterleaved to calculate new (updated) unit information at different component decoders. It is used to do As described above, a method of sequentially calculating the side information as much as the window length is called sliding window decoding, and is an implementation technique of a general TC decoder.

 Meanwhile, in the above-described sliding window decoding, there is a method in which each window simultaneously calculates the side information in parallel without sequentially calculating the side information for each window, which is called a parallel decoding method of TC.

Such sliding window decoding and parallel decoding methods of TC include "Performance Analysis of Turbo Decoder for 3GPP Standard using the Sliding Window Algorithm" by Mohamadreza Maandim et al. And "A PARALLEL DECODING" by Jah-Ming Hsu. SCHEME FOR TURBO CODES "and the like.

In the parallel decoding of the above-described TC, each window uses bitwise received values received in the channel and incidental information calculated by different component decoders to calculate the aforementioned three metrics. Received values and collateral information are stored in a fixed memory space in order (bitwise), and each component decoder reads the values needed to compute the metric from memory and writes the collateral information calculated by the configuration decoder back into memory. do.

Parallel decoding requires that each window access one memory bank at a time.

3 is a diagram illustrating that each window of a first component decoder included in a turbo code decoder performing parallel decoding calculates extrinsic information and stores the information in parallel in a memory composed of a plurality of memory banks.

The example of Figure 3 shows a case in which the full length K _m of length W N _w N _w dividing the single window of the window at the same time calculates the collateral information. As shown in FIG. 3, when each window calculates the auxiliary information, the first component decoder simultaneously stores the calculated auxiliary information in each auxiliary information memory. Since the auxiliary information memory is composed of Nw memory banks as described above, the Nw auxiliary information calculated by Nw windows of the first component decoder at one time instance at the same time is different from the different memory banks of the auxiliary information memory. Each will be stored at the same time.

In this way, no problem occurs when each window of the component decoder connects to different memory banks for one unit time. However, in the turbo decoder, each component decoder is connected to information interleaved or deinterleaved by subcomponents calculated by other component decoders, and memory in which two or more windows simultaneously access the same memory bank in the interleaving or reverse interleaving process. Problems arise that can cause bank contention problems. This problem is described in detail below.

FIG. 4 is a diagram for describing a memory bank contention problem that occurs when each window of a second component decoder included in a turbo code decoder that performs parallel decoding reads incident information from memory.

In general, the second component decoder calculates the new (updated) collateral information using the collateral information calculated by the first component decoder. In this case, as shown in FIG. 4, the second component decoder converts and reads the order in an interleaved order instead of the stored order when reading the auxiliary information stored in the auxiliary information memory.

 Where i is the index (input index of the interleaver) in the order stored by the first component decoder and stored in the auxiliary information memory, and i is the index (output index of the interleaver) in the order in which the second component decoder reads the auxiliary information. It is assumed that the interleaver equation satisfies i = π (j).

That is, when the second component decoder calculates K subunit information from 0 to K-1, the j subunit information between 0 and K-1 is i = π (j) th subunit produced by the first component decoder. After reading the information, i.e., the unit information stored in the i-th unit from the unit information memory, the three metrics mentioned above are calculated and the new (updated) unit information is calculated with the three metrics.

On the other hand, the second decoder is also configured bar, a second configuration of a decoder for the N _w N _w of the window should at the same time calculates the collateral information for parallel decoding The two windows must simultaneously read N _w auxiliary information per unit time from the K auxiliary information stored in the auxiliary information memory. That is, as shown in FIG. 4, the second component decoder does not sequentially read and calculate an index having an index j of 0 to K-1, but indexes 0 to W _m −1 and W _m to 2 W _m − for each window. 1, 2W _m to 3W _m -1, ... sequentially read information stored in the subsidiary information memory at a time of one unit each, which is the index (i) according to the order stored in the subsidiary information memory and As described above, reading is performed in accordance with the relationship of i =? (J).

At this time, if N _w auxiliary information does not exist in each of the N _w memory banks, a "memory bank connection contention problem" occurs in which two or more windows simultaneously access one memory bank at one unit time.

For example, in FIG. 4, when each window of the second component decoder reads information stored in the auxiliary information memory at unit time 1, memory bank connection contention occurs by simultaneously accessing memory bank 1 in window 0 and window 1. It is shown to do.

The memory bank connection contention problem as described above can be solved using a well designed interleaver, and an interleaver designed such that the memory bank connection contention problem does not occur is referred to as a "contention-free interleaver".

General contention free interleaver has the following properties.

Here, j ₁ and j ₂ have different reading positions in the index of the entire K length, but mean indexes that are read in the same unit time in different windows of the component decoder, and can be expressed as follows.

는 제 2 구성 디코더에서 계산하는 j 번째 부대 정보를 계산하기 위하여 접속해야 하는 메모리 뱅크의 주소를 나타내는 것으로 볼 수 있다. 따라서, 상기 수학식 1을 만족하는 인터리버를 설계할 경우 서로 다른 윈도우가 동일 시간에 서로 다른 메모리 뱅크를 접속하게 된다. 이때, 메모리 뱅크 내에서 저장된 부대 정보가 몇 번째인지는 중요하지 않다. 단 K개의 부대 정보가 각각 한 번씩 접속하게 되면 된다.In Equation (1)

Can be regarded as representing the address of the memory bank to which the second component decoder should access in order to calculate the j th sub information. Therefore, when designing an interleaver that satisfies Equation 1, different windows connect different memory banks at the same time. At this time, it is not important how many auxiliary information is stored in the memory bank. Only K units have to access the information once.

5 is a diagram for describing a parallel decoding method using an interleaver without contention.

Fig. 5 shows that the second component decoder connects to the auxiliary information memory through an interleaver that satisfies the above equations.

In FIG. 5, the information determined by the same window of the second component decoder is represented by a background pattern indicated by diagonal lines in the same direction, and the number indicated in each information is a unit time for each window of the second component decoder to access the auxiliary information memory. Indicates. By using such a contention free interleaver, each window of the second component decoder reads information stored in different memory banks every unit time, and calculates three metrics so that the memory bank connection contention problem does not occur. .

In addition, although the above description has focused on the method in which the second component decoder connects to each memory bank in which the auxiliary information is stored for reading the auxiliary information, the second component decoder is configured by the first component decoder as well as the auxiliary information. The undecoded reception value itself (R ^x in FIG. 2) is read from the memory. This received value is read in the same way from the memory when the second constituent decoder calculates the branch metric, and can specifically read each received value using a contention free interleaver as described above and use it in the decoding operation.

However, the contention-free interleaver capable of such parallel decoding has a limitation that the size of the interleaver must be a multiple of the number N _w of windows in order to satisfy the condition as in Equation 1 despite the index mapping relation in various interleaving. . Meanwhile, in turbo decoding, the length of a sequence to be decoded may have various continuous lengths according to the requirements of a communication system. Therefore, a technique for parallel decoding a sequence of consecutive lengths while using such a contention-free interleaver concept is required. It is becoming.

Summary of the Invention An object of the present invention for solving the above problems is a method of decoding a sequence of consecutive lengths using a basic interleaver concept while maintaining a parallel decoding method through a contention free interleaver in turbo decoding, The present invention provides an interleaver providing method.

Another object of the present invention is to provide a method for stably performing parallel decoding by providing a method for solving a memory bank access contention problem that may occur when parallel decoding is performed by using a basic interleaver concept. have.

An interleaver providing method according to an embodiment of the present invention for achieving the above object is a basic interleaver preset to have a multiple length of the number of windows used for parallel decoding according to a first length, which is a required interleaver length. Selecting a primary interleaver having a second length of the set; And adjusting the length of data that can be processed using the selected basic interleaver to the first length when the first length is smaller than the second length.

In this case, the second length may be a minimum multiple of the first length or more of multiples of the number of windows, and the adjusting may include the first length of indexes of data input to a basic interleaver having the second length. This can be done by accepting only a number of indices.

Meanwhile, an interleaving method according to another embodiment of the present invention corresponds to a difference between a length of an original sequence and a length of a base interleaver selected from a set of base interleavers preset to have a multiple length of the number of windows used for parallel decoding. Inserting dummy information into an original sequence index of length; Interleaving the selected sequence of basic interleaver lengths into which the dummy information is inserted; And outputting an index in which the dummy information is not inserted among the interleaved sequence indexes.

In this case, the selected basic interleaver preferably has a minimum multiple length greater than or equal to the length of the original sequence among multiples of the window number. In the dummy information insertion step, the dummy information includes the selected basic interleaver among the indexes of the original sequence. The interleaved sequence index that is inserted into an index equal to or greater than a length of and may be an index except for an index corresponding to an original sequence index equal to or greater than the length of the selected basic interleaver.

Alternatively, in the dummy information insertion step, the dummy information is inserted into an index arbitrarily selected by a length corresponding to a difference between the length of the original sequence and the length of the selected basic interleaver among the indexes of the original sequence, and outputting the index. In the step, the output interleaved sequence index is an index except an index corresponding to the original sequence index selected in the dummy information insertion step, and after the index output step, the index of the output sequence before the dummy information insertion The method may further include mapping according to the index of the sequence.

A decoding method according to another embodiment of the present invention includes inserting dummy information into an original sequence index having a length corresponding to a difference between a length of an original sequence and a length of a base interleaver selected from a set of preset base interleavers. step; Interleaving the selected sequence of basic interleaver lengths into which the dummy information is inserted; And performing a decoding operation by reading an index in which the dummy information is not inserted among the interleaved sequence indexes, and in the step of performing the decoding operation, when reading the index into which the dummy information is inserted, 1 Read by delay for a time instance.

In this case, the basic interleaver set is set to have a multiple length of the number of windows used for parallel decoding, and the performing of the decoding operation may perform decoding operations in parallel by a plurality of windows included in the component decoder. have.

The original sequence may be a sequence divided and stored in a plurality of memory banks.

Hereinafter, preferred embodiments according to the present invention will be described in detail with reference to the accompanying drawings. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The following detailed description, together with the accompanying drawings, is intended to illustrate exemplary embodiments of the invention and is not intended to represent the only embodiments in which the invention may be practiced. The following detailed description includes specific details in order to provide a thorough understanding of the present invention. However, those skilled in the art will appreciate that the present invention may be practiced without these specific details. In some instances, well-known structures and devices are omitted or shown in block diagram form around the core functions of each structure and device in order to avoid obscuring the concepts of the present invention. In addition, the same components will be described with the same reference numerals throughout the present specification.

One embodiment of the present invention utilizes the " Basic Interleaver " concept to solve the problem that a contention-free interleaver may have only a multiple of the number of windows included in each component decoder as described above. A method of providing an interleaver having a length is provided. The basic interleaver is an interleaver having a preset length to implement an interleaver having a required length. In general, it is preferable that a basic interleaver set having various lengths is preset as necessary.

6 is a flowchart illustrating a method of providing an interleaver having a continuous length using a basic interleaver concept according to an embodiment of the present invention.

In an embodiment of the present invention illustrated in FIG. 6, an interleaver having a length K ′ is selected from the set of basic interleavers set in advance as described above to provide an interleaver having a length of K (step S601). Here, K 'is a multiple of the number of windows N _w for parallel decoding, and selecting a basic interleaver having a minimum K' length of K≤K 'will make the subsequent pruning process easier. Can be.

Then, in the case of K≤K ', the basic interleaver of the length K' selected in step S601 may be adjusted to an interleaver having the length of K. The interleaver length adjustment will be described in detail for each interleaving step as follows.

In step S602, K'-K dummy information is inserted into the input sequence of the interleaver. That is, when the input sequence is B = (b ₀ , b ₁ , ..., b _{k -1} ), K'-K dummy bits are inserted to insert B '= (b' ₀ , b ' ₁ ,. .., b _{k -1} , b _k , b _{k +1} , ..., b _{k ' -1} ). In one embodiment of the present invention, as described above, the position at which the dummy information is inserted into the input sequence is a portion having an index of K or more. However, in another embodiment of the present invention, it may be defined differently, which will be described later. As described above, the dummy information inserted into the input sequence adjusts the length of the input sequence to the length K 'so that interleaving by the basic interleaver having the length K' is possible (step S603).

When the interleaved output sequence is " O " through step S603, this can be represented as O = (o ₀ , o ₁ , ..., o _{k ' -1} ). Thereafter, in step S604, an index (Non Dummy Index) excluding the index of the output sequence whose dummy information corresponds to the index of the input sequence is output. Specifically, in a case where there is i =? (J) relationship between the index i of the input sequence and the index j of the output sequence in step S603, i = k, k + 1, ..., k'-1 in the above example. This means outputting an index except for the output index j corresponding to. As a result, the output sequence O 'leaves only the information of the position from which the index was removed (pruned). In addition, the above description has been mainly focused on a method of outputting the index except the dummy information inserted, but by focusing on the relationship of _{j j} = b _{i = Π (j)} , the information itself of the corresponding index is removed from the output sequence. You can get the same result by printing.

On the other hand, in one embodiment of the present invention, unlike the above-described example in which the dummy information is inserted in a portion where the index is K or more, and only the index in which the dummy information is not inserted after interleaving, K among the indexes within 0 to K'-1 is obtained. It is also possible to randomly select '-K indexes and insert dummy information into the selected indexes, and then output only the indexes where dummy information is not inserted according to the interleaving index mapping relationship.

In this case, the method may further include a step S605 of matching the mapping relationship with the original index except for the non-output index part, that is, the punctured index part as shown in step S605 of FIG. 6.

For example, in the example of K '= 16 and K = 14, after inserting dummy information by selecting i = 4 and 10 as the dummy information insertion index among the input sequence indexes i between 0 and K'-1, Interleaving is performed, and accordingly, the sequence of length K 'outputted in the above-described example is represented by π _k' = {0, 7, 6, 5, 12, 3, 2, 1, 8, 15, 14, 13, 11, Look at the case shown as 9}. It is assumed here that each number represents an index of the input sequence for convenience.

The index except for the index of the input sequence into which the dummy information is inserted among the sequences having the length K 'is output. For example, when o ₁₂ = i ₄ and o ₁₄ = i ₁₀ are dummy information, only the index except for the corresponding index among the index j of the output sequence is output. Accordingly, the above-described output sequence of length K 'is π _{pre - mapping k} = {0, 7, 6, 5, 12, 3, 2, 1, 8, 15, 14, 13, 11, 9} having a length K. Is represented. However, such a sequence requires index adjustments to each other in relation to an input sequence of length K (for example, includes indexes 14 and 15 which do not exist in the input sequence of length K). The method may further include mapping the index to match the index of the original input sequence through the index mapping step. Specifically, in the above example, the index 5 of the input sequence is 4, 6 is 5, 8 is 7, 9 is 8, 11 is 9, 12 is 10, 13 is 11, 14 is 12, It is easy to see that 15 maps to 13. Accordingly, an output sequence of the final length K may be expressed as π _k = {0, 6, 5, 4, 12, 3, 2, 1, 7, 13, 12, 11, 9, 8}.

That is, in the interleaver providing method having a continuous length according to an embodiment of the present invention, adjusting the selected basic interleaver length to the length of the sequence for which the original processing is requested is the original of the indices of the sequence input to the selected basic interleaver. As long as it is performed by accepting only a number of indices corresponding to the length of the sequence, the specific method may vary as described above, and need not be limited to any one manner.

By using the basic interleaver concept, a sequence having a length that is not a multiple of the number of windows included in each component decoder for parallel decoding may also be interleaved using an existing collision-free interleaver. However, the conventional method of performing collision-free interleaving using the basic interleaver concept may be used without any problem in the encoding stage. However, when parallel decoding is performed using this as is, the following problem may occur.

FIG. 7 is a diagram illustrating a memory bank contention problem that may occur when decoding is performed after interleaving a sequence having a continuous length in a parallel decoding process using a simple basic interleaver concept.

In FIG. 7, when the first component decoder calculates side information having a length K and stores it in a side information memory including a plurality of memory banks, a contention free interleaver having a length of K ′ is used as a basic interleaver, and dummy information is inserted. The index shows that interleaving of length K is performed by not reading in the reading process of the second component decoder. In this case, when the second component decoder reads the auxiliary information having the length K as it is and performs the decoding operation, the memory bank connection contention occurs due to the shift of the read time due to the information from which the read is omitted.

That is, in FIG. 7, the information read at unit time 1 in the window N _w −1 is information referred to as “1” having a background color of a checkered diagonal line stored in the memory bank 0. However, when the information is used without omission (or puncturing) of the dummy information in the interleaving process of the contention-free interleaver having the length K ', the information is information that has been read in unit time 2 in the window N _w −1. However, as described above, as the reading of the index into which the dummy information is inserted is omitted, the reading order is shifted one by one to eventually connect the memory bank 0 at unit time 1. In this case, as shown in FIG. 7, window 0 may also access the same memory bank 0 at unit time 1, thereby causing memory access contention.

Therefore, when the interleaver using the basic interleaver concept is used in the decoding stage to provide a continuous length, a technique for solving the memory bank connection contention problem caused by the shift of the read time according to the omission of the dummy information is required.

In order to solve such a problem, the decoding method according to an embodiment of the present invention proposes the following method.

8 is a flowchart illustrating a method of preventing a memory bank contention problem from occurring in a parallel decoding process even when reading of some index portions is omitted in an interleaving process according to an exemplary embodiment of the present invention.

First, as described above with reference to FIG. 6, the method for performing interleaving even when the length is not a multiple of the number of windows included in each component decoder for parallel decoding using the basic interleaver concept is the same as FIG. 8. . That is, in step S801, one basic interleaver is selected from among a set of basic interleavers set to have multiples of the number of windows, and the difference between the length of the basic interleaver selected in step S802 and the actual sequence length to be interleaved. Insert dummy information into an index of length. Thereafter, interleaving is performed in step S803.

In the interleaving method illustrated in FIG. 6, after such interleaving, only the index without dummy information is output. However, the decoding method according to an embodiment of the present invention performs a decoding operation for calculating the forward metric, the reverse metric, and the branch metric as described above by reading the index in the case where the dummy information is not inserted as described below. In the case of the index into which the dummy information is inserted, as in the case of FIG. 6, it is not read (that is, output from an interleaving point of view), but at this time, a method of delaying by one unit time is proposed. As described above, when reading the index into which the dummy information is inserted, a delay of one unit time is prevented to prevent the time sequence of the information read thereafter from shifting due to omission (or puncturing) of the dummy information reading. Accordingly, the memory bank connection contention problem as described in FIG. 7 can be prevented from occurring.

Specifically, the steps of FIG. 8 will be described in detail.

After the interleaving is completed in step S803, the auxiliary information divided and stored in the plurality of memory banks is started to be read according to the index mapping relationship according to the interleaving. The reading of the side information and the decoding operation using the read information take a parallel decoding method performed in parallel in each of the N _w windows, rather than sequentially proceeding with respect to the entire length of the sequence. Accordingly, in this example, the index of the unit time according to the order of the information read in each window of the component decoder for performing the decoding operation is called jn, and in step S804, jn is initialized for reading.

Thereafter, it is determined whether the information read in jn in step S805 is dummy information inserted in step S802. That is, it is determined whether or not the input index i corresponding to the output index j read out to jn of the entire K 'length sequences is selected as the index for inserting dummy information in step S802. If the index read from jn is a dummy index, the corresponding information is not read or a decoding operation is not performed using the information, and the process proceeds to step S806 to be delayed by one unit time. This is illustrated by increasing the information reading unit time jn by one.

On the other hand, if i corresponding to j in the unit time jn in step S805 is not a dummy index, the flow advances to step S807 to read the information and perform a decoding operation using the information. Thereafter, the process proceeds to the next unit time in order to read the next information. In step S809, the unit time jn reaches Wn in order to perform the same process by the length Wm, which is the length of information to be processed in each window. Is determined, and the above-described process is repeated until jn reaches Wn.

FIG. 9 is a diagram for describing an operation when decoding is performed according to the method of FIG. 8.

As can be seen in FIG. 9, in FIG. 7, a tiled background pattern of memory bank 0 is read instead of reading an input index K′-1 stored in memory bank Nw-1, which is dummy information, at unit time 1 of window Nw-1. By reading the information indicated by " 2 " in FIG. 9, there is a contention in which the window 0 and the window Nw-1 are simultaneously connected to the memory bank 0, but according to an embodiment of the present invention as described in FIG. According to the decoding method, when the input index K'-1, which is an index of dummy information, is mapped according to the index mapping relationship in the interleaving process in unit time 1 of the window Nw-1, the decoding operation is not performed by reading this. It can be seen that the memory bank connection contention as described above can be avoided by delaying the reading by one unit time without reading the next information. In FIG. 9, the window N _w −1 delays reading by one unit time in unit time 1 as indicated by “D”.

Meanwhile, the method according to the embodiment of the present invention described above with reference to FIGS. 8 and 9 decodes the auxiliary information stored after the first component decoder performs the decoding operation and the second component decoder reads the interleaving information after interleaving. Although the description has been made with respect to the process used for the calculation, it will be apparent to those skilled in the art that the decoding method may be equally applied to the second component decoder to read the reception value R ^x and calculate the branch metric through the decoding operation. For example, when a plurality of memory banks storing received values are connected to each window of the second component decoder at the same unit time, the interleaver may implement a collision-free interleaver with a continuous length using a basic interleaver concept. As a result, a contention problem that may occur in the decoding stage may be solved by giving a delay of 1 unit time when reading a reception value in which reading is omitted.

The detailed description of the preferred embodiments of the invention disclosed as described above is provided to enable any person skilled in the art to make and practice the invention. Although the above has been described with reference to the preferred embodiments of the present invention, those skilled in the art will variously modify and change the present invention without departing from the spirit and scope of the invention as set forth in the claims below. I can understand that you can. Accordingly, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

According to one embodiment of the present invention as described above, it is possible to encode a sequence of consecutive lengths using the basic interleaver concept while maintaining a parallel decoding method through an interleaver without contention in turbo decoding.

In addition, when reading the information in which the output is omitted in the basic interleaver concept, the memory bank connection contention problem that may occur when the interleaver is simply applied to the decoding side and the parallel decoding is performed is delayed by one unit of time. This can be avoided.

Claims (10)

delete delete delete Inserting dummy information into an original sequence index of a length corresponding to a difference between a length of an original sequence and a length of a selected base interleaver among preset basic interleaver sets having a multiple of the number of windows used for parallel decoding; ; Interleaving the selected sequence of basic interleaver lengths into which the dummy information is inserted; And And outputting an index in which the dummy information is not inserted among the interleaved sequence indexes. 5. The method of claim 4, And the selected basic interleaver has a minimum multiple length greater than a length of the original sequence among multiples of the window number. The method according to claim 4 or 5, In the dummy information inserting step, the dummy information is inserted into an index equal to or greater than the length of the selected basic interleaver among the indices of the original sequence, And in the index outputting step, the interleaved sequence index to be output is an index excluding an index corresponding to an original sequence index equal to or greater than the length of the selected basic interleaver. The method according to claim 4 or 5, In the dummy information inserting step, the dummy information is inserted into an index arbitrarily selected by a length corresponding to a difference between the length of the original sequence and the length of the selected basic interleaver among the indexes of the original sequence, In the index output step, the output interleaved sequence index is an index excluding an index corresponding to the original sequence index selected in the dummy information insertion step, And after the index output step, mapping the index of the output sequence according to the index of the original sequence before inserting the dummy information. Inserting dummy information into an original sequence index having a length corresponding to a difference between a length of an original sequence and a length of a selected basic interleaver among a preset basic interleaver set; Interleaving the selected sequence of basic interleaver lengths into which the dummy information is inserted; And Performing a decoding operation by reading an index in which the dummy information is not inserted among the interleaved sequence indexes, In the step of performing the decoding operation, when reading the index into which the dummy information is inserted, delaying and reading the index information for one unit of time. 9. The method of claim 8, The basic interleaver set is set to have a multiple length of the number of windows used for parallel decoding. The performing of the decoding operation comprises performing the decoding operation in parallel by a plurality of windows included in the component decoder. 10. The method according to claim 8 or 9, And the original sequence is a sequence divided and stored in a plurality of memory banks.

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