KR101256433B1 - Photovoltaic system of maximum power point tracking mode using pv current - Google Patents

Abstract

PURPOSE: A solar light power generating system of a maximum power point tracking method using PV current is provided to rapidly follow a MPP(Maximum Power Point) using instantaneous sampling extraction and maximum point current control. CONSTITUTION: A photovoltaic panel(10) converts light energy into electric energy. A symmetry boost converter(20) boosts the output voltage of the photovoltaic panel. An A/D converter(30) converts the output voltage and output current of the photovoltaic panel into digital light output voltage and digital light output current. A maximum power point following part produces digital light output power. The maximum power point following part compares the digital light output power with the previous digital light output power before comparing the digital light output current with the previous digital light output current for generating one between increase supplementary quantity and decrease supplementary quantity. A reference current controlling part(70) controls reference current using the supplementary quantity. An impact coefficient controlling part(80) controls an impact coefficient. A maximum point current controlling device(40) controls the operation of the maximum power point following part. A PWM controlling device(90) generates a PWM control signal for controlling the switching cycle of the symmetry boost converter. [Reference numerals] (10) Photovoltaic panel; (20) Symmetry boost converter; (30) A/D converter; (40) Maximum point current controlling device; (50) MPPT part; (60) SC part; (70) Reference current controlling part; (80) Impact coefficient controlling part; (90) PWM controlling device; (AA) Load Vp, Vm;

Description

Photovoltaic system of maximum power point tracking mode using PV current}

The present invention relates to a solar power generation system of the maximum power point tracking method using PV current.

In recent years, the problem with the energy crisis is intensifying. People are very concerned about fossil fuel depletion and environmental issues caused by traditional power generation. Significant research activities on new power energy sources are underway around the world. As a result, the cost of renewable energy sources such as photovoltaic panels and wind generators is falling and their performance is improving. Until now, solar power systems have been mainly used for charging batteries, driving water pumps, home power supplies, and satellite power systems. An important advantage of this photovoltaic system is that it is supplied by the sun, an infinite source of energy, clean, maintenance free, and free of air pollution.

The output characteristics of photovoltaic panels are known to vary with the amount of sunlight and temperature. In addition, the photovoltaic panel has a nonlinear output current or voltage characteristic with respect to the output power Ppv. As such, the photovoltaic system must be able to extract the maximum possible power from the photovoltaic panel. Thus, the photovoltaic system is preferably operated at the maximum power point (MPP) of the photovoltaic panel. To this end, a maximum power point tracking (MPPT) algorithm is applied to a solar power system.

The maximum power point of the photovoltaic panel changes with the state of the atmosphere. As such, the reference value for the output current or output voltage of the photovoltaic panel used to control the photovoltaic system by the MPPT algorithm must also be changed according to the state of the atmosphere. In order to solve this problem, the traditional P & O MPPT algorithm and the improved P & O MPPT algorithm are mainly used in photovoltaic power generation systems because of the simple structure and easy implementation. However, the traditional P & O MPPT algorithm and the improved P & O MPPT algorithm cause drawbacks such as vibrations around the highest power point, slow response speed, and tracking in the wrong direction due to rapid changes in solar radiation and external temperature.

In addition, IncCond (Incremental Conductance) MPPT algorithms, which can in principle eliminate the shortcomings of the P & O MPPT algorithm, are also used in solar power systems. However, the IncCond MPPT algorithm requires analog circuitry, which complicates the construction of photovoltaic systems. In addition, the IncCond MPPT algorithm allows for RC circuits to eliminate switch harmonics and requires two divisions, unlike P & O MPPT algorithms that only require one multiplication. As such, IncCond MPPT photovoltaic systems are unlikely to improve response speeds beyond their limits.

Therefore, embodiments of the present invention relate to a photovoltaic power generation system of the MPPT method using PV current to solve the above problems.

The present embodiments provide an MPPT type photovoltaic power generation system using PV current that can quickly follow MPP.

In addition, the present embodiment is to provide a photovoltaic power generation system of the MPPT method using PV current that can improve the response speed beyond the limit.

In accordance with an aspect of the present invention, there is provided a photovoltaic system of an MPPT method using PV current: a photovoltaic panel for converting light energy into electrical energy; A symmetric step-up converter for boosting the output voltage of the photovoltaic panel; An A / D converter for converting an output voltage and an output current of the photovoltaic panel into a digital light output voltage and a digital light output current; Calculate a digital light output power based on the digital light output voltage and the digital light output current from the A / D converter, compare the digital light output power with a previous digital light output power, and compare the digital light output current with A maximum power point follower which performs a comparison of the previous digital light output currents and generates any one of a constant decrease and an increase compensation amount according to the comparison result; A reference current adjusting unit which adjusts a reference current by using the compensation amount from the maximum power point following unit; An impact coefficient controller for adjusting an impact coefficient based on the adjusted reference current from the reference current controller and a digital light output current from the A / D converter; A peak current controller that controls the operation of the maximum power point follower based on the digital light output current from the A / D converter and the regulated reference current from the reference current adjuster; And a PWM controller generating a PWM control signal having a pulse width corresponding to the adjusted shock coefficient from the impact coefficient adjusting unit and controlling the switching period of the symmetric boost converter using the PWM control signal. It is done.

According to the present invention, the MPPT solar system using PV current uses instantaneous sampling and peak current control of the present invention. As such, the MPPT solar system can quickly follow the MPP and improve the response speed beyond the limit.

1 is a block diagram showing the configuration of a photovoltaic power generation system of the MPPT method according to an embodiment of the present invention.
FIG. 2 is an equivalent circuit of a photovoltaic cell included in the photovoltaic panel of FIG. 1.
3A and 3B are data sheets describing the terminal voltage characteristics of the output current and the output power of the photovoltaic panel 10 when the temperature is 25 ° and the solar radiation amount is 200 to 1000 W / m ² .
4A and 4B are data sheets describing the terminal voltage characteristics for the output current and the output power of the photovoltaic panel 10 when the temperature is 60 ° and the solar radiation amount is 200 to 1000 W / m ² .
FIG. 5 is a detailed circuit diagram of the symmetric boost converter shown in FIG. 1.
FIG. 6 is a detailed block diagram of the A / D converter shown in FIG. 1.
FIG. 7 is a detailed block diagram illustrating in detail the first and second scaling units illustrated in FIG. 2.
FIG. 8 is a detailed circuit diagram illustrating in detail the impact coefficient adjusting unit and the PWM controller shown in FIG. 1.
9 is a flowchart of a P & O MPPT algorithm performed by the MPPT unit and the reference current controller shown in FIG.
FIG. 10 is a current characteristic curve of an output power of a photovoltaic panel for explaining an operation region of the MPPT unit shown in FIG. 1.
FIG. 11 is a circuit diagram showing details of the SC unit, the MPPT unit, and the reference current value adjusting unit shown in FIG. 1.
12 is a detailed circuit diagram of the peak current controller shown in FIG.
FIG. 13A is a data sheet illustrating characteristics of the output voltage Vpv of the photovoltaic panel with time obtained through simulation when the amount of insolation rapidly changes.
FIG. 13B is a data sheet illustrating characteristics of the output current ipv and the reference current Iref of the photovoltaic panel over time obtained through simulation when the amount of solar radiation changes rapidly.
FIG. 13C is a data sheet for explaining the characteristics of the output power Ppv of the photovoltaic panel with time obtained through simulation when the solar radiation changes rapidly. FIG.
FIG. 14A is a data sheet for explaining the characteristics of the output current ipv with respect to the output voltage Vpv of the photovoltaic panel obtained through simulation when the solar radiation changes suddenly.
FIG. 14B is a data sheet for explaining the characteristics of the output current ipv with respect to the output power Ppv of the photovoltaic panel obtained through simulation when the solar radiation changes suddenly. FIG.

Hereinafter, an MPPT solar system according to preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings such that those skilled in the art can easily implement the present invention. Will be explained. In the detailed description of the embodiments of the present disclosure, when it is determined that detailed descriptions of related well-known configurations or functions may obscure the gist of the present disclosure, the detailed description may be omitted.

1 is a block diagram showing the configuration of a photovoltaic power generation system of the MPPT method using PV current according to an embodiment of the present invention.

Referring to FIG. 1, an MPPT type photovoltaic power generation system using PV current according to an exemplary embodiment of the present invention includes a photovoltaic panel 10, a symmetric step-up converter 20, and an analog-to-digital (A) method. / D) converter 30, peak current controller 40, MPPT unit 50, short current (SC) compensation unit 60, reference current value control unit 70, impact coefficient control unit 80 ) And a Pulse Width Modulation (PWM) controller 90.

The photovoltaic panel 10 includes a plurality of photovoltaic cells. The photovoltaic cell corresponds to a p-n junction semiconductor device that converts light energy into electrical energy. These photovoltaic cells produce approximately 0.5 volts DC and less than 2 watts of power. As such, to provide sufficiently large power, the photovoltaic cells must be connected in series. Accordingly, the photovoltaic panel 10 includes a plurality of photovoltaic modules connected in parallel. Each of the photovoltaic modules includes a photovoltaic cell connected in series. The photovoltaic cell on the photovoltaic panel 10 may be represented as an equivalent circuit shown in FIG. 2.

In Fig. 2, the current source Iph is the photocurrent of the photovoltaic cell generated by photovoltaic conversion. The first resistor Rj corresponds to the nonlinear impedance of the junction. The second resistor Rsh is a shunt resistor, and the third and fourth resistors Rs and Ro are series intrinsic resistance of the cell. Typically, the value of the second resistor Rsh is very large while the value of the third resistor Rs is very small. As such, the third resistor Rs can be ignored for simplicity of analysis. Therefore, the output current of the photovoltaic panel 10 may be calculated as in Equation 1.

[Equation 1]

I _pv = n _p I _ph -n _s I _rs [exp (qVpv / kTA) -1]

In Equation 1, "I _pv " is an output current A of a photovoltaic cell, and "V _pv " is an output voltage of a photovoltaic cell. n _s is the number of photovoltaic cells connected in series and n _p is the number of photovoltaic modules connected in parallel. "q" is the charge amount of one electron of 1.0 x 10 ^-19 (C), and "k" is Boltzmann's constant of 1.38 x 10 ^-23 (eV / K). "A" is the pn junction manufacturing constant, "T" is the temperature (K) of the photovoltaic cell, and "Irs" is the reverse saturation current of the photovoltaic cell. Manufacturing constant "A" included in Equation 1 may determine the deviation between the photovoltaic cells according to the ideal bonding characteristics. The reverse saturation current Irs of the photovoltaic cell varies with temperature and can be calculated by Equation 2.

&Quot; (2) "

I _rs = I _rr (T / T _r ) ³ exp [(qE _G / kA) (1 / T _r -1 / T)]

In Equation 2, "Tr" is the reference temperature of the photovoltaic cell, "Irr" is the reverse saturation current according to Tr, and "EG" is the semiconductor bandgap energy used for the photovoltaic cell. The photocurrent Iph of the photovoltaic cell varies depending on the solar radiation level and the temperature of the photovoltaic cell, and can be calculated as shown in Equation 3 below.

&Quot; (3) "

I _ph = [I _scr + k _i (TT _r )] (S / 1000)

In Equation 3, "Iscr" is a short-circuit current of the photovoltaic cell according to the reference temperature and the solar radiation amount, "ki" is a short-circuit current temperature coefficient, and "S" is an insolation level whose unit is W / m ² .

Through the above equation, the output characteristic of the photovoltaic panel 10 can be calculated from the term of the corresponding parameter. 3 and 4 illustrate the output characteristics of the photovoltaic panel 10 calculated by applying the following parameters under various solar radiation levels and temperature conditions using PSIM software.

I _ph = 16.18 A, I _rr = 3.94 × 10 ^-8 A, A = 1.2, E _G = 1.12 eV, n _p = 2, n _s = 1080,

P _max = 8600W, V _max = 534.45V, I _max = 16.46A, V _OC = 664V, I _SC = 17.56A

3A and 3B are data sheets describing the terminal voltage characteristics for the output current and the output power of the photovoltaic panel 10 when the temperature is 25 ° and the solar radiation amount is 200 to 1000 W / m ² , FIGS. 4A and FIG. 4b are data sheets describing the terminal voltage characteristics of the output current and the output power of the photovoltaic panel 10 when the temperature is 60 ° and the solar radiation is 200 to 1000 W / m ² .

In FIGS. 3A and 4A, the first curve ipv_01.10 is a voltage characteristic with respect to current when the solar radiation amount is 1000 W / m ² , and the second curve ipv_02.10 is an 800 W / m ² radiation amount. Is the voltage characteristic with respect to the current when the third curve (ipv_03.10) is the voltage characteristic with respect to the current when the solar radiation is 600 W / m ² , the fourth curve (ipv_04.10) has a 400 W / solar radiation The voltage characteristic with respect to the current when m ² , and the fifth curve ipv_05.10 is the voltage characteristic with respect to the current when the solar radiation is 200 W / m ² . Meanwhile, in FIGS. 3B and 4B, the first curve P_01.10 is a voltage characteristic with respect to power when the solar radiation amount is 1000 W / m ² , and the second curve P_02.10 is 800 W / ray radiation amount. Voltage characteristic for power at m ² , third curve P_03.10 is voltage characteristic for power when solar radiation is 600 W / m ² , and fourth curve P_04.10 is 400 for solar radiation. The voltage characteristic with respect to the power at W / m ² and the fifth curve P_05.10 is the voltage characteristic with respect to the power when the solar radiation is 200 W / m ² .

As shown in Figures 3 and 4, such as other factors such as ambient temperature and solar radiation levels, wind, which alters the temperature of the photovoltaic panel 10 to affect the output characteristics of the photovoltaic panel 10. It is clear that the output characteristics of the photovoltaic panel 10 vary nonlinearly with various atmospheric conditions. It can be seen from the output voltage characteristic curves for the output power of the photovoltaic panel shown in FIGS. 3B and 4B that there is one unique maximum power point (MPP) under a particular atmospheric condition. The MPP varies with different solar radiation levels, temperatures and winds. Thus, in order to derive maximum power from the photovoltaic panel 10 at a given condition, the output voltage (vPV) of the photovoltaic panel 10 or The photovoltaic system must be controlled based on the output current iPV.

As can be seen from the curve of the output voltage versus the output current of the photovoltaic panel 10 shown in FIGS. 3A and 4A, the short circuit current is approximately a linear function of the solar radiation level and has a negative temperature coefficient at the open circuit voltage. can see. In other words, the variation of the solar radiation level mainly affects the short circuit current, and the change in the ambient temperature of the photovoltaic panel 10 mainly affects the open circuit voltage. Therefore, the photovoltaic system according to the embodiment of the present invention will allow the MPP tracking according to the change in the solar radiation amount based on the output current of the photovoltaic panel 10.

The symmetric step-up converter 20 boosts the output voltage of the photovoltaic panel 10 to a positive step-up voltage Vp and a negative step-up voltage Vm which are symmetrical to a neutral potential or a neutral point. can do. In addition, when the output voltage of the photovoltaic panel 10 is higher than the DC link voltage required by the rear circuit of the symmetric boost converter 20, the symmetric boost converter 20 stops the boost operation and instead the photovoltaic panel The output voltage of (10) can be transferred (bypassed) to the output terminal as it is. This symmetric step-up converter 20 may be configured as shown in FIG.

Referring to FIG. 5, the symmetric step-up converter 20 may include first to third capacitors C11, C12, and C13, first and second inductors L11 and L12, and first and second switch elements IG11 and IG12. ), First to fourth diodes D11 to D14, and first and second resistors R11 and R12.

The first capacitor C11 is connected between the positive output line and the negative output line of the photovoltaic panel 10. The first capacitor C11 may remove noise of a high frequency component included in an output voltage of the photovoltaic panel 10.

The first inductor L11 is connected between the positive output line of the photovoltaic panel 10 and the first node N1. The second inductor L12 is connected between the negative output line of the photovoltaic panel 10 and the second node N2. The first and second inductors L11 and L12 may suppress noise of high frequency components included in the output current of the photovoltaic panel 10.

The first diode D11 is connected between the positive output line of the photovoltaic panel 10 and the positive output terminal POT. The second diode D12 is connected to the negative output line and the negative output terminal NOT of the photovoltaic panel 10. These first and second diodes (D11, D12) is the photovoltaic panel 10, when the output voltage of the photovoltaic panel 10 is higher than the DC link voltage required by the rear circuit of the symmetric step-up converter 20. Voltages on the positive and negative output lines may be transferred to the positive and negative output terminals POT, NOT.

The third diode D13 is connected between the first node N1 and the positive output terminal POT. The third diode D13 may cause the boosted positive voltage on the first node N1 to be transferred toward the positive output terminal POT. In addition, the fourth diode D14 is connected between the second node N2 and the negative output terminal NOT. The fourth diode D14 may cause a boosted negative voltage on the second node N2 to be transferred toward the negative output terminal NOT.

The first switch element IG11 is connected between the first node N1 and the neutral potential line NPL. The first switch element IG11 repeatedly performs a switching operation, that is, a turn-on / off operation, by the first PWM control signal S11 supplied from the PWM controller 90. The boosted positive voltage is displayed on the first node N1. Similarly, the second switch element IG12 is connected between the second node N2 and the neutral potential line NPL. The second switch element IG12 repeatedly performs a switching operation, that is, a turn-on / off operation, by the second PWM control signal S12 supplied from the PWM controller 90. The boosted negative voltage appears on the second node N1. The first and second switch elements IG11 and IG12 may turn off when the output voltage of the photovoltaic panel 10 is higher than the DC link voltage required by the rear circuit of the symmetric step-up converter 20. It can be kept constant to interrupt the switching operation. In this case, the first and second PWM control signals S11 and S12 supplied from the PWM controller 90 continuously maintain a fixed logic state.

The second capacitor C12 is connected between the neutral potential line NPL and the positive output terminal POT. The third capacitor C13 is connected between the neutral potential line NPL and the negative output terminal NOT. These second and third capacitors C12 and C13 stabilize the boosted positive and negative voltages to be output through the positive and negative output terminals POT and NOT.

The first resistor R11 is connected between the neutral potential line NPL and the positive output terminal POT. The second resistor R12 is connected between the neutral potential line NPL and the negative output terminal NOT. These first and second resistors R11 and R12 may function as load resistors.

The symmetric step-up converter 20 including these two boost circuits can be used to eliminate both the input and output imbalance. In other words, the symmetric step-up converter 20 may be controlled in such a way that the maximum power point of the photovoltaic panel 10 is adjusted to adjust the imbalance of the input voltage from the photovoltaic panel 10. have. Further, for the symmetry of the positive and negative voltages, it may be controlled by a PWM control signal that is adjusted based on the boosted positive and negative output voltages. As such, the symmetric step-up converter 20 can not only allow the asymmetric photovoltaic panel and its load state to be controlled, but can also be connected to other pneumatic panels with different power and MPP characteristics from other sources. Furthermore, the symmetric step-up converter 20 may be a solution to a three-phase three-level neutral-point-clamped (NPC) inverter that may be connected to the rear stage. In addition, the non-isolated symmetric boost converter can be associated with a single phase inverter to handle a wide range of MPPs. In addition, when the input voltage is higher than the DC link voltage, the symmetric step-up converter 20 may transfer the input power to the inverter of the rear stage instead of stopping the boost operation. Accordingly, the symmetric boost converter 20 may achieve higher efficiency than the boost converter of the isolation type.

5 illustrates a current sensor Sid and first to third voltage sensors Svd1 to Svd3 not included in the symmetric step-up converter 20. The current sensor Sid is installed in the middle of the positive output line of the photovoltaic panel 10 to sense the output current ipv of the photovoltaic panel 10. The first voltage sensor Svd1 is installed between the positive and negative output lines of the photovoltaic panel 10 to sense the photovoltaic output voltage Vpv. The second voltage sensor Svd2 is installed between the positive output terminal POT and the neutral potential line NPL to detect the positive output voltage Vp of the symmetric step-up converter 20. The third voltage sensor Svd3 is installed between the negative output terminal NOT and the neutral potential line NPL to sense the negative output voltage Vm of the symmetric step-up converter 20. These current sensors Sid and the first to third voltage sensors Svd1 to Svd3 are shown in FIG. 5 for convenience to accurately indicate the components included in the A / D converter 30 or their installation positions. .

The A / D converter 30 may convert the output current ipv and the output voltage Vpv of the photovoltaic panel 10 into a digital form. In addition, the A / D converter 30 may convert the positive and negative output voltages Vp and Vm of the symmetric step-up converter 20 into a digital form. To this end, the A / D converter 30 may be configured as shown in FIG.

Referring to FIG. 6, the A / D converter 30 uses the sensing unit 32 and the first scaling unit 34A, the A / D converter 36, and the second scaling unit 34B connected in series thereto. It may include. In addition, the A / D converter 30 may further include an offset circuit 38 connected between the first scaling unit 34A and the A / D converter 36.

The detector 32 may detect an output current ipv and an output voltage Vpv of the photovoltaic panel 10. To this end, the detector 32 may include a current sensor Sid and a first voltage sensor Svd1 as shown in FIG. 5. In addition, the detector 32 may also sense the positive and negative output voltages Vp and Vm of the symmetric step-up converter 20. As such, the detector 32 may further include second and third voltage sensors Svd2 and Svd3 as shown in FIG. 5.

The first scaling unit 34A may reduce the range of possible changes in the signals detected by the sensing unit 32 to be an input range required by the A / D converter 36. For example, when an A / D converter of a digital signal processor (DSP) of TI (Texas Instruments) is used as the A / D converter 36, the first scaling unit 34A may detect the photovoltaic panel. It can be scaled down such that the variation of the output current ipv and output voltage Vpv of 10 and the positive and negative output voltages Vp and Vm of the symmetric step-up converter 20 fall within a range of 0 to 3V. have.

The offset circuit 38 may be used when necessary to ensure that the signals scaled by the first scaling unit 34A can be stably included within the input range of the A / D converter 36. This offset circuit 38 may add an off-set direct current voltage to the reduced scaled signals from the first scaling portion 34A.

The A / D converter 36 converts signals from the first scaling unit 34A or the offset circuit 38 into a digital signal form. As an example, the output current ipv and output voltage Vpv of the photovoltaic panel 10 and the positive and negative output voltages of the symmetric step-up converter 20 that are output to the A / D converter 36. Vp, Vm) may be all 12 bits of digital signals. The A / D converter 36 may use the first PWM control signal S11 from the PWM controller 90 as a sampling pulse (that is, a trip-zone signal). In addition, for peak current control, the carrier wave type may be set to a start low triangular. As such, the A / D converter 36 may extract the instantaneous sample in the turn-off period of the first switch IG11 of the symmetric step-up converter 20 in response to the first PWM control signal S11. have.

The second scaling unit 34B may scale up or down again in a form in which digital signals from the A / D converter 36 correspond to original values. The signals scaled again by the second scaling unit 34B are output current ipv1 and output voltage Vpv1 of the photovoltaic panel 10, and the positive and negative voltages Vp1, of the symmetric step-up converter 20. Vm1).

FIG. 7 is a detailed block diagram illustrating the first and second scaling units 34A and 34B in FIG. 6 in detail.

Referring to FIG. 7, the first scaler K1 scales the output current ipv of the photovoltaic panel 10 sensed by the sensing unit 32 and scales the scaled photovoltaic panel. The output current ipv of 10 is supplied to the first input port of the A / D converter 36. The second scaler K2 scales the output voltage Vpv of the photovoltaic panel 10 sensed by the sensing unit 32 and outputs the scaled output voltage of the photovoltaic panel 10. (Vpv) is supplied to the second input port of the A / D conversion section 36. The third scaler K3 scales the positive output voltage Vp of the symmetric step-up converter 20 sensed by the sensing unit 32, and scales the positive of the scaled symmetric step-up converter 20. The output voltage Vp is supplied to the third input port of the A / D converter 36. The fourth scaler K4 performs scaling on the negative output voltage Vm of the symmetric step-up converter 20 sensed by the sensing unit 32 and the negative of the scaled symmetric step-up converter 20. The output voltage Vm is supplied to the third input port of the A / D converter 36.

On the other hand, the second scaling unit 34B may include first to fourth zero-order-holders (ZOH1 to ZOH4). The first zero-order-holder ZOH1 scales the digitized output current of the photovoltaic panel 10 from the first output port of the A / D converter 36 by a zero-order-hold technique. The digital output current ipv1 of the photovoltaic panel 10 may be provided. The second zero-order-holder ZOH2 scales the digitized output voltage of the photovoltaic panel 10 from the second output port of the A / D converter 36 by a zero-order-hold technique. The digital output voltage Vpv1 of the photovoltaic panel 10 may be provided. The third zero-order-holder ZOH3 scales the digitized positive output voltage of the symmetric boost converter 20 from the third output port of the A / D converter 36 by a zero-order-hold technique. Thus, the digital positive output voltage Vp1 of the symmetric step-up converter 20 may be provided. The fourth zero-order-holder ZOH4 scales the digitized negative output voltage of the symmetric boost converter 20 from the fourth output port of the A / D converter 36 by a zero-order-hold technique. Thus, the digital negative output voltage Vm1 of the symmetric step-up converter 20 may be provided. For convenience of description, the digital output current ipv1 and the digital output voltage Vpv1 of the photovoltaic panel 10 will be referred to as the digital light output current ipv1 and the digital light output voltage Vpv1. The digital positive and negative output voltages Vp1, Vm1 of the symmetric step-up converter 20 will be referred to as digital positive and negative boost voltages Vp1, Vm1.

The impact coefficient adjusting unit 80 is based on the digital light output current ipv1 from the A / D converter 30 and the reference current irf1 from the reference current value adjusting unit 70. And an impact coefficient of the second PWM control signals S11 and S12. In addition, the impact coefficient adjusting unit 80 is based on the digital positive and negative step-up voltages Vp1 and Vm1 from the A / D converter 30 and the positive and negative output voltages Vp of the symmetric step-up converter 20. The impact coefficients of the first and second PWM control signals S11 and S12 may be corrected such that the symmetry error between and Vm is corrected.

The PWM controller 90 may generate first and second PWM control signals S11 and S12 having a pulse width corresponding to the impact coefficient set by the impact coefficient adjusting unit 80. The first and second PWM control signals S11 and S12 generated by the PWM controller 90 are connected to the first and second switches IG11 and IG12 of the symmetric step-up converter 20 shown in FIG. 5. It is supplied to the control electrode, respectively. The impact coefficient adjusting unit 80 and the PWM controller 90 may be configured as shown in FIG.

Referring to FIG. 8, the impact coefficient adjusting unit 80 may include a first subtractor 80A and a proportional integral controller (PI) controller 82.

The first subtractor 80A subtracts the reference current iref supplied from the reference current value adjusting unit 70 from the digital light output current ipv1 supplied from the A / D converter 30 to thereby make a current deviation. Can be detected. The current deviation detected by the first subtractor 80A is supplied to the PI controller 82.

The PI controller 82 adjusts (or sets) the impact coefficients of the PWM control signals S11 and S12 in the form of tracking using the current deviation from the first subtractor 80A. To this end, the PI controller 82, as shown in Figure 8, the fifth and sixth scalers (K5, K6), the first and second adders (82A, 82B) and the first delay (DD1). It may be configured in the form including a.

The fifth and sixth scalers K5 and K6 scale the current deviation from the first subtractor 80A. The scaling ratios of the fifth and sixth scalers K5 and K6 may be set differently, but are not limited thereto. The current deviation scaled by the fifth scaler K5 is supplied to one input terminal of the first adder 82A. The current deviation scaled by the sixth scaler K6 is supplied to the second adder 82B.

The first delayer DD1 delays the output of the first adder 82B for one sampling period and supplies it to the other input terminal of the first adder 82A. To this end, the first delay unit DD1 may be controlled by the first PWM control signal S11 generated by the PWM controller 90.

The first adder 82A may accumulate the output of the fifth scaler K5 by adding the output of the fifth scaler K5 and the output of the first delayer DD1. In other words, the first adder 82A together with the first delayer DD1 constitutes one digital integrator. In this way, the input and output of the digital integrator including the first adder 82A and the first delayer DD1 may be expressed by Equation 4 including a time function in a backward error method.

&Quot; (4) "

y (k) = y (k-1) + T _s × u (k)

In equation (4), "y (k)" and "u (k)" are the output and input for the current time, "y (k-1)" is the output obtained in the previous sampling period, and "Ts" Is the sampling period. The accumulated value of the current deviation generated in the first adder 82A is supplied to the other input terminal of the second adder 82B.

The second adder 82B adds an output of the sixth scaler K6 and a current deviation accumulated value from the first adder 82A to generate an impact coefficient value of the PWM control signal. The impact coefficient value Duty generated by the second adder 82B may be supplied to the PWM controller 90.

In addition, in order to correct a symmetry error between the positive and negative output voltages Vp and Vm of the symmetrical boost converter 20, the impact coefficient controller 80 may further include a symmetry corrector 84. The symmetry corrector 84 is to be supplied from the second adder 82B toward the PWM controller 90 based on the digital positive and negative boost voltages Vp1, Vm1 from the A / D converter 30. Impact coefficient value (Duty) can be corrected. To this end, the symmetry corrector 84 may include seventh and eighth scalers K7 and K8, second and third subtractors 84A and 84C, and a third adder 84B.

The seventh scalers K7 and K8 scale down the digital positive boosted voltage Vp1 supplied from the A / D converter 30. The eighth scaler K8 scales down the digital negative boosted voltage Vm1 supplied from the A / D converter 30. The scaling ratios of the seventh and eighth scalers K7 and K8 may be equally set, but the present invention is not limited thereto.

The second subtractor 84A subtracts the reduced-scaled digital positive boost voltage supplied from the seventh scaler K7 and the reduced-scaled digital negative boost voltage supplied from the eighth scaler K8. . Accordingly, the difference voltage between the digital positive and negative boost voltages Vp1 and Vm1 may be detected by the second subtractor 84A.

The third adder 84B adds the difference voltage from the second subtractor 84A to the impact coefficient value from the second adder 82B of the PI controller 82 to generate a corrected first impact coefficient value. do. This corrected first impact coefficient value is supplied from the third adder 84B to the PWM controller 90.

The third subtractor 84C subtracts the difference voltage from the second subtractor 84A from the impact coefficient value from the second adder 82B of the PI controller 82 to generate a corrected second impact coefficient value. do. This corrected second impact coefficient value is supplied from the third subtractor 84C to the PWM controller 90.

Meanwhile, the PWM controller 90 may include first and second PWM circuits 92 and 94 and first and second buffers BB1 and BB2 as shown in FIG. 8. The first PWM circuit 92 is coupled to the first impact coefficient value in response to a first impact coefficient value from the impact coefficient adjuster 80 (ie, the third adder 84B of the symmetry corrector 84). The first PWM control signal S11 having a corresponding pulse width is generated. The first buffer BB1 buffers the first PWM control signal S11 from the first PWM circuit 92 and buffers the buffered first PWM control signal S11 of the symmetric boost converter 20. It supplies to the control electrode of the 1st switch element IG11. The second PWM circuit 94 responds to the second impact coefficient value in response to a second impact coefficient value from the impact coefficient adjuster 80 (ie, the third subtractor 84C of the symmetry corrector 84). The second PWM control signal S12 having a corresponding pulse width is generated. The second buffer BB2 buffers the second PWM control signal S12 from the second PWM circuit 94 and buffers the buffered second PWM control signal S12 of the symmetric boost converter 20. It supplies to the control electrode of the 2nd switch element IG12.

The MPPT unit 50 has a fixed compensation value Δi for compensating the reference current irf based on the digital light output current ipv1 and the digital light output voltage Vpv1 from the A / D converter 30. Is generated and supplied to the reference current control unit 70. In more detail, the MPPT unit 50 multiplies the digital light output current ipv1 by the digital light output voltage Vpv1 to calculate the digital light output power Ppv (k) and calculates the calculated digital light output. The power Ppv (k) is compared with the previous digital light output power Ppv (k-1). Also, the MPPT unit 50 compares the current digital light output current ipv1 (k) with the previous digital light output current ipv1 (k-1). According to the comparison result between the current and previous digital light output power Ppv and the comparison result between the current and previous digital light output current ipv1, the MPPT unit 50 has a positive fixed compensation value (+ Δi). Alternatively, a negative fixed compensation value (−Δi) is supplied to the reference current controller 50.

For example, the current digital light output power Ppv (k) is greater than the previous digital light output power Ppv (k-1) and the current digital light output current ipv1 (k) is equal to the If the previous digital light output current ipv1 (k-1) is greater than, the MPPT unit 50 outputs a positive fixed compensation value + Δi. The digital light output power Ppv (k) is less than the previous digital light output power Ppv (k-1) and the current digital light output current ipv1 (k) is the previous digital light output current A positive fixed compensation value (+ Δi) is output even when smaller than ipv1 (k-1), whereas the current digital light output power Ppv (k) is equal to the previous digital light output power Ppv ( k-1)) and the current digital light output current ipv1 (k) is greater than the previous digital light output current ipv1 (k-1), the MPPT unit 50 is negatively fixed. Output the value (-△ i) In addition, the current digital light output power Ppv (k) is less than the previous digital light output power Ppv (k-1) and the current digital light output current ipv1 (k) is A negative fixed compensation value (-Δi) is output even when the previous digital light output current ipv1 (k-1) is larger than after generation of the fixed compensation value Δi for the reference current (iref). Update the previous digital light output power and current Ppv (k-1), ipv1 (k-1) with the current digital light output power and current Ppv (k), ipv1 (k). The fixed compensation value generating operation may be performed every cycle of the first PWM control signal.

The reference current controller 70 adjusts the reference current value by increasing or decreasing the reference voltage Vref by a magnitude proportional to the fixed compensation value Δi from the MPPT unit 50. For example, when a positive fixed compensation value (+ Δi) is input from the MPPT unit 50, the reference current controller 70 controls the reference current by a magnitude proportional to the fixed compensation value Δi. Increment the value (iref1). On the other hand, when a negative fixed compensation value (−Δi) is input from the MPPT unit 50, the reference current adjusting unit 70 is equal to the reference current value (i) in proportion to the fixed compensation value (Δi). iref1) decreases This reference current adjustment operation may be performed every cycle of the first PWM control signal.

The reference current adjusting operation by the MPPT unit 50 and the reference current adjusting unit 70 may be described as shown in the flowchart of FIG. 9. 9 corresponds to an execution flowchart of the P & O MPPT algorithm.

In the P & O algorithm, the perturbation variable may be a reference value for the output voltage Vpv of the photovoltaic panel 10, the output current ipv of the photovoltaic panel 10, or the duty cycle. As shown in FIG. 10, if the output voltage Vpv of the photovoltaic panel 10 is disturbed and " dp / di > 0 ", it is known that the operating point is to the left of the MPP. The P & O algorithm will increase the reference current for the photovoltaic panel 10 to move the operating point to the MPP. " dp / di < 0 ", knowing that the operating point is to the right of the MPP, the P & O algorithm will then reduce the reference current to the photovoltaic panel 10. If the perturbation variable is current, the perturbation in the output power Ppv of the photovoltaic panel 10 is achieved by regularly changing (increasing or decreasing) the reference current by a small value. Therefore, the determination of the perturbation direction is an important function in the perturbation and observation algorithms.

9, the output current Ipv of the photovoltaic panel 10 is used as a control variable. First, the output voltage Vpv and the output current Ipv of the photovoltaic panel 10 are sensed. The output power Ppv of the photovoltaic panel 10 is obtained by multiplying the output current Ipv and the output voltage Vpv of the photovoltaic panel. When the output power Ppv of the photovoltaic panel 10 increases with the increase of the output current ipv of the photovoltaic panel, the reference current Iref increases by one perturbation step size. Otherwise, the reference current Iref is reduced by one perturbation step size. When the output power Ppv of the photovoltaic panel 10 decreases with the increase of the output current Ipv of the photovoltaic panel, the reference current Iref decreases by one perturbation step size. Otherwise, the reference current (iref) is increased by one perturbation step size. For example, in the case where there is an output power Ppv and a current Ipv of the photovoltaic panel 10 with perturbation, Equations 5 and 6 below indicate that the perturbation is an output current of the photovoltaic panel 10. This reduces the Ipv and leads to increasing the output power Ppv of the photovoltaic panel 10. It can be determined as in the flowchart of FIG. 9 that the next perturbation direction is to reduce the reference current Iref.

[Equation 5]

Ppv (k)> Ppv (k-1)

&Quot; (6) &quot;

Ipv (k) <Ipv (k-1)

In equations (5) and (6), the parameters "k-1" and "k" indicate the corresponding measured amounts before and after perturbation, respectively.

In the P & O algorithm, if power increases, the perturbation will continue in the same direction in the next period, otherwise the perturbation direction will reverse. With the above continuous processing, the operating point of the photovoltaic panel 10 can be moved to the maximum output point corresponding to the different temperature and solar radiation amount.

The MPPT unit 50 and the reference current control unit 70 execute the MPPT algorithm with the proposed "instantaneous sampling" method. A set of specimens including the digital light output current ipv1 and the digital light output power Ppv is sensed and processed in each switching period of the first switch element IG11 of the symmetric step-up converter 20. Accordingly, the reference current iref is revised according to the perturbation direction output in each switching period of the first switch element IG11. If the perturbation variable is current, perturbation in the digital optical output power Ppv is achieved by changing (increasing or decreasing) the reference current (iref) by a small value at regular intervals. Therefore, the determination of the perturbation direction is an important function in the perturbation and observation algorithms.

The SC compensator 60 may be added to solve a problem that the time to become a steady state becomes very long until several seconds when the solar radiation value drops sharply. When the output current ipv of the photovoltaic panel 10 becomes equal to or greater than the short circuit current Isc, the characteristic of the photovoltaic panel in which the output voltage Vpv of the photovoltaic panel 10 becomes zero is used. When the output voltage Vpv of the photovoltaic panel 10 is zero, the reference current iref should always be reduced. However, in practical implementation, even if the output end of the photovoltaic panel 10 is shorted, the output voltage Vpv of the photovoltaic panel 10 cannot be zero because of the line resistance. Therefore, the reference voltage Vref is set in the SC compensator 60. As such, the short-circuit current compensator 60 performs a photovoltaic panel 10 if the digital light output voltage Vpv1 from the A / D converter 30 is smaller than a preset reference voltage Vref value. ) Output current ipv has a value equal to or close to the short-circuit current Isc of the photovoltaic panel 10 and forces the reference current iref to be reduced. In other words, when the output voltage Vpv of the photovoltaic panel 10 is less than the voltage Vmpp at MPP, the operating point is on the right side of the MPP of the current curve for power, so Should be lowered. In this regard, the reference voltage Vref provided to the SC compensator 60 is set lower than the voltage Vmpp at MPP.

The MPPT unit 50, the SC compensator 60, and the reference current adjuster 70 may be configured as shown in FIG. 11.

The MPPT unit 50 inputs the digital light output current ipv1 and the digital light output voltage Vpv1 from the A / D converter 30 and also receives an operation control signal SW1 from the peak current controller 40. Enter it. The MPPT unit 50 may generate a reference current based on the digital light output voltage Vpv1 and the digital light output current ipv1 while the operation control signal SW1 maintains a specific value (or a specific logic state). An operation of generating a fixed compensation value Δi for compensating iref) is performed.

The SC compensator 60 may include a first comparator COM1, a ninth scaler K9, and an inversion buffer INB.

The first comparator COM1 receives an inverting terminal (−) for inputting the digital light output voltage Vpv1 and a non-inverting terminal (+) for inputting the reference voltage Vref from the A / D converter 30. Equipped. The first comparator COM1 compares the digital light output voltage Vpv1 with the reference voltage Vref, and values of "0" and "1", for example, high logic and low logic, according to the comparison result. Output one of, For example, when the digital light output voltage Vpv1 is lower than the reference voltage Vref, the first comparator COM1 may output an output current ipv of the photovoltaic panel 10 to the photovoltaic panel. A high logic comparison signal indicating equal to or close to the short circuit current Isc of 10) is supplied to the ninth scaler K9 and the inversion buffer INB. On the contrary, when the digital light output voltage Vpv1 is higher than the reference voltage Vref, the first comparator COM1 has the output current ipv of the photovoltaic panel 10 of the photovoltaic panel 10. A low logic comparison signal indicating a steady state with a short short circuit Isc is supplied to the ninth scaler K9 and the inversion buffer INB.

The inversion buffer INB inverts the comparison signal from the first comparator COM1. The output signal of the inversion buffer INB may be supplied to the peak current controller 40 as a locking signal lock1. When the locking signal lock1 has a low logic, the operation of generating the fixed compensation value Δi of the MPPT unit 50 may be stopped.

The ninth scaler K9 may be selectively operated by the comparison signal of the first comparator COM1 to supply a preset scaling value to the reference current controller 70 as a short circuit current compensation value. For example, when the comparison signal of the first comparator COM1 maintains low logic, the ninth scaler K9 generates a value of "0" so that the short-circuit current compensation value is the reference current control unit 70. ) Is not supplied. In contrast, when the comparison signal of the first comparator COM1 maintains high logic, the ninth scaler K9 generates a preset scaling value so that the short-circuit current compensation value is transmitted to the reference current controller 70. To be supplied. In other words, the SC compensator 60 may output the short-circuit current compensation value in a form complementary to the fixed compensation value of the MPPT unit 50.

The SC compensator 60 configured as described above is configured such that when the digital light output voltage Vpv1 is greater than the reference voltage Vref, that is, an operating point is on the right side of the MPP, that is, the photovoltaic panel 10. If it means that the output current of (ipv) is far from the short-circuit current (Isc) (less than) of the photovoltaic panel 10, outputs "0". The final perturbation direction is essentially the same as the perturbation direction. In this situation, the SC compensator 60 has no influence on the MPPT unit 50. On the contrary, when the digital light output voltage Vpv1 is smaller than the reference voltage Vref, that is, that the driving point is on the right side of the MPP, the SC compensator 60 sets a preset scaling value (eg, For example, " 2 " is output as a short circuit current compensation value. Since there are only three possible values in the perturbation direction, 1, 0, -1, the last perturbation direction outputs -1 means that it always decreases, regardless of the original perturbation direction.

The reference current controller 70 may include a fourth adder 70A, a tenth scaler 70B, a fourth subtractor 70C, and a second delay unit DD2. In addition, the reference current controller 70 may further include a selector 72.

The fourth adder 70A adds the fixed compensation value DELTA i from the MPPT unit 50 and the short-circuit current compensation value from the ninth scaler K9 of the SC compensator 60. Since the fixed compensation value Δi and the short-circuit current compensation value are substantially complementary to each other, the fourth subtractor 70A increases or decreases the reference current Iref by the fixed value. The short-circuit current compensation value can be used to reduce the reference current while it is used to adjust.

The tenth scaler 70B inputs the output of the fourth subtractor 70A (that is, the fixed compensation value Δi or the short circuit current compensation value) and the preset scaling ratio del. The tenth scaler 70B adjusts the output of the fourth subtractor 70A to the scaling ratio del. The scaling ratio del may be adjusted according to design specifications.

The fifth subtractor 70C inputs a previous reference voltage Vref from the second delayer DD2 and fixes the output of the tenth scaler 70B (ie, the scaling ratio del). Value or short-circuit current compensation value). The fifth subtractor 70C subtracts the output of the tenth scaler 70B from the previous reference current iref so that the reference current iref1 is increased or decreased. The reference current iref1 generated in the fifth subtractor 70C is supplied to the first subtractor 80A in the impact coefficient adjusting unit 80.

The second delay unit DD2 may be connected between an input terminal and an output terminal of one side of the fourth subtractor 70C. The second retarder DD2 switches the reference current iref1 from the output terminal of the fourth subtractor 70C to the first and second switch elements IG11 and IG12 of the symmetric step-up converter 20. Delaying by the period can be supplied to the fourth subtractor 70C as the previous reference current (iref1 (k-1)).

When the solar radiation value drops sharply, the reference current iref cannot follow the decrease of the output current ipv of the photovoltaic panel 10, so that the time to reach a steady state is long. To change this situation, the selector 72 may be added to the reference current controller 70. When the difference between the reference current (iref) of the photovoltaic panel 10 and its output current (ipv) is greater than the preset reference current difference value, the selector 72 is supplied to the fourth subtractor 70C The previous reference current iref1 (k-1) can be replaced by the digital light output current ipv1. The reference current difference value The difference between the reference current (iref) and the output current (ipv) of the photovoltaic panel 10 should not exceed the maximum possible current increase or decrease in each perturbation period.

In order to perform the above operation, the selector 72 may be connected between the output terminal of the fourth subtractor 70C and the second delay unit DD2. In addition, the selector 72 may input the digital light output current ipv1 and the digital light output voltage Vpv1 from the A / D converter 30. The selector 72 detects a difference between the digital light output voltage Vpv1 and the reference voltage Vref and determines whether the difference corresponds to the reference current difference or more. Based on the determination result, the selector 72 selects the digital light output current ipv1 from the A / D converter 30 and the reference current irf1 from the output terminal of the fourth subtractor 70C. One is supplied to the second retarder DD2.

The peak current controller 40 controls the operation of the MPPT unit 50. To this end, the peak current controller 40 may use the digital light output current ipv1 from the A / D converter 30 and the reference current irf1 from the reference current controller 70. For example, when the digital light output current ipv1 is greater than the reference current irf1, the peak current controller 40 supplies the high logic operation control signal SW1 to the MPPT unit 50. The MPPT unit 50 performs a fixed compensation value Δi output operation. On the contrary, when the digital light output current ipv1 is smaller than the reference current irf1, the peak current controller 40 supplies the low logic operation control signal SW1 to the MPPT unit 50 so as to provide the MPPT unit 50. The MPPT unit 50 causes the fixed compensation value? I to stop outputting.

In addition, the peak current controller 40 compensates the MPPT unit 500 for the MPPT unit 500 within the constant impact coefficient range of the MPPT unit 50 based on the impact coefficient from the impact coefficient adjusting unit 80. Value output operation can be controlled. To this end, the peak current controller 40 compares the impact coefficient Duty of the impact coefficient controller 80 with the first and second reference impact coefficients Dref1 and Dref2, that is, the lower limit and the upper limit impact coefficient. If the impact coefficient Duty of the impact coefficient adjusting unit 80 has a value between the first and second reference impact coefficients Dref1 and Dref2, the peak current controller 40 operates in a high logic manner. The control signal SW1 is supplied to the MPPT unit 50 so that the MPPT unit 50 performs a fixed compensation value Δi output operation. On the contrary, when the impact coefficient Duty of the impact coefficient adjusting unit 80 is smaller than the first reference impact coefficient Dref1 or larger than the second reference impact coefficient Dref2, the peak current controller 40 may be used. Supplies the low logic operation control signal SW1 to the MPPT unit 50 so that the MPPT unit 50 stops outputting the fixed compensation value Δi.

Furthermore, the peak current controller 40 may control a fixed compensation value output operation of the MPPT unit 50 based on the locking signal lock1 from the SC compensator 60. When the low logic locking signal lock1 indicating that the SC compensator 60 is outputting the short-circuit current compensation value is input, the peak current controller 40 performs the low logic operation control signal SW1. Is supplied to the MPPT unit 50 so that the MPPT unit 50 stops outputting the fixed compensation value Δi. On the contrary, when the high logic locking signal lock1 indicating that the SC compensator 60 is not outputting the short-circuit current compensation value is input, the peak current controller 40 is the high logic operation control signal. (SW1) is supplied to the MPPT unit 50 to cause the MPPT unit 50 to perform a fixed compensation value (Δi) output operation.

This peak current controller 40 may be configured as shown in FIG. As shown in FIG. 12, the peak current controller 40 includes the second to fourth comparators COM2 to COM4, the third to eighth delayers DD3 to DD8, the first and second AND gates AND1, AND2) and OR gate OR1.

The second comparator COM2 receives a first reference shock coefficient Dref1 supplied to the inverting terminal by adjusting the adjusted impact coefficient Duty from the shock coefficient adjusting unit 80 that is input via the third retarder DD3. ). In the initial state, the adjusted impact coefficient is smaller than the first reference impact coefficient Dref1 corresponding to the lower limit impact coefficient and becomes larger than the first reference impact coefficient Dref1 as time passes. As such, the second comparator COM2 supplies a high logic pulse to the OR gate OR1 at the beginning of driving of the system to set the operation control signal SW1 output from the OR gate OR1 to a high logic state. do. Accordingly, the MPPT unit 50 performs a fixed compensation value output operation. The third retarder DD3 receives the adjusted impact coefficient Duty to be supplied from the impact coefficient adjusting unit 80 to the non-inverting terminal of the second comparator COM2 of the PWM control signals S11 and S12. Delay for a period of time.

The sixth delay unit DD6 delays the operation control signal SW1 from the output terminal of the OR gate OR1 for a period corresponding to the period of the PWM control signals S11 and S12, and delays the delayed signal. Supply to the second AND gate AND2. In addition, the output signal of the second AND gate AND2 is supplied to the OR gate OR1. Accordingly, the operation control signal SW1 on the output terminal of the OR gate OR1 may maintain the high logic state set by the pulse from the second comparator COM2 at the initial stage of driving of the system.

The third comparator COM3 inputs the digital light output signal ipv1 from the A / D converter 30 to the non-inverting terminal via the fourth delayer DD4 and the reference current adjusting unit ( The adjusted reference current Iref1 from 70 is input to the inverting terminal via the fifth delay unit DD5. The third comparator COM3 supplies a high logic comparison signal to the second AND gate AND2 until the digital light output current ipv1 becomes equal to the regulated reference current Iref1. In addition, when the digital light output current ipv1 is smaller than the regulated reference current Iref1, the third comparator COM3 supplies a low logic comparison signal to the second AND gate AND2 to supply the second AND gate. The output signal of the gate AND2 and the operation control signal SW1 on the output terminal of the OR gate OR1 are reset to a low logic state. Accordingly, the MPPT unit 50 stops outputting the fixed compensation value by the low logic operation control signal SW1. The fourth retarder DD4 corresponds to the period of the PWM control signal to supply the digital optical output current ipv1 to be supplied from the A / D converter 30 to the non-inverting terminal of the third comparator COM3. Delay for a period. Similarly, the fourth retarder DD5 receives the regulated reference current Iref1 to be supplied from the reference current controller 70 to the inverting stage of the third comparator COM3. Delay for a period corresponding to the period of.

The fourth comparator COM4 supplies a second reference shock coefficient Dref2 supplied to the inverting terminal by adjusting the adjusted impact coefficient Duty from the impact coefficient adjusting unit 80 input through the eighth retarder DD8. ). When the adjusted impact coefficient is greater than the first reference impact coefficient Dref1 corresponding to the upper limit impact coefficient, the fourth comparator COM4 receives the low logic comparison signal from the first AND gate AND1. ) To cause the output signal of the first AND gate AND1 to be reset to a low logic state. Accordingly, the output signal of the second AND gate AND2 and the operation control signal SW1 on the output terminal of the OR gate OR1 are sequentially reset to the low logic state. Accordingly, the MPPT unit 50 stops outputting the fixed compensation value by the operation control signal SW1 of the row logic. The eighth delay unit DD8 supplies the adjusted impact coefficient Duty to be supplied from the impact coefficient adjusting unit 80 to the inverting terminal of the fourth comparator COM2 of the PWM control signals S11 and S12. Delay for as long as possible.

The first AND gate AND1 may input the locking signal lock1 from the SC compensator 60 through the seventh delay DD7. When the locking signal lock1 has a low logic, that is, when the SC compensator 60 outputs a short-circuit current compensation value, the first AND gate AND1 outputs a low logic output signal to the second AND gate ( AND2). As such, the output signal of the second AND gate AND2 and the operation control signal SW1 on the output terminal of the OR gate OR1 are also sequentially reset to the low logic state. Accordingly, the MPPT unit 50 stops outputting the fixed compensation value by the operation control signal SW1 of the row logic. The seventh delay unit DD8 supplies the locking signal lock1 to be supplied from the SC compensator 60 to the first AND gate AND1 for the period of the PWM control signals S11 and S12. Delay. The operation control signal SW1 reset to the low logic state is hardly set to the high logic state before the system is re-driven, but is not limited thereto.

If the solar radiation value drops sharply, the drive pulse flow rate is always maximum during that period. This is because the reference current Iref decreases slowly, and the drive pulse must be operated below the second reference impact coefficient Dref2 corresponding to the upper limit impact coefficient in order to slowly reduce the output current ipv of the photovoltaic panel 10. . Indeed, during this period, since the output current ipv of the photovoltaic panel 10 is greater than or close to the new short circuit current Isc (new), that is, the output voltage Vpv of the photovoltaic panel 10 is preliminary. Since it can be learned from the fact that it is less than the set reference voltage (Vref), it is desired that the drive pulse be operated at the minimum current flow rate to rapidly reduce. Therefore, when the output voltage Vpv of the photovoltaic panel 10 is smaller than the preset reference voltage Vref, the locking signal lock1 is generated in the SC compensator 60 which is set to “0” to generate the first end. It is input to the gate AND1.

P & O algorithms are used in most solar power systems because they are simple and easy to implement. However, there are problems such as following the MPP in the wrong direction, slow response speed, and vibration around the MPP under conditions where the air condition changes rapidly. However, the photovoltaic system according to an embodiment of the present invention reduces this drawback by instant sampling and peak current control. Instant sampling can reduce the drawbacks of the P & O algorithm. With only one instantaneous sampling per switching period, the perturbation period is very small because it equals the switching period of the MPPT converter. This leads to a faster tracking and response speed of the MPPT system, reducing the drawbacks of the traditional P & O MPPT algorithm, which leads to the wrong direction under rapidly changing atmospheric conditions.

FIG. 13A is a data sheet illustrating the characteristics of the output voltage Vpv of the photovoltaic panel according to the time obtained through simulation when the amount of insolation changes suddenly, and FIG. 13B is the time according to the time obtained through the simulation when the amount of insolation changes rapidly. Data sheet explaining the characteristics of the output current (ipv) and the reference current (Iref) of the photovoltaic panel, Figure 13c shows the output power (Ppv) of the photovoltaic panel according to the time obtained through the simulation when the solar radiation is suddenly changed Data sheet describing the characteristics.

In Figs. 13A to 13C, it is understood that the startup time is very short, even in view of the time for charging the output capacitor, from 5 to 0 MPP. It is also apparent that when t = 50 ms, the output current ipv of the photovoltaic panel 10 decreases from 16 A to 11.5 A, it has a response speed of about 1 ms.

FIG. 14A is a data sheet illustrating the characteristics of the output current ipv with respect to the output voltage Vpv of the photovoltaic panel obtained by the simulation when the solar radiation changes rapidly, and FIG. 14B is the simulation sheet when the solar radiation changes rapidly. It is a data sheet explaining the characteristic of the output current ipv with respect to the output power Ppv of the obtained photovoltaic panel.

As can be seen in Figs. 14A and 14B, it is clear that the MPPT response following the solar radiation sudden change follows the MPP well.

FIG. 15A is a data sheet illustrating characteristics of the output voltages Vp and Vm of the symmetric step-up converter according to the time obtained through simulation when the solar radiation changes rapidly. FIG. 15B is a time obtained through simulation when the solar radiation changes rapidly. Is a data sheet explaining the characteristics of the output current (ip, im) of the symmetrical boost converter according to the present invention, and FIG. 15C shows the characteristics of the output power (Pdc) of the symmetric booster converter according to time obtained through simulation when the solar radiation changes rapidly. The data sheet to explain.

As shown in FIGS. 15A to 15C, the pulsation voltage ((ΔV) is approximately 8V, the pulsation rate of the output voltage is 8V / 330V? 2.4%, and the pulsating current (ΔIp) when the solar radiation amount is 1000. It is apparent that the pulsation rate of the output current is 0.3 A, and the pulsation rate is 0.3 A / 13.2 A? 2.3%.

What has been described above is only embodiments for implementing a photovoltaic power generation system of the MPPT method according to the present invention. It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit and scope of the invention as defined in the appended claims. And should be protected to include to the extent practicable.

10; Photovoltaic panels 20; Symmetrical step-up converter
30; A / C converter 40; Peak Current Controller
50; MPPT section 60; SC compensator
70; Reference current value adjusting unit 80; Impact Factor Control
90; PWM controller

Claims (7)

Photovoltaic panels for converting light energy into electrical energy;
A symmetric step-up converter for boosting the output voltage of the photovoltaic panel;
An A / D converter for converting an output voltage and an output current of the photovoltaic panel into a digital light output voltage and a digital light output current;
Calculate a digital light output power based on the digital light output voltage and the digital light output current from the A / D converter, compare the digital light output power with a previous digital light output power, and compare the digital light output current with A maximum power point follower which performs a comparison of the previous digital light output currents and generates any one of a constant decrease and an increase compensation amount according to the comparison result;
A reference current adjusting unit which adjusts a reference current by using the compensation amount from the maximum power point following unit;
An impact coefficient controller for adjusting an impact coefficient based on the adjusted reference current from the reference current controller and a digital light output current from the A / D converter;
A peak current controller that controls the operation of the maximum power point follower based on the digital light output current from the A / D converter and the regulated reference current from the reference current adjuster; And
And a PWM controller generating a PWM control signal having a pulse width corresponding to the adjusted shock coefficient from the impact coefficient adjusting unit and controlling a switching period of the symmetric boost converter using the PWM control signal. Solar power generation system of maximum power point tracking method using PV current. 2. The maximum power point of claim 1, wherein the peak current controller further inputs the adjusted impact coefficient from the impact coefficient adjusting portion and wherein the adjusted impact coefficient has a value between a lower limit and an upper impact coefficient. Solar power discharging system of the maximum power point tracking method using PV current, characterized in that to control the follower to operate. The method of claim 1,
And a short circuit current compensator for comparing the digital light output voltage from the A / D converter with a reference voltage and selectively generating a short circuit current compensation value according to the result.
And the reference current control unit reduces the reference current by using the short circuit current compensation value from the short circuit current compensator. The solar cell system of claim 3, wherein the reference voltage is set lower than a voltage on the maximum power point. The method of claim 3, wherein
The short circuit current compensator further generates a locking signal according to a result of comparing the digital light output voltage with the reference voltage.
And the peak current controller controls the operation of the maximum power point follower based on the locking signal from the short-circuit current compensator. 4. The maximum power point of claim 3, wherein the peak current controller further inputs the adjusted impact coefficient from the impact coefficient adjusting unit and wherein the adjusted impact coefficient has a value between a lower limit and an upper impact coefficient. Solar power discharging system of the maximum power point tracking method using PV current, characterized in that to control the follower to operate. The method of claim 1,
The A / D converter further performs an operation of converting the positive and negative output voltages of the symmetric step-up converter into digital positive and negative output voltages,
The impact coefficient adjusting unit detects a symmetry error based on the digital positive and negative output voltages from the A / D converter and further adjusts the impact coefficient as much as the symmetry error. Tracking solar system.

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