KR101255176B1 - Driver for driving LED - Google Patents

Driver for driving LED Download PDF

Info

Publication number
KR101255176B1
KR101255176B1 KR1020117017785A KR20117017785A KR101255176B1 KR 101255176 B1 KR101255176 B1 KR 101255176B1 KR 1020117017785 A KR1020117017785 A KR 1020117017785A KR 20117017785 A KR20117017785 A KR 20117017785A KR 101255176 B1 KR101255176 B1 KR 101255176B1
Authority
KR
South Korea
Prior art keywords
voltage
led
channel
driving
gate
Prior art date
Application number
KR1020117017785A
Other languages
Korean (ko)
Other versions
KR20130016720A (en
Inventor
김진혁
김종선
정해양
배성호
Original Assignee
(주)실리콘인사이드
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by (주)실리콘인사이드 filed Critical (주)실리콘인사이드
Priority to PCT/KR2011/005133 priority Critical patent/WO2013008967A1/en
Publication of KR20130016720A publication Critical patent/KR20130016720A/en
Application granted granted Critical
Publication of KR101255176B1 publication Critical patent/KR101255176B1/en

Links

Images

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHTING NOT OTHERWISE PROVIDED FOR
    • H05B45/00Circuit arrangements for operating light emitting diodes [LED]
    • H05B45/40Details of LED load circuits
    • H05B45/44Details of LED load circuits with an active control inside an LED matrix
    • H05B45/46Details of LED load circuits with an active control inside an LED matrix having LEDs disposed in parallel lines
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHTING NOT OTHERWISE PROVIDED FOR
    • H05B45/00Circuit arrangements for operating light emitting diodes [LED]
    • H05B45/10Controlling the intensity of the light
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHTING NOT OTHERWISE PROVIDED FOR
    • H05B45/00Circuit arrangements for operating light emitting diodes [LED]
    • H05B45/50Circuit arrangements for operating light emitting diodes [LED] responsive to malfunctions of LEDs; responsive to LED life; Protective circuits

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a driving driver of a light emitting diode (LED), and more particularly to an LED driving driver that can be controlled by detecting only a gate end and a source end of an LED channel transistor.

Description

LED Driver Driver {Driver for driving LED}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a driving driver of a light emitting diode (LED), and relates to an LED driving driver that can be controlled even by detecting only a gate end and a source end of an LED channel transistor. That is, according to the present invention, since the LED is driven by the 2-PIN detecting method rather than the conventional 3-PIN detecting method, the number of pins allocated to one channel is reduced, so that the manufacturing cost is low and the LED can be efficiently controlled. Provide a driver.

Recently, an LED light source device composed of a plurality of LED channels or LED strings is rapidly being used for a backlight of LCD panels or various lighting applications. LEDs have high brightness overall and can be used in many applications, including backlighting of liquid crystal displays (LCDs).

For example, to supply a backlight for an LCD monitor, i) use one or more channels of white LEDs, including blue LEDs with phosphors (materials), to absorb blue light by the phosphors, Or ii) one or more individual channels of colored LEDs are placed adjacent to each other so that the light combined with each other looks like white light.

However, due to the characteristic deviation between the LED elements constituting the LED channel, that is, the forward voltage drop, the LED channels made of the same type of LEDs also exhibit electrical characteristics such as different voltage drops. Because of this feature, in order to allow the same current to flow through each of the LED channels, a controllable element or the like connected in series to each LED channel to compensate for different voltage drops is required.

That is, the driver for driving the LEDs must generate enough DC current to drive a series of LEDs, and its input voltage must be stepped up to a voltage sufficient to drive the LEDs.

According to the prior art, the operation state of the LED has been controlled by using the 3-PIN method, that is, bias information of each of the drain, gate and source of the transistor in the LED channel. However, according to such a 3-PIN method, since three pins are required for one channel, the number of pins of a chip required for a driving driver increases, thereby increasing the manufacturing cost and complicating the system.

Accordingly, there is a need for an LED driving driver having a low manufacturing cost and good efficiency of LED control even if the system is simplified by solving such a problem of the 3-PIN method.

The present invention has been made to solve the above-mentioned problems of the prior art, LED drive driver for driving the LED by the 2-PIN detection method away from the conventional 3-PIN detection method applied to the driver for driving the LED. The purpose is to provide.

In addition, the present invention is another object to provide a LED drive driver to reduce the manufacturing cost, simplifying the system by reducing the number of pins of the LED chip per channel provided in the LED drive driver.

The technical objects to be achieved by the present invention are not limited to the above-mentioned technical problems, and other technical subjects which are not mentioned can be clearly understood by those skilled in the art from the description of the present invention .

According to the LED driving driver of the present invention, the driving voltage (V LED ) is input, LED channel unit having a plurality of LED channels connected to the at least one LED (Light Emitting Diode), the field effect transistor and the channel resistance in series ; A channel irradiator connected to the field effect transistor to control a constant current to flow in each LED channel, and determine whether the LED channel is open or short; And a driving voltage V LED that is connected to a gate terminal of the field effect transistor and compares a maximum gate voltage V G_MAX and a control voltage V CTL among a plurality of gate voltages V G. Voltage; V X) is adjusted to be minimized in size and the power control channel to be supplied to the LED unit part; Including but, the channel irradiator provides an LED driving driver is connected to the gate terminal and the source terminal excluding the drain terminal of the field effect transistor.

In the present invention, the channel irradiation unit, the first OP-AMP and the output terminal is connected to the source terminal, the (-) terminal is connected to the source terminal, the (+) terminal is input to the reference voltage (V REF ) It is preferable to include a short circuit determination unit for comparing and outputting the source voltage V S and the open voltage V OPEN of the field effect transistor.

In the present invention, the channel irradiator further includes an analog-to-digital converter (AD converter) for analog-to-digital conversion of the gate voltage (V G ) value of each of the LED channel and stored in a predetermined registry.

In the present invention, the power control unit, the gate voltage input terminal for receiving the gate voltage (V G ) of the plurality of LED channels to filter the maximum gate voltage (V G_MAX ); A control voltage input terminal to which a control voltage V CTL is input; GM-AMP comparing the maximum gate voltage (V G_MAX ) and the control voltage (V CTL ) to generate and output a current difference between the voltages; An inversion unit for inverting the output of the GM-AMP using the headroom voltage V X ; And a DC-DC converter that generates an optimized driving voltage (V LED.OPT ) by controlling a feedback loop using the output of the inverting unit.

In the present invention, it is preferable that the gate voltages V G and the control voltage V CTL are voltage-dropped by a diode and input to the GM-AMP.

In the present invention, the optimized driving voltage (V LED.OPT ) is preferably a voltage of which the headroom voltage of the LED channel is minimized in order to maximize power efficiency while all LED channels operate in a saturated state.

In the present invention, the adjustment of the headroom voltage (Headroom Voltage), after setting the level of the gate voltage (V G ) when the field effect transistor is operating in a saturation region in advance to determine the control voltage (V CTL ), It is preferable to adjust the magnitude of the driving voltage V LED by comparing the maximum gate voltage V G_MAX with the control voltage V CTL .

In the present invention, the field effect transistor is preferably an NMOS transistor.

In the present invention, whether the LED channel is opened at the start of driving (strat-up), the driving voltage (V LED ) increases linearly to a voltage at which all the LED channels can enter a saturation state. It is desirable to determine that the LED channel with no response even after the time t MAX elapses to open is open.

In the present invention, whether or not the LED channel is opened during normal operation increases linearly the driving voltage (V LED ) to a voltage at which all the LED channels can enter a saturation state. after the time taken (t MAX) last, it is preferable that it is determined that the source voltage (V S) by said irradiation unit is an open channel is detected as a voltage lower than an open voltage (V oPEN).

In the present invention, whether the LED channel is shorted at the start of driving (star-up) is determined using the following equation,

Figure 112011058685187-pct00001

When the driving voltage V LED is linearly increased, it is preferable to calculate the LED channel that saturates before the t TOT as short-circuit by calculating the inverse of the latest saturated channel.

Where V MAX.VAR is the difference between the maximum drain voltage (V D.MAX ) and the minimum drain voltage (V D.MIN ) of the LED channel in a steady state, and t R is the channel voltage increased by X · V REF . Is the time taken for the V REF to be a reference voltage, X is a constant, and t TOT is the time taken for the channel voltage to rise by V MAX.VAR .)

In the present invention, whether or not the LED channel is shorted during a normal operation, the driving voltage (V LED.OPT ) optimized through headroom voltage control during a calibration period . Is increased by a predetermined value and the gate voltage (V G ) of each channel is converted to analog-digital and stored in the registry, and then the optimized driving voltage (V LED.OPT ) is decreased by the predetermined value in the normal operation section. the gate voltage (V G) after collecting the value, the gate voltage is collected in the normal operation period (V G) if the value is less than the calibration (calibration) gate voltage (V G) are stored in the interval value paragraph (short) It is preferable to determine that it is.

Wherein a difference between the predetermined value, a difference between the drain voltage to be permitted when all the LED channel is saturated, each LED channel the maximum value of the drain voltage (V D.MAX) and the minimum drain voltage (V D.MIN) of ( V MAX.VAR ).

Gate voltage (V G) values in the calibration region a gate voltage (V G) value or a normal operation time period in the present invention, is periodically collected and it is desirable to determine whether short circuit (short).

According to the LED drive driver according to the present invention, there is an effect of driving and controlling the LED by the 2-PIN detection method, away from the conventional 3-PIN detection method applied to the driver for driving the LED.

In addition, according to the present invention, by reducing the number of pins of the LED chip required for each channel provided in the LED driver, it is possible to reduce the manufacturing cost of the LED driver and simplify the system.

However, according to the present invention, even if the system is simplified by the 2-PIN detecting method, there is an effect of providing an LED driver that ensures efficiency that is not comparable to the 3-PIN detecting method.

1 is an illustration of an LED drive driver according to the prior art.
Figure 2 is an exemplary view of an LED drive driver according to an embodiment of the present invention.
3 is a graph showing a relationship between a gate voltage and a drain voltage according to an embodiment of the present invention.
4 to 5 is a configuration diagram of the LED drive driver according to an embodiment of the present invention.
6 is a configuration diagram of an LED channel according to an embodiment of the present invention.
7 is a configuration diagram of a power control unit according to an embodiment of the present invention.
8 is a graph showing a relationship between a control voltage and a drain voltage according to an embodiment of the present invention.
9 is a graph illustrating a relationship between a driving voltage and a source voltage at the start of driving an LED channel according to an embodiment of the present invention.
10 is an exemplary view of an LED channel unit including an open LED channel according to an embodiment of the present invention.
11 is a graph showing a relationship between a driving voltage and a source voltage for each channel when one channel is opened at the start of driving the LED channel according to an embodiment of the present invention.
12 is an exemplary view of a channel irradiation unit according to an embodiment of the present invention.
Figure 13 is an exemplary view of an LED channel unit including a shorted LED channel according to an embodiment of the present invention.
14 is a graph showing a relationship between a driving voltage and a source voltage for each channel when one channel is shorted at the start of driving the LED channel according to an embodiment of the present invention.
15 is a graph illustrating a short circuit determination reference voltage obtained during a calibration period and a gate voltage obtained during a normal period according to an embodiment of the present invention.
FIG. 16 is a graph illustrating a change in an optimized driving voltage according to a driving start section, a calibration section, and a normal operation section of an LED channel according to an embodiment of the present invention. FIG.
Figure 17 is an exemplary view showing the front end of the inverting portion provided with a power control unit according to an embodiment of the present invention.

DETAILED DESCRIPTION OF THE INVENTION

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. Prior to this, terms or words used in the specification and claims should not be construed as having a conventional or dictionary meaning, and the inventors should properly explain the concept of terms in order to best explain their own invention. Based on the principle that can be defined, it should be interpreted as meaning and concept corresponding to the technical idea of the present invention. Therefore, the embodiments described in the specification and the drawings shown in the drawings are only one of the most preferred embodiments of the present invention and do not represent all of the technical idea of the present invention, various modifications that can be replaced at the time of the present application It should be understood that there may be equivalents and variations.

1 is an exemplary view of a LED driving driver according to the prior art.

Conventional LED drivers generally use a 3-PIN detection scheme that controls the LEDs outside the driver using all of the information of the drain 150, gate 160 and source 170 of the transistor of the LED channel.

For example, all the LED of the drain voltage (V D) of the channels of the low drain voltage (V D) transistor keeps higher than the voltage to operate in a saturation region was adjusted to the driving voltage (V LED), the drain voltage (V According to the height of D ), the LED channel was opened or shorted.

That is, according to the prior art, all the information of the drain (D), the gate (G), the source (S) of the transistor of the LED channel was needed, and therefore, the number of pins of the chip allocated to the driver was required, The configuration of the driver as described above has a problem that the system becomes complicated and the number of drivers that can be formed by one chip decreases, thereby significantly increasing the manufacturing cost.

2 is an exemplary view of a LED driving driver according to an embodiment of the present invention.

Therefore, in the present invention, since the main point is to reduce the number of pins of the chip allocated to the driver, headroom voltage control is performed using only the information of the gate G and the source S, and the LED channel is opened. Or it is configured to be able to determine whether short (short).

That is, according to the present invention, since the drain voltage V D is not directly obtained, the voltage V S of the source terminal 170 may be set to the reference voltage V using the virtual short property of the OP-AMP. REF ). In addition, a structure in which the change in the drain voltage V D is inferred and judged using the change in the gate voltage V G is obtained.

3 is a graph illustrating a relationship between a gate voltage and a drain voltage according to an embodiment of the present invention.

In the case of the 2-pin detecting LED driving driver according to the present invention, the gate voltage V G is changed and the state of the drain voltage V D is inferred using the change.

For example, the distribution of the LED or the distribution of the transistor is represented by a change in the drain voltage (V D ). As described above, since the magnitude of the current flowing through the channel is constant, a change in the gate voltage (V G ) is used. The drain voltage V D may be inferred.

4 to 5 is a configuration diagram of the LED driving driver according to an embodiment of the present invention.

LED driving driver of the present invention, the driving voltage (V LED ) is input, LED channel unit 100 having a plurality of LED channels connected to the at least one diode, the field effect transistor and the channel resistance in series, the electric field It is connected to the effect transistor to control the constant current flow through each LED channel, and is connected to the channel irradiation unit 200 and the gate terminal of the field effect transistor to determine whether the LED channel open or short (short). In addition, the driving voltage (V LED ) may be compared with the maximum gate voltage (V G_MAX ) and the control voltage (V CTL ) among the plurality of gate voltages (V G ) to minimize the headroom voltage (V X ). It may be configured to include a power control unit 300 to adjust the supply to the LED channel unit.

In addition, the present invention employs a 2-PIN detecting method, the channel irradiator 200 is connected to the gate terminal and the source terminal excluding the drain terminal of the field effect transistor, LED A constant current flows through the channel, and headroom voltage control and whether each LED channel is open or short is determined.

That is, the channel irradiator includes a first OP having a positive terminal connected to a reference voltage V REF input terminal 210, a negative terminal connected to a source terminal of a transistor, and an output terminal thereof connected to a gate terminal of a transistor. An AMP 220 and a short circuit determination unit 230 for comparing and outputting the source voltage V S and the open voltage V OPEN of the field effect transistor may be provided. The short circuit determination unit 230 may be formed of a second OP-AMP to receive the source voltage V S and the open voltage V OPEN , and output a comparison value thereof.

In addition, according to the necessity of the invention, the source voltage V S at the (+) terminal of the second OP-AMP, the open voltage V OPEN at the (-) terminal, or the source voltage ( It is possible to determine whether a short circuit by inputting the open voltage (V OPEN ) to the V S ), (+) terminal.

As will be described later, the reference voltage V REF serves to determine the magnitude of the current flowing through each channel by fixing the source voltage V S by the abnormal shorting property of the first OP-AMP.

The channel irradiator 200 may further include an analog-to-digital converter (AD converter) for analog-to-digital converting a gate voltage (V G ) value of each LED channel and storing it in a predetermined registry.

The power control unit 300 receives a gate voltage V G of the plurality of LED channels and filters a maximum gate voltage V G_MAX , and a control voltage terminal to which a control voltage V CTL is input. GM-AMP 350 and headroom voltage V X 360 that compare the maximum gate voltage V G_MAX and the control voltage V CTL to generate and output the current difference; Inverter 380 for inverting the output of the GM-AMP and DC-DC converter 370 for controlling the feedback loop using the output of the inverter to generate an optimized driving voltage (V LED.OPT ) It may be configured to include).

In this case, the optimized driving voltage (V LED.OPT ) may be a voltage of which the headroom voltage of the LED channel is minimized to maximize power efficiency while all LED channels operate in a saturated state.

In addition, the gate voltages V G and the control voltage V CTL are dropped by the diodes 310 and 320 and input to the GM-AMP 350. In the present invention, the field effect transistor is an NMOS transistor. Is preferably.

6 is a configuration diagram of an LED channel according to an embodiment of the present invention.

The LED channel of the present invention is connected to the driving voltage input terminal 110, the at least one LED (light emitting diode) 120, and the field effect transistor and the channel resistance 140 are sequentially connected to the driving voltage (V LED ) in sequence. It takes a structure to become. Referring to FIG. 6, the reference voltage V REF is input to a (+) terminal, a (−) terminal is connected to the source terminal 170, and an output terminal thereof is connected to the gate terminal 160. 1 shows OP-AMP 220 together.

In this LED channels of the structure, the plurality of current (I F), that is forward of the LED current (Forward-Current) passing through the diode 120, the current passing through the channel resistance (R) (140) (I R Becomes equal to).

The current I R passing through the channel resistor R 140 is determined by the voltage V a of the node a , that is, the source terminal voltage V S and the channel resistance R. The voltage V a is equal to the reference voltage V REF due to the virtual short characteristic of the OP-AMP.

That is, the current I R penetrating through the channel resistance R 140 may be expressed by Equation 1 below.

Figure 112011058685187-pct00002

Therefore, the forward current I F of the same LED as the current I R penetrating through the channel resistance R 140 may also be expressed by Equation 2 below.

Figure 112011058685187-pct00003

Thus, the forward current (I F) of the LED will be able to because it is proportional to the reference voltage (V REF), by adjusting the reference voltage (V REF) to adjust the luminance (Brightness) of the LED.

Next, headroom voltage control will be described. Since the voltage V a of the node a (source terminal) is the same as the reference voltage V REF due to the abnormal shorting characteristic of the first OP-AMP, the voltage V a may be represented by Equation 3 below.

Figure 112011058685187-pct00004

The voltage V b of the node (drain end) is equal to the driving voltage V LED minus the number of forward voltages (V F ) of n (the number of diodes), and is represented by Equation 4 below. Can be.

Figure 112011058685187-pct00005

At this time, the condition for the NMOS transistor to operate in the saturation region is shown in Equation 5 below. That is, to be less than the drain voltage (V b) and the source voltage (V a), the saturation (saturation) the drain voltage (V DSAT) difference.

Figure 112011058685187-pct00006

In this case, when Equation 3 and Equation 4 are substituted into Equation 5, Equation 6 may be represented.

Figure 112011058685187-pct00007

In addition, the equation (6) can be summarized as shown in equation (7).

Figure 112011058685187-pct00008

That is, referring to Equation 7, if the NMOS transistor is operating in the saturation region even though the driving voltage V LED increases, the forward current I F is determined by the reference voltage V REF and the channel resistance R. As determined, the brightness of the LED does not change. However, the V DS of the NMOS transistor is increased, and this V DS is called a headroom voltage, and can be expressed as Equation 8 below.

Figure 112011058685187-pct00009

That is, the LED driving driver of the present invention adjusts the driving voltage (V LED ) so that the headroom voltage is as small as possible when the transistors of all the LED channels operate in the saturation region, and the headroom voltage control It is called (Headroom Voltage Control). This will be described later.

7 is a configuration diagram of a power control unit according to an embodiment of the present invention.

In the present invention, the power supply control unit, the gate voltage input terminal for filtering the maximum gate voltage (V G_MAX ) by receiving the gate voltage (V G ) of the plurality of LED channels, the control voltage input terminal 340 is input the control voltage (V CTL ) GM-AMP 350 that compares the maximum gate voltage V G_MAX with the control voltage V CTL and generates and outputs a difference between the voltages as a current and a voltage V X between the source and drain terminals. An inverter 360 for inverting the output of the GM-AMP and a DC-DC converter 370 for generating an optimized driving voltage (V LED.OPT ) by controlling a feedback loop using the output of the inverter. It may be configured to include.

In addition, the gate voltage input terminal preferably includes a diode 310 to filter out the maximum gate voltage V G_MAX among the gate voltages V G input from each LED channel. That is, the maximum gate voltage V G_MAX is dropped by a predetermined value (for example, 0.7 V) by the diode 310 of the gate voltage input terminal, and accordingly, the control voltage input terminal diode 320 is provided to control the voltage V CTL. ) Is inputted to GM-AMP by a voltage drop to a predetermined degree.

With respect to headroom voltage control, in the case of the conventional 3-pin detecting method, the headroom voltage can be minimized by directly monitoring the drain voltage V D of the transistor. However, in the present invention, since the 2-PIN detecting method is used, the state of the drain voltage V D of the transistor must be inferred from the gate voltage V G.

That is, first, the level of the gate voltage (V G ) when the transistor operates in a saturation region is set in advance. The control voltage (V CTL ), which is a preset level value, is selected among the gate voltages (V G ) of each LED channel. The feedback loop of the Dc-DC converter 370 is controlled in comparison with the maximum gate voltage V G_MAX , which is the highest gate voltage V G.

At this time, if the maximum gate voltage V G_MAX is smaller than the control voltage V CTL , it is determined that all the field effect transistors are operating in the saturation region.

In sum, the maximum gate voltage V G_MAX and the control voltage V CTL are input to the GM-AMP 350 so that a difference is generated and outputted as a current, and the output of the Gm-AMP is a predetermined inversion. The output is inverted by the voltage V Z. The output of the inverting unit 380 controls the feedback loop of the DC-DC converter 370 to generate the optimized driving voltage V LED_OPT and then resupply the driving voltage input terminal of each LED channel.

The inverting unit 380 has a third OP-AMP having an output of Gm-AMP input to a (+) terminal, a (-) terminal connected to an output terminal thereof, and a predetermined inversion voltage (V) at a (+) terminal. Z ) may be configured to include a fourth OP-AMP input, and may be formed such that the output of the Gm-AMP is inverted and output by appropriately disposing a resistor.

The DC-DC converter 370 adjusts a voltage fed back to the DC-DC converter 370 by the output of the inverting unit 380, thereby generating a driving voltage (V LED) generated by the DC-DC converter. Will be adjusted. That is, when the voltage fed back to the DC-DC converter 370 decreases, the DC-DC converter 370 generates a higher driving voltage V LED . On the contrary, when the voltage fed back increases, the driven output is increased. It will lower the voltage (V LED ).

8 is a graph illustrating a relationship between a control voltage and a drain voltage according to an embodiment of the present invention.

In other words, in the present invention using the 2-PIN detecting method, a structure in which the drain voltage is inferred and determined by the gate voltage is used to determine the minimum drain voltage (V D.MIN ) for the NMOS transistor to operate in the saturation region. After setting the control voltage V CTL in advance, it may be desirable to control the feedback loop of the Dc-DC converter in comparison with the maximum gate voltage V G_MAX .

9 is a graph showing a relationship between a driving voltage and a source voltage at the start of driving an LED channel according to an embodiment of the present invention.

When the channel is driven with a low driving voltage (V LED ) at the start-up of the LED channel, information is received that the headroom voltage is insufficient. Therefore, the driving voltage V LED is linearly increased to be supplied to the driving voltage input terminal.

That is, since the field effect transistor operates in the linear region when the driving voltage V LED is low, the transistor at this time has a resistance component, and when the driving voltage V LED is linearly increased, the source of the transistor is Voltage V S also increases linearly. At this time, the current of the channel determined by the channel resistance (R) and the source voltage (V S ) also increases linearly.

Therefore, when the driving voltage V LED is sufficiently increased and the field effect transistor is saturated, the source voltage V S becomes equal to the fixed reference voltage V REF in accordance with the amount of current to flow in the channel in advance. Accordingly, it is possible when the source voltage (V S) is turned the same as the reference voltage (V REF) LED channel can be determined deuleogatdago in saturation.

As can be seen in Figure 9, when the driving voltage (V LED ) is increased by nV F , where n LEDs can be turned forward (Turn-ON), that is, when the relationship of 'V LED <nV F ' is satisfied, it is off. Since the resistance value of the (OFF) LED is very large, the source voltage (V S ) of the transistor becomes '0'.

Then, when the driving voltage (V LED ) is greater than nV F , that is, when the relationship of 'V F <V LED <nV F + V Dsat + V REF ' is satisfied, the channel resistance (R) until the transistor enters a saturation state. The source voltage V S increases linearly due to the relationship between the transistor and linear transistor.

Thereafter, when the driving voltage V LED is further increased so that the source voltage V S is fixed to the reference voltage V REF and the transistor has a saturated drain voltage V Dsat capable of operating in the saturation region, That is, if the relationship of 'V F <V LED <nV F + V Dsat + V REF ' is satisfied, the channel becomes saturated and the source voltage (V S ) remains the reference voltage even if the driving voltage (V LED ) continues to increase. Is fixed to (V REF ).

That is, the reference voltage V REF is fixed to a limit for optimizing the driving voltage V LED to saturate all channels, and thus may be used as a constant current source.

10 is an exemplary view of an LED channel unit including an open LED channel according to an embodiment of the present invention.

FIG. 11 is a graph illustrating a relationship between a driving voltage and a source voltage for each channel when one channel is opened at the start of driving of an LED channel according to an exemplary embodiment of the present invention.

The LED drive driver of the present invention linearly increases the drive voltage (V LED ) to a sufficient voltage for all LED channels to enter the saturation region at the start-up of the drive. That is, when the time for increasing the driving voltage (V LED) linearly to a sufficient voltage in all the LED channel is getting into the saturation region t MAX la, after the t MAX last response (eg, a source voltage (V S) The channel without the increase of is determined to be open.

Referring to FIG. 11, while increasing the driving voltage (V LED ) during t MAX , the source voltages of one channel, three channels, and four channels increase to the reference voltage, while the source voltages of two channels (V S ) do not change. It is determined that it is open.

12 is an exemplary view of a channel irradiator according to an embodiment of the present invention.

In the present invention, the channel irradiator includes a first OP− connected to the reference voltage V REF at a positive terminal, a negative terminal connected to the source terminal 170, and an output terminal connected to the gate terminal. The AMP 220 and the short-circuit determination unit 230 comparing the source voltage V S and the open voltage V OPEN of the field effect transistor may be output.

The channel irradiator controls i) a constant current to flow through the channel by fixing the source voltage V S of the transistor to the reference voltage V REF , and ii) controlling the LED channel through the short circuit determination unit 230. investigate the opening and, iii) by using a short-circuit whether research and iv) a source voltage (V S) of the transistor during normal operation via the AD converter and performs a function to check whether the short circuit at the start of driving.

In one embodiment of the present invention, the short circuit determination unit 230 is a source voltage (V S ) of the field effect transistor (FET) is input to the (+) terminal, open voltage (V OPEN ) to the (-) terminal This may be configured as the input 2OP-AMP. On the contrary, the source voltage V S of the field effect transistor FET is input to the negative terminal and the open voltage V OPEN is input to the positive terminal.

By using the channel irradiator, it is possible to detect whether the LED channel is open in the normal operation. When the LED channel is opened in the normal operation, the source voltage V S is the gate voltage V G. ) so down to ground level, regardless of, upon detecting a source voltage (V S) by using the first OP-AMP 2, it will be able to determine whether the open (open).

FIG. 13 is an exemplary view of an LED channel unit including a shorted LED channel according to an embodiment of the present invention, and FIG. 14 is a case where one channel is shorted at the start of driving an LED channel according to an embodiment of the present invention. Is a graph showing the relationship between driving voltage and source voltage for each channel.

As shown in FIG. 13, when one LED channel is shorted, the drain voltage V D2 of the shorted channel is smaller than the drain voltages V D1 , V D3 and V D4 of another channel (eg, 2.5 V). Will rise by.

In this case, V MAX.VAR for determining whether or not a short circuit for each channel is defined by Equation 9 below, where V MAX.VAR is a difference between drain voltages allowed when all LED channels are saturated, in other words, It may be defined as the difference between the maximum drain voltage (V D.MAX ) and the minimum drain voltage (V D.MIN ) of the LED channel in a normal state.

That is, the V MAX.VAR may be referred to as the variation range of the drain voltage (V D ) that is permitted in various applications to which the LED driving driver of the present invention is applied, and V MAX.VAR from the minimum value of the drain voltage (V D.MIN ). It is determined that the LED channel having the above drain voltage V D is bad.

Figure 112011058685187-pct00010

In detail, Equation 9 is that V MAX.VAR means an allowable maximum value of the nV F difference caused by the forward voltage (V F ) of the LED when the LED is normally connected to the channel. can do. Therefore, when the drain voltage of each channel exceeds 2.0 V when the channel is normally connected, the channel having the highest drain voltage may be determined to be defective.

In addition, the X · V REF by the time it takes to rise as long as the V t MAX.VAR driving voltage (V LED) of, LED channel and defined as t R of the time required for rising TOT driving voltage (V LED) of the LED channels In this case, t TOT may be expressed as in the following equation.

Figure 112011058685187-pct00011

That is, the first driving voltage (V LED) is X · V REF for the time it takes to rise measured by using a counter as a t R, and the above equation V MAX.VAR (2.0V) and the X · V REF and t Substituting R makes t TOT easy to find. X represents a constant. For example, 0.5V REF can be substituted, and it is preferable to select from the range of 0.25V REF to 0.75V REF .

Referring to FIG. 14, as the driving voltage V LED is linearly increased in a range lower than the voltage V REF to be saturated, each LED channel is saturated.

At this time, t TOT is reversely substituted from the last saturated channel as time passes, and it is determined that a channel saturated before t TOT is shorted. That is, the short-circuit since it is possible the drain voltage of the first channel than the saturated T TOT (V D) is more than V MAX.VAR higher than the drain voltage in the saturation channels to the last (V D) is determined from the calculated channel is saturated at the end It can be judged.

In FIG. 14, it can be seen that t TOT is divided from four channels, which are the last saturated channels, to short-circuit two channels, which are previously saturated channels.

15 is a graph illustrating a short circuit determination reference voltage obtained during a calibration period and a gate voltage obtained during a normal period according to an embodiment of the present invention.

In other words, FIG. 15 illustrates a change in the gate voltage V G that can be monitored in the 2-PIN detecting method of the present invention according to the change of the drain voltage V D during the calibration period and the normal operation period.

In the present invention, a predetermined procedure is performed to determine whether the LED channel is short-circuited during normal operation. The gate voltage of each channel obtained by artificially raising the driving voltage V LED by a predetermined value during a calibration period is provided. The (V G ) values become the short-circuit determination reference voltage (V SHT ).

That is, in the present invention, the calibration artificially raises the driving voltage (V LED ) by the drain voltage (V D ) which will increase when any one of the LED channels is short-circuited, thereby raising the driving voltage (V LED ). The purpose is to obtain the gate voltage V G in the quasi-section. As will be described later, if the gate voltage V G obtained in the normal operation period is lower than the gate voltage V G obtained during the calibration period, it is determined that a short circuit has occurred in the channel.

As described above, in the present invention employing the 2-PIN detecting method, the gate voltage V G should be repeatedly obtained in the normal operation section in order to determine whether the channel is shorted. In addition, in order to reflect various applications to which the LED driving driver of the present invention is to be applied and environmental changes such as temperature and heat, the acquisition of the gate voltage V G value in the calibration period is also preferably performed periodically.

That is, in the present invention, the drain voltage V D should be inferred by using the gate voltage V G. In determining whether the LED channel is short-circuited during normal operation of the LED channel, the short-circuit determination reference voltage V SHT is used. The short circuit determination reference voltage V SHT is periodically checked and used.

16 is a graph illustrating a change in an optimized driving voltage according to a driving start section, a calibration section and a normal operation section of an LED channel according to an embodiment of the present invention.

A method of determining whether a LED channel is shorted in normal operation will be described with reference to FIG. 16.

First, during the driving start section 510, the driving voltage V LED increases linearly until the optimized driving voltage V LED .OPT is achieved .

Then, by increasing the drive voltage (V LED.OPT) optimized for the calibration period 520, to obtain a gate voltage (V G) for judging whether or not short circuit V MAX.VAR.

V MAX.VAR is a difference between the drain voltages allowed when all the LED channels are saturated. In other words, V MAX.VAR is the difference between the maximum value of each channel's drain voltage (V D.MAX ) and the minimum value of the drain voltage (V D.MIN ). It's a car.

That is, the V MAX.VAR may be referred to as the variation range of the drain voltage (V D ) that is permitted in various applications to which the LED driving driver of the present invention is applied, and V MAX.VAR from the minimum value of the drain voltage (V D.MIN ). It is determined that the LED channel having the above drain voltage V D is bad.

On the other hand, for example, a method of increasing the optimized driving voltage (V LED.OPT ) by V MAX.VAR (about 2.5V), if the voltage input to the inverting part is increased for a necessary time, the inverting output is DC-DC. The feedback voltage of the converter will drop, resulting in an easy way to increase the optimized drive voltage (V LED.OPT ).

That is, referring to FIG. 14, since T R is a time required to increase V S by 0.5 V, and T TOT is a time required to increase channel voltage by V MAX_VAR , the T DC is driven by the DCDC converter of the power control unit during the time of T TOT . voltage (V LED) give the information has not been optimized (optimize), driving voltage (V LED) will be raised by V MAX_VAR.

In addition, referring to FIG. 17, when the voltage output to the inverter is adjusted through the first switch SW1, the power controller performs a normal headroom voltage control operation to optimize the driving voltage V LED_OPT . Will be supplied.

To raise the driving voltage (V LED ) to the voltage for calibrating, that is, to about 2.5 V higher than the optimized driving voltage (V LED_OPT ), open the first switch SW1 during the time of T TOT and the second switch SW2. ), The driving voltage (V LED ) is raised to 'voltage higher by V MAX_VAR than the optimized driving voltage (V LED_OPT )'.

Subsequently, when the second switch SW2 is opened after the time T TOT passes, the voltage output to the inverting unit by the capacitance is constantly supplied as 'voltage higher by V MAX_VAR than the optimized driving voltage V LED_OPT '.

Subsequently, when the calibration section ends and the first switch SW1 is closed when entering the normal operation section, the power control unit performs a normal headroom voltage control operation so that the supply voltage is optimized drive voltage. (V LED_OPT ) becomes.

In the present invention, it is preferable that the current entering the capacitance through the second switch SW2 has a 1 / Gm value which is an inverse value of the Gm value of Gm-AMP.

Subsequently, the gate voltage V G of each LED channel is converted into a digital value by using an AD converter in the optimized driving voltage V LED.OPT section and stored in the registry. In this way, the data based on the stored gate voltage V G values becomes a short-circuit determination reference voltage V SHT for determining whether a short circuit occurs.

Then, thereby reducing the driving voltage (V LED.OPT) optimizing the increased cost to the original driving voltage (V LED.OPT) through the optimization of the headroom voltage control (Headroom Voltage Control). That is, the optimized driving voltage (V LED.OPT ), which is increased by about 2.5V, is reduced by 2.5V again.

Thereafter, the gate voltage V G of each channel is periodically collected in the normal operation period. Of course, the gate voltage (V G ) of each channel is converted into a digital value through analog-to-digital conversion, and the gate voltage is higher than the value of the data stored in the registry, that is, the short-circuit determination reference voltage (V SHT ), during the calibration period 520. If the (V G ) value is small, it is determined that it is short.

The present invention has been described above in connection with specific embodiments of the present invention, but this is only an example and the present invention is not limited thereto. It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims and their equivalents. Various modifications and variations are possible.

Claims (14)

  1. A driving channel (V LED ) is input, the LED channel unit including at least one LED (Light Emitting Diode) and a plurality of LED channels connected in series with the field effect transistor and the channel resistance;
    A channel irradiator connected to the field effect transistor to control a constant current to flow in each LED channel, and determine whether the LED channel is open or short; And
    It is connected to the gate terminal of the field effect transistor, and compares the maximum gate voltage (V G_MAX ) and the control voltage (V CTL ) of the plurality of gate voltage (V G ) to the driving voltage (V LED ) to the headroom voltage (Headroom Voltage A power control unit for supplying the LED channel unit to a size that minimizes V X ); Including but not limited to:
    And the channel irradiator is connected to a gate terminal and a source terminal except for a drain terminal of the field effect transistor.
  2. The method of claim 1, wherein the channel irradiation unit,
    A first OP-AMP having a reference voltage (V REF ) input to a (+) terminal, a (−) terminal connected to the source terminal, and an output terminal thereof connected to the gate terminal; And
    A short circuit determination unit configured to compare the source voltage V S and the open voltage V OPEN of the field effect transistor and output the comparison voltage;
    LED driving driver comprising the.
  3. The method of claim 1, wherein the channel irradiation unit,
    And an analog-to-digital converter (AD converter) for analog-to-digital converting the gate voltage (V G ) value of each LED channel and storing the same in a predetermined registry.
  4. The method of claim 1, wherein the power control unit,
    A gate voltage input terminal configured to receive gate voltages V G of the plurality of LED channels and filter a maximum gate voltage V G_MAX ;
    A control voltage input terminal to which a control voltage V CTL is input;
    GM-AMP for comparing the maximum gate voltage (V G_MAX ) and the control voltage (V CTL ) to generate and output a current difference between the voltages;
    An inversion unit for inverting the output of the GM-AMP using the headroom voltage V X ; And
    A DC-DC converter generating an optimized driving voltage (V LED.OPT ) by controlling a feedback loop using the output of the inverting unit;
    LED driving driver comprising a.
  5. 5. The LED driving driver of claim 4, wherein the gate voltages (V G ) and the control voltage (V CTL ) are dropped by a diode and input to the GM-AMP.
  6. The method of claim 4, wherein the optimized driving voltage (V LED.OPT ),
    LED driving driver, characterized in that all the LED channels are operating at saturation state and the headroom voltage of the LED channel is minimized to maximize power efficiency.
  7. The method of claim 1, wherein the adjustment of the headroom voltage is performed by setting a level of the gate voltage V G when the field effect transistor operates in a saturation region to determine a control voltage V CTL . Afterwards, the maximum gate voltage (V G_MAX ) and the control voltage (V CTL ) by comparing the driving voltage (V LED ) to adjust the magnitude of the LED driver.
  8. The method of claim 1,
    And the field effect transistor is an NMOS transistor.
  9. The method of claim 1, wherein whether the LED channel is opened at the start of driving (strat-up),
    After the time (t MAX ) for linearly increasing the driving voltage (V LED ) to a voltage at which all the LED channels can enter a saturation state, the LED channel without a response is determined to be open. LED driven driver.
  10. The method of claim 1, wherein the LED channel is opened during normal operation.
    The source voltage V S is opened by the channel irradiator even after a time t MAX for linearly increasing the driving voltage V LED to a voltage at which all the LED channels can be saturated. The LED driving driver, characterized in that determined to be open when the voltage is detected lower than the voltage (V OPEN ).
  11. The method of claim 1, wherein whether the LED channel is shorted at start-up is determined by using the following equation.
    Figure 112011058685187-pct00012

    LED driving, characterized in that the LED channel that is saturated before the t TOT is determined to be short-circuited by inversely calculating the driving voltage (V LED ) based on the channel that is saturated most recently. driver.
    Where V MAX.VAR is the difference between the maximum drain voltage (V D.MAX ) and the minimum drain voltage (V D.MIN ) of the LED channel in a steady state, and t R is the channel voltage increased by X · V REF . Is the time taken for the V REF to be a reference voltage, X is a constant, and t TOT is the time taken for the channel voltage to rise by V MAX.VAR .)
  12. The method of claim 1, wherein whether the LED channel is shorted during normal operation
    During the calibration period, the optimized drive voltage (V LED.OPT ) is increased by a predetermined value through headroom voltage control and the analog-to-digital conversion of the gate voltage (V G ) of each channel After saving to
    After the optimized driving voltage (V LED.OPT ) is reduced by the predetermined value to collect the gate voltage (V G ) in the normal operation period,
    And determining that the gate voltage (V G ) collected in the normal operation section is short when the gate voltage (V G ) value is less than the stored gate voltage (V G ) in the calibration section.
  13. The method of claim 12, wherein the predetermined value is,
    The difference between the maximum drain voltage (V D.MAX ) and the minimum drain voltage (V D.MIN ) of the LED channel in the normal state, that is, V MAX.VAR .
  14. Of claim 12, wherein the gate voltage (V G) value or a gate voltage (V G) values in the steady operation period in the calibration interval, LED, characterized in that which is periodically collected and determines whether or not short-circuit (short) Driven driver.
KR1020117017785A 2011-07-13 2011-07-13 Driver for driving LED KR101255176B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/KR2011/005133 WO2013008967A1 (en) 2011-07-13 2011-07-13 Led driver

Publications (2)

Publication Number Publication Date
KR20130016720A KR20130016720A (en) 2013-02-18
KR101255176B1 true KR101255176B1 (en) 2013-04-22

Family

ID=47506237

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020117017785A KR101255176B1 (en) 2011-07-13 2011-07-13 Driver for driving LED

Country Status (2)

Country Link
KR (1) KR101255176B1 (en)
WO (1) WO2013008967A1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20150001067A (en) * 2013-06-26 2015-01-06 주식회사 실리콘웍스 Driving circuit of a lighting device and method of driving the same
KR20150002096A (en) 2013-06-28 2015-01-07 주식회사 실리콘웍스 Led lighting apparatus and control circuit thereof

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100936815B1 (en) 2009-04-28 2010-01-14 주식회사 튜반 Apparatus for driving multi-channel light emitting diodes
KR20100008353A (en) * 2008-07-15 2010-01-25 인터실 아메리카스 인코포레이티드 Dynamic headroom control for led driver
KR20110038591A (en) * 2009-10-08 2011-04-14 인터실 아메리카스 인코포레이티드 Adaptive pwm controller for multi-phase led driver

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20090076330A (en) * 2008-01-08 2009-07-13 주식회사 케이이씨 Light emitting device and power supply having time division multiple output dc-dc converter

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20100008353A (en) * 2008-07-15 2010-01-25 인터실 아메리카스 인코포레이티드 Dynamic headroom control for led driver
KR100936815B1 (en) 2009-04-28 2010-01-14 주식회사 튜반 Apparatus for driving multi-channel light emitting diodes
KR20110038591A (en) * 2009-10-08 2011-04-14 인터실 아메리카스 인코포레이티드 Adaptive pwm controller for multi-phase led driver

Also Published As

Publication number Publication date
KR20130016720A (en) 2013-02-18
WO2013008967A1 (en) 2013-01-17

Similar Documents

Publication Publication Date Title
US9526139B2 (en) Load driving device, and lighting apparatus and liquid crystal display device using the same
US10028348B2 (en) Driving circuit for light-emitting element with burst dimming control
US9237627B2 (en) Light-emitting element driving device
CN103688302B (en) The system and method using dynamic power control for display system
US8450943B2 (en) Illuminating device and controlling method thereof
US8669934B2 (en) Driving circuit for light emitting device with overcurrent protection
US8081199B2 (en) Light emitting element drive apparatus, planar illumination apparatus, and liquid crystal display apparatus
US8120283B2 (en) LED device and LED driver
KR101473366B1 (en) Method for driving a light source, light source apparatus for performing the method, and display apparatus having the light source apparatus
KR100735460B1 (en) A circuit for controlling led driving with temperature compensation
EP2067381B1 (en) Light emitting element control system and lighting system comprising same
US7999785B2 (en) Light-source module for display device and display device having the same
CN100452133C (en) Light emitting element driving device and portable apparatus equipped with light emitting elements
US9336724B2 (en) Backlight unit, method for driving the same, and liquid crystal display device using the same
KR100951258B1 (en) Driving circuit of light emitting diode
KR101009049B1 (en) Apparatus for lighting leds
US7919936B2 (en) Driving circuit for powering light sources
US9559585B2 (en) Driver method
TWI424781B (en) Led driver circuit
US8148919B2 (en) Circuits and methods for driving light sources
US8358084B2 (en) LED current control circuit, current balancer and driving apparatus
US7595622B1 (en) System and method for providing a sample and hold circuit for maintaining an output voltage of a constant current source circuit when a feedback loop is disconnected
US20130140990A1 (en) Open LED Detection and Recovery System for LED Lighting System
CN102598315B (en) Circuit and method for driving led string for backlight, and backlight and display device using the circuit
KR101539359B1 (en) Method for driving a light source, light source apparatus for performing the method, and display apparatus having the light source apparatus

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
LAPS Lapse due to unpaid annual fee