KR101163604B1 - Liquid crystal display - Google Patents

Abstract

A liquid crystal display device is provided. A liquid crystal display device according to an exemplary embodiment of the present invention includes a liquid crystal display panel including a plurality of unit pixels two-dimensionally arranged in an area where a plurality of gate lines and a plurality of data lines intersect, and sequentially in a plurality of gate lines. A gate driver for providing a gate signal, a data driver for providing a data signal to a data line in synchronization with a gate signal provided by the gate driver, and controlling the number of effective channels for controlling the gate driver and the data driver and applying a signal to the data driver It includes a timing controller (T-CON) having a possible multi-port output terminal.

Timing controller, multi-port output terminal, channel number control, liquid crystal display

Description

Liquid crystal display

1 is a conceptual diagram illustrating an operation of a two-port output terminal timing controller applied to a liquid crystal display according to the related art.

2 is a conceptual diagram illustrating an operation of a two-port output terminal timing controller applied to a liquid crystal display according to an exemplary embodiment of the present invention.

FIG. 3 is an explanatory diagram schematically illustrating a liquid crystal display device having a timing controller of FIG. 2.

DESCRIPTION OF THE REFERENCE NUMERALS

310: liquid crystal display panel 315: thin film transistor

320: data driver 330: data driver

340: Timing Controller

The present invention relates to a liquid crystal display device, and more particularly, to a timing controller (T-CON) having an improved multi-port output terminal capable of adjusting the number of effective channels for each output port. It relates to a liquid crystal display device.

In recent years, liquid crystal displays are spotlighted as display means.

The liquid crystal display performs display functions by using the electrical and optical properties of liquid crystals injected into the liquid crystal panel, and is widely applied to various fields such as computer monitors and mobile communication terminals due to the advantages of small size, light weight, and low power consumption. It is becoming a trend.

1 is a conceptual diagram illustrating an operation of a two-port output terminal timing controller applied to a liquid crystal display according to the related art, in which a solid line indicates signal channels connected to a left output terminal and a dotted line indicates a right output terminal. Indicates signal channels connected with.

Referring to FIG. 1, the conventional two-port output terminal timing controller is configured to apply a signal to a driver IC (Integrated Circuit) through the same number of channels of the left and right two output ports regardless of the resolution.

In other words, in the case of a two-port output terminal timing controller included in a liquid crystal display having a resolution of 1680 × 1050, 5040 (1680 × 3) channels for applying signals to the data driver are required. Accordingly, in order to implement such a resolution, nine drivers are required when the 600 channel driver IC is used on the data driver side, and eight are required for the 630 channel driver IC and seven for the 720 channel driver IC.

However, in the case of a two-port output terminal timing controller according to a conventional technique, since only 2520 identical channels must be formed in each of the two left and right output terminals, only an even number of driver ICs can be used, and eight 630 channel driver ICs must be used. It is true.

However, this is an unnecessary process constraint. In other words, considering the trend of the display market, which is gradually increasing in resolution, if the driver IC is defined as a single model of 720 channels (or more), the effective number of channels of the timing controller is determined according to the model conditions. If a general-purpose timing controller is developed that can be set separately, many advantages such as a reduction in the number of driver ICs used, a short development period, and a reduction in product size will be obtained.

Accordingly, the present invention is to propose a timing controller having a multi-port output terminal improved to enable the adjustment of the number of effective channels for each output terminal.

SUMMARY OF THE INVENTION The present invention has been made in an effort to provide a liquid crystal display device having a timing controller having an improved multi-port output terminal capable of adjusting the number of effective channels for each output port.

The objects of the present invention are not limited to the above-mentioned objects, and other objects not mentioned can be clearly understood by those skilled in the art from the following description.

In order to achieve the above object, a liquid crystal display device according to an embodiment of the present invention is a liquid crystal display panel having a plurality of unit pixels arranged in two dimensions in an area where a plurality of gate lines and a plurality of data lines cross, A gate driver that sequentially provides a gate signal to a plurality of gate lines, a data driver that provides a data signal to a data line in synchronization with a gate signal provided by the gate driver, and controls a gate driver and a data driver to provide a signal to the data driver. And a timing controller having a multi-port output terminal capable of adjusting the number of effective channels to be applied.

Specific details of other embodiments are included in the detailed description and the drawings.

Advantages and features of the present invention and methods for achieving them will be apparent with reference to the embodiments described below in detail with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but may be embodied in various forms, and the present embodiments are merely provided to make the disclosure of the present invention complete and the general knowledge in the art to which the present invention belongs. It is provided to fully inform the person having the scope of the invention, the invention is defined only by the scope of the claims. Like reference numerals refer to like elements throughout.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 2 is a conceptual diagram illustrating an operation of a 2-port output terminal timing controller applied to a liquid crystal display according to an exemplary embodiment of the present invention, in which a solid line indicates signal channels connected to a left output terminal and is indicated by a dotted line. FIG. Indicates the signal channels connected to this right output terminal.

In the case of a liquid crystal display device having a two-port output terminal timing controller to implement a resolution of 1680 × 1050, eight driver ICs having 630 channels are used in the data driver.

However, in the case of the timing controller of the liquid crystal display according to the exemplary embodiment of the present invention, the effective number of channels for each output terminal can be set by the user, and as shown in FIG. Seven driver ICs with channels are available.

In other words, in operating the data driver having 5040 channels (1680 × 3), in consideration of the channel characteristics of the driver IC constituting the data driver, the left output terminal has 2880 effective channels and the right output terminal has 2160 effective channels. Each is set differently to have.

In this case, in the exemplary embodiment as shown in FIG. 2, only one driver IC can be reduced compared to the conventional method. However, when it is developed and applied, regardless of the characteristics of each of the various LCD models. The availability of general-purpose timing controllers will provide significant benefits in terms of economics and efficiency, such as reducing the time and cost of designing and manufacturing timing controllers.

Here, the inconsistency of the synchronization due to the different number of channels for each output terminal can be solved by, for example, implementing a software virtual driver IC and providing a dummy signal thereto.

In other words, as shown in FIG. 2, the driver IC having a virtual 720 channel (2880 2160) is set at the right output terminal and the synchronization between the left and right output terminals is performed by a method in which a timing controller provides a dummy signal. Will be able to match.

At this time, the output terminal of the timing controller is not limited to two ports. Therefore, in the case of the multi-port output terminal timing controller having two or more output terminals, the output terminal having the largest number of effective channels and the respective output terminals are provided. This problem can be solved by providing as many virtual signal channels as the difference of the set effective channel number.

In addition, the setting of the effective channel number of the timing controller may be made by a direct channel number input method by a user or the like. However, a method of allowing the channel number to be set by the user's selection for some representative cases may be more easily performed. May be used. For example, in the case of a two-port output terminal timing controller as shown in FIG. 2, a typical representative case ratio of the driver ICs connected to the left and right output terminals, such as 4: 3, 4: 4, or 4: 5, is set in advance. For example, the user can select one of them. Of course, a method of inputting the number of channels by the user and the user's selection of the set case may be used in combination.

However, it will be apparent to those skilled in the art that the present invention is not limited to the several manners mentioned above.

FIG. 3 is an explanatory diagram schematically illustrating a liquid crystal display device having a timing controller of FIG. 2.

As shown in FIG. 3, the liquid crystal display according to the exemplary embodiment includes a liquid crystal display panel 310, a data driver 320, a gate driver 330, and the like.

In the liquid crystal display panel 310, a plurality of gate lines and data lines are formed in a matrix form. The thin film transistor 315 is formed at the intersection of the gate lines and the data lines.

In general, a common electrode and a color filter are formed on an opposite substrate facing the substrate on which the thin film transistor 315 is formed, and the liquid crystal display panel 310 is formed by encapsulating liquid crystal between the two substrates.

In a transverse electric field (IPS) type liquid crystal display device, the common electrode may be formed on the thin film transistor 315 substrate. However, since the common electrode is obvious to those skilled in the art, a detailed description thereof will be omitted.

Although not shown in detail, the thin film transistor 315 includes a gate electrode, a source electrode, a drain electrode, an active layer, an ohmic contact layer, and the like, and the drain electrode is connected to the pixel electrode to form the unit pixel P. When the gate signal is applied to the gate electrode through the gate line, the thin film transistor 315 having the structure operates to transfer the data signal applied to the data line from the source electrode to the drain electrode through the ohmic contact layer and the active layer. .

That is, when a data signal is applied to the source electrode, a voltage corresponding thereto is applied to the pixel electrode connected to the source electrode, which causes a voltage difference between the pixel electrode and the common electrode. In addition, due to the difference in voltage between the pixel electrode and the common electrode, the molecular arrangement of the liquid crystals placed therein is changed, and the light transmittance of the pixels is changed due to the change in the molecular arrangement of the liquid crystal, thereby applying a data signal applied to each pixel. The color difference of the pixel is generated according to the difference. By using the color difference, the screen of the liquid crystal display may be controlled.

The data signal applied to the source electrode is provided from the data driver 320, and the gate signal applied to the gate electrode is provided from the gate driver 330.

The gate driver 330 sequentially provides a gate signal for activating or deactivating the gate electrode to the plurality of gate lines. Then, the data driver 320 provides the grayscale voltage corresponding to the data signal to the plurality of data lines in accordance with the timing at which the gate signal is applied. Timing synchronization between the data driver 320 and the gate driver 330 is performed by the timing controller 340 or the like.

Here, the timing controller 340 applied to the liquid crystal display according to the exemplary embodiment of the present invention is a multi output terminal timing controller capable of adjusting the number of effective signal channels for each output terminal. As a result, a driver IC optimized for the manufacturing cost or size of the liquid crystal display device can be adopted regardless of the number of channels allocated to each output terminal, thereby providing a more economical and efficient liquid crystal display device.

Details related to the detailed configuration or operation of the timing controller 340 will be described with reference to FIG. 2 and the description thereof.

While the present invention has been described in connection with what is presently considered to be practical exemplary embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, You will understand. Therefore, the embodiments described above are to be understood in all respects as illustrative and not restrictive.

According to the liquid crystal display device according to the embodiment of the present invention as described above, the effective channel number of the timing controller having the multi-port output terminal used for driving the liquid crystal display device can be adjusted for each output terminal.

Accordingly, by using the multi-port output terminal timing controller, an optimized data driver can be realized regardless of the number of driver ICs.

As a result, the number of driver ICs used can be reduced and manufacturing cost of the liquid crystal display device can be reduced. In addition, a general-purpose timing controller can be manufactured regardless of the number of driver ICs. Additional advantages, such as shortening the process period and the process cost required for the development and manufacture of the product, can also be obtained.

Claims (6)

A liquid crystal display panel including a plurality of unit pixels two-dimensionally arranged in an area where a plurality of gate lines and a plurality of data lines cross each other; A gate driver configured to sequentially provide gate signals to the plurality of gate lines; A data driver configured to provide a data signal to the data line in synchronization with a gate signal provided by the gate driver; And And a timing controller (T-CON) for controlling the gate driver and the data driver and having a multi-port output terminal capable of adjusting the number of effective channels for applying signals to the data driver. When the number of effective channels of the multi-port output terminal included in the timing controller is different, the virtual signal corresponding to the difference between the output terminal having the largest number of effective channels and the effective channel number of each output terminal for each output terminal. And a channel is generated. delete The method of claim 1, And a dummy signal for synchronization between the multi-port output terminals is provided in the virtual signal channel. The method according to claim 1 or 3, Adjusting the number of effective channels for the multi-port output terminal of the timing controller can be set to correspond to the ratio of the number of driver ICs (Integrated Circuit) connected to each output port. . The method of claim 4, wherein And the timing controller is a two-port output terminal timing controller. 6. The method of claim 5, And the ratio of the number of data drive ICs settable for each output terminal in the two-port output terminal timing controller is 4: 3, 4: 4 or 5: 4.

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