KR101024632B1 - Charge pump circuit and method for charge pumping - Google Patents

Abstract

PURPOSE: A charge pump circuit and a method for charge pumping are provided to generate a booted voltage having a stable level regardless of the change of a boost voltage ratio by allowing a capacitor to have a period in which a charged voltage level is changed in advance. CONSTITUTION: In a charge pump circuit and a method for charge pumping, a plurality of capacitors(C11,C12,C13) perform a voltage boosting operation. A switch control part(310) responses to a boosting ratio and generates a plurality of switch control signals. A switch element(320) controls a plurality of capacitors.

Description

Charge pump circuit and charge pumping method thereof {CHARGE PUMP CIRCUIT AND METHOD FOR CHARGE PUMPING}

The present invention relates to a charge pump circuit and a charge pumping method for boosting an input voltage to generate a boosted voltage.

Various semiconductor devices operate internal circuits by using externally supplied voltages. However, since the types of voltages used in the semiconductor device are very diverse, it is difficult to supply all the voltages to be used in the semiconductor device from the outside. Therefore, the semiconductor device has an internal voltage generation circuit for generating a new level of voltage internally.

In particular, a device using a battery power source has a higher power supply voltage than an internally input power supply voltage when the level of the power supply voltage supplied from the battery is low and the driving voltages to be used internally are higher. You need to generate a voltage. DC-DC converters that generate a voltage higher than the input voltage are largely switched mode power supply (SMPS) type using an inductor and a charge pump type using a capacitor. In the case of devices, the current consumption is not high, so the charge pump type is mainly used.

1A and 1B are diagrams illustrating an operation when the charge pump circuit boosts an input voltage by 1.5 times and FIGS. 2A and 2B illustrate an operation when the charge pump circuit boosts and outputs an input voltage twice. The figure shown.

A case in which the input voltage is boosted by 1.5 times will be described with reference to FIGS. 1A and 1B. FIG. 1A shows the operation of phase 1, in which the input voltage is divided into voltages so that the capacitor 101 and the capacitor 102 are charged with voltages of 1/2 * VCIN, respectively. FIG. 1B shows the operation of phase 2, in which the input voltage VCIN and the charged voltages (1/2 * VCIN) of the capacitors 101 and 102 are added to increase the voltage corresponding to 1.5 * VCIN. It is output by the voltage AVDD.

Now, a case in which the input voltage VCIN is boosted by 2 times will be described with reference to FIGS. 2A and 2B. 2A shows the operation of phase 1, in which the input voltage VCIN is charged to the capacitor 101 and the input voltage VCIN and the voltage 102 of the capacitor are added to the boosted voltage (AVDD = 2 * VCIN). Is output. FIG. 2B shows the operation of phase 2. In phase 2, the input voltage VCIN is charged to the capacitor 102 and the input voltage VCIN and the voltage of the capacitor VCIN are added to the boosted voltage (AVDD = 2 * VCIN). Is output. Therefore, when the operations of FIGS. 2A and 2B are repeated, the voltage of the input voltage * 2 is output as the boosted voltage AVDD.

Comparing FIGS. 1A and 2B with FIGS. 2A and 2B, the capacitors 101 and 102 are charged with 1/2 * VCIN in FIGS. 1A and 2B, whereas the capacitors 101 and 102 are charged with VCIN in FIGS. do. That is, the levels of voltages charged in the capacitors 101 and 102 are different from each other according to the boost ratio. Therefore, the conventional charge pump circuit is often designed so that the boosting magnification cannot be changed during operation, and even if the boosting magnification is changed during the operation of the charge pump circuit, it cannot guarantee stable operation due to the massive noise generated momentarily. There is a problem.

The present invention has been proposed to solve the above problems of the prior art, and it is possible to change the boosting magnification even during operation, and a charge pump circuit and a charge pumping method thereof in which no noise occurs in the boosting voltage stage even when the boosting magnification is changed. The purpose is to provide.

According to an aspect of the present invention, a charge pumping method includes: a first step of boosting an input voltage at a boost ratio of xA to generate a first boost voltage; A second step of changing a voltage level charged in at least one or more capacitors provided in the charge pump circuit in preparation for changing the boost ratio; And a third step of generating a second boosted voltage by boosting the input voltage at a boosted magnification of xB.

In addition, the charge pumping method according to the present invention includes a first step of charging a voltage of X to the first capacitor and the second capacitor; A second step of generating a first boosted voltage by adding an input voltage and an X voltage charged in the first capacitor and the second capacitor; A third step of changing a voltage charged in the first capacitor and the second capacitor into a Y voltage in preparation for a change in the boost ratio; A fourth step of generating a second boosted voltage by adding the Y voltage charged to the first capacitor and the Y voltage charged to the second capacitor; And a fifth step of generating the second boosted voltage by adding the Y voltage charged to the second capacitor and the Y voltage charged to the first capacitor and the input voltage.

In addition, the charge pumping method according to the present invention includes a first step of charging a third capacitor with a voltage obtained by adding an input voltage and an X voltage charged in a first capacitor and a second capacitor; A second step of charging the X capacitor to the first capacitor and the second capacitor, and generating a first boosted voltage by adding the voltage charged to the third capacitor and the input voltage; A third step of changing an X voltage charged in the first capacitor and the second capacitor into a Y voltage in preparation for a change in the boost ratio; A fourth step of charging the third capacitor with a voltage obtained by adding the Y voltage charged to the first capacitor and the second capacitor and the input voltage; And a fifth step of charging the first capacitor and the second capacitor to the Y voltage, and generating a second boosted voltage by adding the voltage charged to the third capacitor and the input voltage.

In addition, the charge pumping method according to the present invention includes a first step of charging a third capacitor with a voltage obtained by adding an input voltage and an X voltage charged in a first capacitor and a second capacitor; A second step of charging the X capacitor to the first capacitor and the second capacitor, and generating a first boosted voltage by adding the voltage charged to the third capacitor and the input voltage; A third step of changing an X voltage charged in the first capacitor and the second capacitor into a Y voltage in preparation for a change in the boost ratio; A fourth step of generating a second boosted voltage by adding the Y voltage charged to the first capacitor and the Y voltage charged to the second capacitor; And a fifth step of generating the second boosted voltage by adding the Y voltage charged to the second capacitor and the Y voltage charged to the first capacitor and the input voltage.

In addition, the charge pump circuit according to the present invention, the charge pump circuit for boosting the input voltage to generate a boost voltage, comprising: a plurality of capacitors for the boost operation; A switch controller configured to generate a plurality of switch control signals in response to the boost ratio information; And a plurality of switches controlling the plurality of capacitors in response to the plurality of switch control signals. When the boosting magnification information is changed during the operation of the charge pump circuit, the switch control unit may include at least one of the plurality of capacitors. The plurality of switch control signals may be controlled to have a change section for changing the above charged voltage before the boost operation according to the changed boost ratio.

The charge pump circuit may further include a voltage limiter configured to discharge the boosted voltage when the boosted voltage is higher than a target voltage.

The charge pumping method according to the present invention has a section for changing the level of the voltage charged in the capacitor in advance in preparation for the change in the boost ratio. Therefore, there is an advantage in that even if the boost ratio is changed during the charge pumping operation, a boosted voltage having a stable level can be generated.

In addition, when the level of the boosted voltage is higher than the level of the target voltage, the boosted voltage is discharged, so that the level of the boosted voltage can be prevented from being too high.

Hereinafter, the most preferred embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention.

3 is a configuration diagram of a charge pump circuit according to the present invention.

As shown in FIG. 3, the charge pump circuit includes a switch controller 310, a plurality of switches 320, a plurality of capacitors C11, C12, and C13, and a voltage limiter 330.

A plurality of capacitors (C11, C12, C13) is provided for the charge pumping operation. Step-up magnifications and the like vary depending on what voltage is charged in the plurality of capacitors C11, C12, and C13, and how the capacitors C11, C12, and C13 are connected.

The plurality of switches 320 controls the plurality of capacitors C11, C12, and C13 in response to the switch control signals P1, P2, BT01_P2, BT01_P21, BT13_P1, BT13_P21, BT02_P1, BT23_P1, BT23_P2, BT1X_P21, BT1X_P12. . The configuration of a circuit including a plurality of capacitors C11, C12, and C13 varies depending on which of the plurality of switches 320 is turned on or off. In the drawing, a plurality of switches 320 are shown in blocks, which will be described with reference to FIG. 4.

The switch controller 310 generates switch control signals P1, P2, BT01_P2, BT01_P21, BT13_P1, BT13_P21, BT02_P1, BT23_P1, BT23_P2, BT1X_P21, and BT1X_P12 in response to the boosting magnification information BT <1: 0>. The boosting magnification information BT <1: 0> has information on how many times the charge pump circuit boosts the input voltage VCIN to generate the boosting voltage AVDD. The switch control unit 310 generates switch control signals P1, P2, BT01_P2, BT01_P21, BT13_P1, BT13_P21, BT02_P1, BT23_P1, BT23_P2, BT1X_P21, and BT1X_P12 according to the boost ratio information BT <1: 0>. Switch 320 and the plurality of capacitors C11, C12, and C13 boost the input voltage VCIN by the boosting ratio determined according to the boosting magnification information BT <1: 0> and output the boosted voltage AVDD. To control. The initialization signal BT13_INI input to the switch controller 310 is a signal that is activated for a predetermined period when the boosting magnification information BT <1: 0> is changed. During the period in which the initialization signal BT13_INI is activated, the switch controller 310 switches the switch control signals P1, P2, and BT01_P2 so that the voltage charged in the capacitors C11, C12, and C13 may be changed according to the step-up ratio to be newly changed. , BT01_P21, BT13_P1, BT13_P21, BT02_P1, BT23_P1, BT23_P2, BT1X_P21, BT1X_P12) are generated. More details about this will be described later.

The voltage limiter 330 is provided to lower the level of the boosted voltage AVDD when the level of the boosted voltage AVDD becomes higher than the target level. The voltage limiter 330 will be described in detail later.

Table 1 below shows the boost ratio according to the boost ratio information.

BT <1: 0> Boosting magnification 00 x1.5 01 x2 10 x2.5 11 x3

FIG. 4 is a diagram illustrating an internal configuration of the plurality of switch 320 blocks of FIG. 3.

As shown in FIG. 4, the plurality of switch blocks 320 are turned on / off in response to each of the switch control signals P1, P2, BT01_P2, BT01_P21, BT13_P1, BT13_P21, BT02_P1, BT23_P1, BT23_P2, BT1X_P21, BT1X_P12. It is configured to include switches. If the switch control signals P1, P2, BT01_P2, BT01_P21, BT13_P1, BT13_P21, BT02_P1, BT23_P1, BT23_P2, BT1X_P21, BT1X_P12 are at the 'high' level, the switch receiving them is turned on and the switch control signals (P1, P2, BT01_P2) are turned on. If BT01_P21, BT13_P1, BT13_P21, BT02_P1, BT23_P1, BT23_P2, BT1X_P21, BT1X_P12) are 'low' levels, the switch receiving the input is turned off. The circuit configuration changes depending on how the switches are turned on and off, resulting in a charge pumping operation.

Capacitor C11 is connected to the C11M and C11P terminals shown in 4 3, a capacitor C12 is connected to the C12M and C12P terminals, and a capacitor C13 is connected to the C13M and C13P terminals.

A detailed operation of the switches on / off will be described later with a timing chart.

5 is a diagram illustrating an internal configuration of the voltage limiting unit 330 of FIG. 3.

As shown in FIG. 5, the voltage limiting unit 330 includes a comparator 501, a transistor 502, and resistors R1 and R2.

Referring to the operation, the boosted voltage AVDD is divided by the resistors R1 and R2 and fed back to the comparator 501. The comparator 501 compares the level of the voltage-divided boosted voltage AVDD_DIV and the reference voltage VREF. When the level of the voltage-divided boosted voltage AVDD_DIV is higher than the level of the reference voltage VREF, the output signal is output. The output is 'high', and in response, the transistor 502 is turned on, and the level of the boosted voltage AVDD is lowered by the turned-on transistor 502.

When the level of the voltage-divided boosted voltage AVDD_DIV is expressed by an equation, AVDD_DIV = {R1 / (R1 + R2)} * AVDD. When AVDD_DIV> VREF, the transistor 502 is turned on. That is, when AVDD> VREF * (1 + R2 / R1), the transistor 502 is turned on and the boost voltage AVDD is discharged.

If the reference voltage VREF is appropriately set, the boosted voltage AVDD can be prevented from becoming too high. When the boosting magnification information BT <1: 0> changes, the boosting magnification changes, so that the target level of the boosting voltage AVDD changes. Therefore, if the level of the reference voltage VREF is changed according to the boost ratio information BT <1: 0>, it is possible to more accurately prevent the boost voltage AVDD from rising above the target level.

6 is a flowchart illustrating a charge pumping method according to the present invention.

Referring to FIG. 6, in the charge pumping method, boosting the input voltage VCIN at a boost ratio of xA to generate a first boost voltage (AVDD = A * VCIN) (S610), in preparation for a change in the boost ratio. Changing the voltage level charged in the at least one capacitor (C11, C12) provided in the charge pump circuit (S620), and boosting the input voltage (VCIN) at a boost ratio of xB to boost the second boost voltage (AVDD = Generating B * VCIN) (S630).

First, the input voltage VCIN is boosted according to the boost ratio set to xA to generate a first boosted voltage AVDD = A * VCIN (S610). After that, when the boost magnification is changed from xA to xB, the charge pump circuit does not immediately generate a second boost voltage according to the boost magnification of xB, and first charges the voltage level charged in the capacitors C11 and C12 inside the charge pump circuit. The step of changing (S620) is performed. When the boost magnification is changed, the voltage level charged inside the capacitors C11 and C12 must be changed accordingly. Therefore, the voltages charged in the capacitors C11 and C12 are different when the boost magnification is set to xA and to xB. Accordingly, the present invention first changes the voltage level charged in the capacitors C11 and C12 before generating the second boosted voltage AVDD = B * VCIN according to the new boosting ratio. Only after the step S620, a second boosted voltage AVDD = B * VCIN is generated in which the input voltage VCIN is boosted at a rate of xB. Accordingly, the second boosted voltage AVDD = B * VCIN can be generated stably.

As described above, in the charge pumping method according to the present invention, when the boosting ratio is changed, the voltage charged in the capacitors C11 and C12 inside the charge pump before generating a new level boost voltage AVDD = B * VCIN. Has a section to change the level. Therefore, it is possible to ensure stable operation even if the boost ratio is changed during the operation of the charge pump.

FIG. 7 is a timing diagram illustrating changes of signals when the boost magnification is changed from x1.5 (x1.5 boosting mode) to x2 (x2 boosting mode). 8A and 8B are diagrams illustrating a connection state of the switch 320 and the capacitors C11 and C12 during phase 1 and phase 2 in the x1.5 boosting mode. 8C is a view illustrating a connection state of the switch 320 and the capacitors C11 and C12 during the period immediately before the boosting magnification is changed. 8D and 8E are views illustrating a connection state of the switch 220 and the capacitors C11 and C12 during phase 1 and phase 2 in the x2 boosting mode.

Referring to FIG. 7, phase 1 and phase 2 are repeated and the switch control signals P1, P2, BT01_P2, BT01_P21, and BT13_P1 are repeated during a period in which the boost ratio is set to x1.5 (x1.5 boosting mode). , BT13_P21, BT02_P1, BT23_P1, BT23_P2, BT1X_P21, BT1X_P12 are controlled. Then, in the period for preparing the change of the boost ratio, that is, the period in which the initialization signal BT13_INI is activated, the switch control signals P1, P2, BT01_P2, BT01_P21, BT13_P1, BT13_P21, BT02_P1, BT23_P1, BT23_P2, BT1X_P21 and BT1X_P12 are controlled to change the voltage charged in the capacitors C11 and C12. During the period after the initialization period (x2.0 boosting mode), phase1 and phase2 according to the changed boosting ratio x2 are repeated, and the switch control signal ( P1, P2, BT01_P2, BT01_P21, BT13_P1, BT13_P21, BT02_P1, BT23_P1, BT23_P2, BT1X_P21, BT1X_P12 are controlled.

8A and 8B, the operation of the section in which the boosting ratio is set to x1.5 (x1.5 boosting mode) will be described. Referring to FIG. 8A, in a phase 1 phase, a capacitor C11 and a capacitor C12 are connected in series between an input voltage VCIN and a ground terminal. Therefore, the capacitor C11 and the capacitor C12 are charged with a voltage of 1/2 * VCIN. Referring to FIG. 8B, in a phase 2, the capacitor C11 and the capacitor C12 are connected in parallel. The input voltage VCIN is applied to the M terminal side of the capacitors C11 and C12. Therefore, the voltage at the P-terminal side of the capacitors C11 and C12 becomes VCIN + 1/2 * VCIN, which is output as a boosted voltage (AVDD = 1.5 * VCIN). That is, in phase 2, the voltage (1/2 * VCIN) charged to the capacitors C11 and C12 and the input voltage VCIN are added to output a boosted voltage (AVDD = 1.5 * VCIN).

Referring to Figure 8c, looks at the operation of the (initialization period) for preparing a change in the boost ratio. During this period, the input voltage VCIN is applied to one end of the capacitor C11 and the ground terminal is applied to the other end. Therefore, the capacitor C11 is charged with the input voltage VCIN. In addition, an input voltage VCIN is applied to one end of the capacitor C12, and a ground terminal is applied to the other end of the capacitor C12. Therefore, the capacitor C12 is charged with the input voltage. That is, during this period, the voltage charged in capacitors C11 and C12 is changed from 1/2 * VCIN to VCIN. As described above, the present invention changes the voltage charged in the capacitors C11 and C12 in advance during an initialization period during which the boosting magnification is prepared, and thus the boosted voltage AVDD = 2 in the operation of the next period x2 boosting mode. The level of * VCIN) becomes unstable or noise can be prevented.

Referring to FIGS. 8D and 8E, operation of a 2x boosting mode in which the boost magnification is set to x2 will be described. Referring to FIG. 8D, in phase 1, an input voltage VCIN is applied to the P terminal of the capacitor C11 and a ground terminal is applied to the M terminal. Therefore, the capacitor C11 is charged to the level of the input voltage. An input voltage VCIN is applied to the M terminal of the capacitor C12, and a boosted voltage AVDD is output to the P terminal. Since the capacitor C12 is already charged at the level of the input voltage VCIN, the boosting voltage AVDD is output at the level of 2 * VCIN to the P terminal of the capacitor C12. Referring to FIG. 8E, in phase 2, an input voltage VCIN is applied to the P terminal of the capacitor C12, and a ground terminal is applied to the M terminal. Therefore, the capacitor C12 is charged to the level of the input voltage VCIN. An input voltage VCIN is applied to the M terminal of the capacitor C11, and a boosted voltage AVDD is output to the P terminal. Since the capacitor C11 is already charged at the level of the input voltage VCIN, the boost voltage AVDD is output at the level of 2 * VCIN to the P terminal of the capacitor C11.

FIG. 9 is a timing diagram illustrating changes in signals when the boost magnification is changed from x2.5 (x2.5 boosting mode) to x3 (x3 boosting mode). 10A and 10B are diagrams illustrating a connection state of the switch 220 and the capacitors C11, C12, and C13 during phase 1 and phase 2 in the x2.5 boosting mode. FIG. 10C is a view illustrating a connection state between the switch 320 and the capacitors C11 and C12 during an initialization period immediately before the boosting magnification is changed. 9D and 9E illustrate a connection state between the switch 320 and the capacitors C11, C12, and C13 during phase 1 and phase 2 in the x3 boosting mode.

Referring to FIG. 9, phase 1 and phase 2 are repeated during a period in which the boost magnification is set to x 2.5 and the switch control signals P 1, P 2, BT01_P2, BT01_P21, BT13_P1 , BT13_P21, BT02_P1, BT23_P1, BT23_P2, BT1X_P21, BT1X_P12 are controlled. Then, in the period for preparing the change of the boost ratio, that is, the period in which the initialization signal BT13_INI is activated, the switch control signals P1, P2, BT01_P2, BT01_P21, BT13_P1, BT13_P21, BT02_P1, BT23_P1, BT23_P2, BT1X_P21 and BT1X_P12 are controlled to change the voltage charged in the capacitors C11 and C12. During the period (x3 boosting mode) after the initialization period to prepare for the change of the boost ratio, phase 1 and phase 2 according to the changed boost ratio x3 are repeated, and the switch control signals P1, P2, BT01_P2, BT01_P21, BT13_P1, BT13_P21, BT02_P1, BT23_P1, BT23_P2, BT1X_P21, BT1X_P12 are controlled.

10A and 10B, the operation of the section in which the boost magnification is set to x2.5 will be described. Referring to FIG. 10A, in the phase 1 phase, the capacitor C11 and the capacitor C12 are connected in parallel, and the voltage (1/2 * VCIN) stored in the capacitors C11 and C12 connected in parallel and the input voltage ( VCIN) is added and stored in the capacitor C13. Therefore, capacitor C13 is charged with a voltage of 1.5 * VCIN. Referring to FIG. 10B, in the phase 2 phase, the capacitor C11 and the capacitor C12 are connected in series between the input voltage VCIN and the ground terminal. Thus, the capacitor C11 and the capacitor C12 are 1/2 in size. The voltage at VCIN is charged. Then, the charged voltage (1.5 * VCIN) and the input voltage VCIN are added to the capacitor C13 to output a boosted voltage (AVDD = 2.5 * VCIN). This repetitive operation of phase 1 and phase 2 eventually outputs a voltage of 2.5 * VCIN as a boost voltage AVDD.

Referring to Figure 10c, looks at the operation of the (initialization period) for preparing a change in the boost ratio. During this period, the input voltage VCIN is applied to one end of the capacitor C11 and the ground terminal is applied to the other end. Therefore, the capacitor C11 is charged with the input voltage VCIN. In addition, an input voltage VCIN is applied to one end of the capacitor C12, and a ground terminal is applied to the other end of the capacitor C12. Therefore, the input voltage VCIN is applied to the capacitor C12. That is, during this period, the voltage charged in capacitors C11 and C12 is changed from 1/2 * VCIN to VCIN. As described above, the present invention changes the voltage charged in the capacitors C11 and C12 in advance during the initialization period during which the boosting magnification is prepared, so that the boosted voltage AVDD = 3 in the operation of the next period x3 boosting mode. The level of * VCIN) becomes unstable or noise can be prevented.

Referring to FIGS. 10D and 10E, an operation of a section in which a boosting magnification is set to x3 (x3 boosting mode) will be described. Referring to FIG. 10D, in the phase 1 phase, the capacitor C11 and the capacitor C12 are connected in parallel, and the capacitor VCIN and the input voltage VCIN charged to the capacitors C11 and C12 are added to the capacitor. It is charged to (C13). Therefore, capacitor C13 is charged with a voltage of 2 * VCIN. Referring to FIG. 10E, an input voltage VCIN is applied to one end of the capacitor C11 in phase 2 and a ground terminal is applied to the other end of the capacitor C11, and the capacitor C11 is charged to the input voltage VCIN. In addition, an input voltage VCIN is applied to one end of the capacitor C12, and a ground terminal is applied to the other end, and the input voltage VCIN is charged to the capacitor C12. Then, the voltage 2 * VCIN charged to the input voltage VCIN and the capacitor C13 is added to output the boosted voltage AVDD as 3 * VCIN.

FIG. 11 is a timing diagram illustrating changes in signals when the boost magnification is changed from x2.5 (x2.5 boosting mode) to x2 (x2 boosting mode). 12A and 12B illustrate a connection state between the switch 320 and the capacitors C11, C12, and C13 during phase 1 and phase 2 in the x2.5 boosting mode. FIG. 12C is a diagram illustrating a connection state between the switch 320 and the capacitors C11 and C12 during an initialization period immediately before the boosting magnification is changed. 12D and 8E illustrate a connection state between the switch 320 and the capacitors C11, C12, and C13 during phase 1 and phase 2 in the x2 boosting mode.

Referring to FIG. 11, phase 1 and phase 2 are repeated during a period in which the boost magnification is set to x 2.5 and the switch control signals P 1, P 2, BT01_P2, BT01_P21, BT13_P1 , BT13_P21, BT02_P1, BT23_P1, BT23_P2, BT1X_P21, BT1X_P12 are controlled. Then, in the period for preparing the change of the boost ratio, that is, the period in which the initialization signal BT13_INI is activated, the switch control signals P1, P2, BT01_P2, BT01_P21, BT13_P1, BT13_P21, BT02_P1, BT23_P1, BT23_P2, BT1X_P21 and BT1X_P12 are controlled to change the voltage charged in the capacitors C11 and C12. During the period (x2 boosting mode) after the initialization period where the boosting magnification is changed, phase 1 and phase 2 according to the changed boosting magnification x2 are repeated, and the switch control signals P1, P2, BT01_P2, BT01_P21, BT13_P1, BT13_P21, BT02_P1, BT23_P1, BT23_P2, BT1X_P21, BT1X_P12 are controlled.

12A and 12B, the operation of the section in which the boost magnification is set to x2.5 will be described. Referring to FIG. 12A, in the phase 1 phase, the capacitor C11 and the capacitor C12 are connected in parallel, and the voltage (1/2 * VCIN) and the input voltage (stored in the parallel-connected capacitors C11 and C12) VCIN) is added and stored in the capacitor C13. Therefore, capacitor C13 is charged with a voltage of 1.5 * VCIN. Referring to FIG. 12B, in phase 2, capacitor C11 and capacitor C12 are connected in series between the input voltage VCIN and the ground terminal. Therefore, the capacitor C11 and capacitor C12 are 1/2 in size. The voltage at VCIN is charged. Then, the charged voltage (1.5 * VCIN) and the input voltage VCIN are added to the capacitor C13 to output a boosted voltage (AVDD = 2.5 * VCIN). This repetitive operation of phase 1 and phase 2 eventually outputs a voltage of 2.5 * VCIN as a boost voltage AVDD.

Referring to FIG. 12C, an operation of an initialization period for preparing a change in the boost ratio will be described. During this period, the input voltage VCIN is applied to one end of the capacitor C11 and the ground terminal is applied to the other end. Therefore, the capacitor C11 is charged with the input voltage VCIN. In addition, an input voltage VCIN is applied to one end of the capacitor C12, and a ground terminal is applied to the other end of the capacitor C12. Therefore, the input voltage VCIN is applied to the capacitor C12. That is, during this period, the voltage charged in capacitors C11 and C12 is changed from 1/2 * VCIN to VCIN. As described above, the present invention changes the voltage charged in the section (initializationinitializationinitialization C11, C12) to prepare for the change of the boost ratio in advance, so that the level of the boosted voltage (AVDD = 2 * VCIN) is increased in the operation of the next section (x2 boosting mode). This can prevent instability or noise.

Referring to FIGS. 12d and e, the operation of the section in which the boosting ratio is set to x2 (2x boosting mode) will be described. Referring to FIG. 12D, an input voltage VCIN is applied to the P terminal of the capacitor C11 and a ground terminal is applied to the M terminal in phase 1. Therefore, the capacitor C11 is charged to the level of the input voltage VCIN. An input voltage VCIN is applied to the M terminal of the capacitor C12, and a boosted voltage AVDD is output to the P terminal. Since the capacitor C12 is already charged at the level of the input voltage VCIN, the boosting voltage AVDD is output at the level of 2 * VCIN to the P terminal of the capacitor C12. Referring to FIG. 12E, in phase 2, an input voltage VCIN is applied to the P terminal of the capacitor C12, and a ground terminal is applied to the M terminal. Therefore, the capacitor C12 is charged to the level of the input voltage VCIN. An input voltage VCIN is applied to the M terminal of the capacitor C11, and a boosted voltage AVDD is output to the P terminal. Since the capacitor C11 is already charged at the level of the input voltage VCIN, the boost voltage AVDD is output at the level of 2 * VCIN to the P terminal of the capacitor C11.

Although the technical spirit of the present invention has been described in detail in accordance with the above-described preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will appreciate that various embodiments are possible within the scope of the technical idea of the present invention.

In particular, the above embodiment has been described an example in which the boosting magnification is changed to a specific magnification, but it is obvious that the principle of the present invention can be used to change the boosting magnification between magnifications other than the illustrated magnification.

1A and 1B are views showing an operation when the charge pump circuit boosts and outputs an input voltage 1.5 times;

2A and 2B are views showing an operation when the charge pump circuit doubles the input voltage and outputs it.

3 is a configuration diagram of a charge pump circuit according to the present invention.

4 is a diagram illustrating an internal configuration of a plurality of switch 320 blocks of FIG.

5 is a diagram illustrating an internal configuration of the voltage limiting unit 330 of FIG. 3.

6 is a flow chart showing a charge pumping method according to the present invention.

FIG. 7 is a timing diagram illustrating changes in signals when the boost magnification is changed from x1.5 (x1.5 boosting mode) to x2 (x2 boosting mode). FIG.

8a, b, c, d, and e illustrate a connection state of a switch and a capacitor in each section of FIG.

Fig. 9 is a timing diagram showing changes in signals when the boost magnification is changed from x2.5 (x2.5 boosting mode) to x3 (x3 boosting mode).

10a, b, c, d, and e illustrate a connection state of a switch and a capacitor in each section of FIG.

FIG. 11 is a timing diagram showing changes in signals when the boost magnification is changed from x2.5 (x2.5 boosting mode) to x2 (x2 boosting mode). FIG.

12a, b, c, d, and e are diagrams showing a connection state of a switch and a capacitor in each section of FIG.

Claims (17)

a first step of generating a first boosted voltage by boosting the input voltage at a boost ratio of xA; A second step of changing a voltage level charged in at least one or more capacitors provided in the charge pump circuit in preparation for changing the boost ratio; And a third step of generating a second boosted voltage by boosting the input voltage at a boost ratio of xB; Charge pumping method comprising a. The method of claim 1, The first step, Charging an X voltage to the capacitor; And Generating the first boosted voltage by adding the X voltage charged to the capacitor and the input voltage; Charge pumping method comprising a. The method of claim 2, The second step, And a method of changing the voltage charged in the capacitor from the X voltage to the Y voltage. The method of claim 3, The third step, Charging the capacitor with the Y voltage; And Generating the second boosted voltage by adding the Y voltage charged to the capacitor and the input voltage; Charge pumping method comprising a. The method of claim 4, wherein The detailed steps of the first step and the third step, Charge pumping method characterized in that it is carried out repeatedly. A first step of charging an X voltage to the first capacitor and the second capacitor; A second step of generating a first boosted voltage by adding an input voltage and an X voltage charged in the first capacitor and the second capacitor; A third step of changing a voltage charged in the first capacitor and the second capacitor into a Y voltage in preparation for a change in the boost ratio; A fourth step of generating a second boosted voltage by adding the Y voltage charged to the first capacitor and the Y voltage charged to the second capacitor; And A fifth step of generating the second boosted voltage by adding the Y voltage charged to the second capacitor and the Y voltage charged to the first capacitor; Charge pumping method comprising a. The method of claim 6, The first step and the second step are alternately performed alternately, Charge pumping method, characterized in that the fourth step and the fifth step are repeatedly performed alternately with each other. The method of claim 6, The X voltage is the level of the input voltage * 1/2, And the Y voltage is a level of an input voltage. A first step of charging the third capacitor with a voltage obtained by adding the input voltage and the X voltage charged in the first capacitor and the second capacitor; A second step of charging the X capacitor to the first capacitor and the second capacitor, and generating a first boosted voltage by adding the voltage charged to the third capacitor and the input voltage; A third step of changing an X voltage charged in the first capacitor and the second capacitor into a Y voltage in preparation for a change in the boost ratio; A fourth step of charging the third capacitor with a voltage obtained by adding the Y voltage charged to the first capacitor and the second capacitor and the input voltage; And A fifth step of charging the first capacitor and the second capacitor with the Y voltage, and generating a second boosted voltage by adding the voltage charged to the third capacitor and the input voltage; Charge pumping method comprising a. 10. The method of claim 9, The first step and the second step are alternately performed alternately, Charge pumping method, characterized in that the fourth step and the fifth step are repeatedly performed alternately with each other. 10. The method of claim 9, The X voltage is the level of the input voltage * 1/2, And the Y voltage is a level of the input voltage. A first step of charging the third capacitor with a voltage obtained by adding the input voltage and the X voltage charged in the first capacitor and the second capacitor; A second step of charging the X capacitor to the first capacitor and the second capacitor, and generating a first boosted voltage by adding the voltage charged to the third capacitor and the input voltage; A third step of changing an X voltage charged in the first capacitor and the second capacitor into a Y voltage in preparation for a change in the boost ratio; A fourth step of generating a second boosted voltage by adding the Y voltage charged to the first capacitor and the Y voltage charged to the second capacitor; And A fifth step of generating the second boosted voltage by adding the Y voltage charged to the second capacitor and the Y voltage charged to the first capacitor; Charge pumping method comprising a. The method of claim 12, The first step and the second step are alternately performed; Charge pumping method, characterized in that the fourth step and the fifth step are performed alternately. The method of claim 12, The X voltage is the level of the input voltage * 1/2, And the Y voltage is a level of an input voltage. The method according to any one of claims 1, 6, 9 or 12, The charge pumping method, Discharging the first boosted voltage or the second boosted voltage when the first boosted voltage or the second boosted voltage is higher than a target level. Charge pumping method characterized in that it further comprises. In a charge pump circuit for boosting an input voltage to generate a boosted voltage, A plurality of capacitors for boost operation; A switch controller configured to generate a plurality of switch control signals in response to the boost ratio information; And A plurality of switches for controlling the plurality of capacitors in response to the plurality of switch control signals, When the boosting magnification information is changed during operation of the charge pump circuit, the switch control unit has a change section for changing a voltage charged in at least one or more of the plurality of capacitors before the boosting operation according to the changed boosting magnification. To control the switch control signal Charge pump circuit, characterized in that. The method of claim 16, The charge pump circuit, And a voltage limiting unit for discharging the boosted voltage when the boosted voltage is higher than a target voltage.

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