KR100973082B1 - Method and apparatus for packet shaper using dadule regulator - Google Patents

Method and apparatus for packet shaper using dadule regulator Download PDF

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KR100973082B1
KR100973082B1 KR1020080049837A KR20080049837A KR100973082B1 KR 100973082 B1 KR100973082 B1 KR 100973082B1 KR 1020080049837 A KR1020080049837 A KR 1020080049837A KR 20080049837 A KR20080049837 A KR 20080049837A KR 100973082 B1 KR100973082 B1 KR 100973082B1
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South Korea
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regulator
method
bag
packet shaper
value
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KR1020080049837A
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Korean (ko)
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KR20090123662A (en
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박부식
신대교
윤종호
임기택
정한균
최종찬
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전자부품연구원
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic regulation in packet switching networks
    • H04L47/10Flow control or congestion control
    • H04L47/22Traffic shaping
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic regulation in packet switching networks
    • H04L47/10Flow control or congestion control
    • H04L47/21Flow control or congestion control using leaky bucket
    • H04L47/215Token bucket
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic regulation in packet switching networks
    • H04L47/10Flow control or congestion control
    • H04L47/35Embedded flow control information in regular packets, e.g. Piggybacking

Abstract

The present invention relates to a packet shaper device and a method using a double regulator, in a packet shaper device of an avionic full duplex switched ethernet system (AFDX) for avionics, each separate virtual from a plurality of subsystems When a frame is received after the link VL is allocated, the first regulator adjusts to have a certain level of concentration according to a primarily set bandwidth allocation interval (BAG) value, and sets a frame output from the first regulator. By providing a device and method comprising a second regulator that adjusts back to a bandwidth allocation interval (BAG) value with a certain degree of concentration, the bottleneck by further adjusting the data frame that occurs using the two regulators twice The effect of preventing the phenomenon and minimizing dropped frames is obtained.
Ethernet, AFDX, Regulators, Packet Shapers, Token Buckets

Description

Packet shaper apparatus and method using a double regulator {Method and apparatus for packet shaper using dadule regulator}

The present invention relates to a packet shaper device and method using a double regulator, in particular to adjust the concentration of the data frame (burstness) in the Avionic Full Duplex Switched Ethernet system (AFDX) for avionics to prevent bottlenecks An apparatus and method are provided.

In general, a network structure for providing a continuous connection to a network failure is called a fault-tolerant structure, and for this purpose, a switch or a link is added as a double or a triple. In existing Ethernet networks connected by switches, this fault tolerance feature is established by establishing a forward link between terminals and switches using the ARINC 664 standard Avionic Full Duplex Switched Ethernet system (AFDX). Provided.

1 is a block diagram illustrating a fault tolerance procedure in the conventional AFDX.

Referring to FIG. 1, the key to fault tolerance in AFDX is data integrity and fault tolerance support using two or three links. In other words, unlike LANs used in general office environments, it supports fault tolerance at Layer 2, which simultaneously transmits one frame on two or more links and compares and detects them on the receiving side. In particular, the second layer sequence number region is added to the Ethernet frame for redundancy checking of received frames.

In addition, the receiving terminal receiving a duplicate frame from the switch network of A and B uses the "First valid message Wins" policy, which is the integrity checker first among the frames having the same sequence number received through the A or B network It accepts a frame that passes the FCS check and discards a frame received later.

As such, AFDX uses two Ethernet links to enable continuous transmission of data even in the event of a terminal or link failure.

In addition, in the above-described conventional AFDX technology, as shown in FIG. 2, a plurality of virtual links (VLs) are virtually provided on a single physical medium to provide one or more virtual links (VLs) to an application program. Although this channel is allocated to provide a communication channel, the virtual link (VL) has an allocated bandwidth and thus cannot use more than the predetermined bandwidth, and the terminal must also transmit according to the predetermined bandwidth.

That is, the transmission should be performed in compliance with the bandwidth allocation by the bandwidth allocation gap (BAG) that determines the transmission period. Done.

However, one terminal has several subsystems, each of which is assigned a separate virtual link (VL), when the interval of the virtual link (VL) is a common multiple time, that is, as shown in FIG. When the transmission time overlaps and bursts occur, the receiving terminal receiving the frame causes a bottleneck if the number of buffers prepared for the processing is not sufficient. There was a problem that a large number of buffers should be prepared at all times in order to prevent them.

In addition, when the capacity of the buffer exceeds the limit there is a problem that there is a frame discarded in the buffer.

SUMMARY OF THE INVENTION An object of the present invention is to solve the conventional problems as described above, and to provide an apparatus and method for preventing bottlenecks by further adjusting data frames generated by using two regulators twice. There is this.

It is another object of the present invention to provide an apparatus and method for minimizing dropped frames through adjustment of frame capacity.

In order to achieve the above object, a first feature of the present invention is a packet shaper apparatus of an avionic full duplex switched ethernet system (AFDX) for avionics, wherein each separate virtual link from a plurality of subsystems is provided. When the frame is received after the VL is allocated, the first regulator adjusts to have a certain level of concentration according to the primarily set bandwidth allocation interval (BAG) value, and the bandwidth that sets the frame output from the first regulator. It characterized in that it comprises a second regulator for adjusting to have a certain level of concentration back to the allocation interval (BAG) value.

A second aspect of the invention is that in the first aspect, the first and second regulators comprise a buffer of token bucket structure for storing data frames.

According to a second aspect of the present invention, in the second aspect, the first and second regulators transmit a token generated when a token equal to the size of a frame is generated in a bucket.

According to a fourth aspect of the present invention, in the first aspect 9, a bandwidth is reserved in advance when the virtual link (VL) is allocated.

A fifth aspect of the invention is that in the first aspect, the bandwidth is determined from the largest frame size and BAG value that can be transmitted in the virtual link (VL).

A sixth feature of the present invention is the first feature, wherein the first regulator sets the BAG value in the range of 1 to 128 msec.

According to a seventh aspect of the present invention, in the first aspect, the second regulator is set to be equal to or less than the BAG value set in the first regulator.

An eighth aspect of the present invention is the first aspect, wherein the first regulator is composed of a plurality of one-to-one correspondence with the plurality of subsystems, so that the second regulator can correspond to the plurality of first regulators It consists of at least one number.

A ninth aspect of the present invention is a packet shaper method of an avionic full duplex switched ethernet system (AFDX) for avionics, wherein a bandwidth allocation interval set primarily when a data frame is received from a transmitting terminal. The first adjustment step of adjusting the concentration to have a certain level of concentration according to the value (BAG), and adjusts the frame output from the first adjustment step to have a certain level of concentration again with the bandwidth allocation interval (BAG) value set A second adjustment step.

A tenth feature of the present invention is the ninth feature, wherein the first adjustment step is to set a BAG value in the range of 1 to 128 msec.

An eleventh aspect of the present invention is the ninth aspect, wherein the second adjustment step is set to be equal to or less than the BAG value set in the first adjustment step.

A twelfth feature of the present invention is the eighth feature, wherein the first and second adjustment steps are to transmit the frame when a token equal to the size of the frame is generated in the bucket.

A thirteenth aspect of the present invention is the ninth aspect, further comprising pre-assigning each separate virtual link (VL) from the plurality of subsystems.

A fourteenth aspect of the present invention is the thirteenth aspect of the present invention further comprising the step of reserving bandwidth in advance when allocating the virtual link (VL).

A fifteenth feature of the present invention is the feature of the fourteenth feature, wherein the bandwidth is determined from the largest frame size and BAG value that can be transmitted in the virtual link (VL).

As described above, according to the packet shaper apparatus and method using the double regulator according to the present invention, by adjusting the data frame generated by using two regulators in two more times to prevent bottlenecks, minimize the discarded frame Effect is obtained.

Briefly, the present invention comprises a transmitting terminal and a receiving terminal having a plurality of regulators.

In particular, in order to prevent bottlenecks occurring at the receiving terminal, the plurality of regulators are re-adjusted to have a certain level of concentration according to a bandwidth allocation gap (BAG) that determines a transmission period, thereby eliminating the bottleneck. To minimize dropped frames.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. In addition, in describing this invention, the same code | symbol is attached | subjected and the repeated description is abbreviate | omitted.

4 is a block diagram showing a configuration of a packet shaper device using a double regulator in AFDX according to an embodiment of the present invention, and FIG. 6 is a block diagram showing a structure of a double regulator according to an embodiment of the present invention.

As shown in FIGS. 4 and 6, when frames are received from the plurality of subsystems 100a to 100n, a first adjustment is performed to have a certain level of concentration according to a bandwidth allocation interval (BAG) value set first. Receiving including a regulator (210a ~ 210n), the second regulator 220 for adjusting the frame output from the first regulator 210 to have a certain level of concentration again to the bandwidth allocation interval (BAG) value set It consists of the side terminal 200.

The first and second regulators 210a to 210n and 220 include buffers 211 and 221 having a token bucket structure for storing data frames, and when a token equal to a frame size is generated in the bucket, send.

The first regulators 210a to 210n are configured in plural to correspond one-to-one with the plurality of subsystems, but the second regulator 220 may at least correspond to the plurality of first regulators 210a to 210n. It consists of one or more numbers.

Referring to the accompanying drawings, the operation of the embodiment according to the present invention configured as described above is as follows.

5 is a flowchart illustrating a packet shaper process using a double regulator according to an embodiment of the present invention.

Referring to FIG. 5, first, each separate virtual link (VL) is pre-allocated from a plurality of subsystems (A). In this case, bandwidth is reserved in advance when the virtual link (VL) is allocated (S100 and S200).

That is, the bandwidth is determined from the largest frame size (L max ) and the BAG value that can be transmitted in two parameters, the virtual link (VL) as shown in [Equation 1].

Figure 112008038316294-pat00001

After that, when the data frame is received from the transmitting terminal, the control unit adjusts to have a certain level of concentration according to the primary bandwidth allocation interval (BAG) value. At this time, it is set in the BAG value of the range of 1 ~ 128 msec (S300).

That is, the token is entered according to the bandwidth allocation interval (BAG) value set in the bucket of size C, and the data frames received from the transmitting node are stored in the buffers 211a to 211n. The frames in the buffers 211a to 211n are transmitted if there are tokens in the bucket, and if there are frames that do not receive tokens, they are waited and transmitted when the tokens are generated. When the bucket is full of tokens, subsequent incoming tokens are discarded. If there are n tokens in the bucket, n packets are sent. In other words, to transfer a frame of size n bytes, the token of n bytes must be in the bucket.

Subsequently, the first adjusted frame is adjusted to have a certain level of concentration again with a set bandwidth allocation interval (BAG) value, wherein the set BAG value is set to be equal to or less than the set first BAG value. Adjust to the BAG value (S400).

For example, as shown in FIG. 6, when the BAG is set to 2, 4, and 8 ms, and the frame size L max is set to 1518, 1024, and 1518, respectively, in the first regulators 210a to 210n, respectively. Since the minimum BAG values of the first regulators 210a to 210n are 2 ms and the maximum size is 1518, the second regulator 220 has a BAG value of 1 ms and a frame size L max of 1518, respectively. Set it.

7 is a graph illustrating input and output results of a frame passing through a double regulator according to an embodiment of the present invention, and FIGS. 8A and 8B are graphs comparing the traffic load loss rate and the loss rate according to the size of a buffer according to an embodiment of the present invention. to be.

As shown in FIG. 7, even when transmission time points are overlapped and bursts occur, it can be seen that there is no discarded frame. Also, as shown in FIGS. 8A and 8B, a double regulator is output as a result of comparison. It can be seen that the loss of the traffic load and the size of the buffer are significantly minimized.

As mentioned above, although the invention made by this inventor was demonstrated concretely according to the said Example, this invention is not limited to the said Example, Of course, a various change is possible in the range which does not deviate from the summary.

1 is a block diagram showing a fault tolerance procedure in the conventional AFDX.

Figure 2 is a simplified view of the configuration of the AFDX using a conventional virtual link.

3 is a view illustrating a bottleneck occurring when overlapping transmission time points in a conventional AFDX.

Figure 4 is a block diagram showing the configuration of a packet shaper device using a double regulator in AFDX according to an embodiment of the present invention.

5 is a flowchart illustrating a packet shaper process using a double regulator according to an embodiment of the present invention.

Figure 6 is a schematic diagram showing the structure of a double regulator according to an embodiment of the present invention.

7 is a view showing input and output results of a frame passing through a double regulator according to an embodiment of the present invention.

8A and 8B are graphs comparing the traffic load loss rate and the loss rate according to the size of the buffer according to an embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

100: transmitting terminal 200: receiving terminal

210a to 210n: first regulator 220: second regulator

Claims (15)

  1. In the packet shaper device of the avionic full duplex switched ethernet system (AFDX) for avionics,
    A first regulator configured to adjust an output of the data frame according to a bandwidth allocation interval (BAG) value that is primarily set when a data frame is received after each separate virtual link (VL) is allocated from a plurality of subsystems,
    And a second regulator for adjusting the output of the data frame to the bandwidth allocation interval (BAG) value of the data frame output from the first regulator.
  2. The method of claim 1,
    The first and second regulator packet shaper device using a double regulator, characterized in that it comprises a buffer of the token bucket structure for storing a data frame.
  3. The method of claim 2,
    The first regulator and the second regulator packet shaper apparatus using a double regulator, characterized in that for transmitting when a token (token) equal to the size of the frame is generated in the bucket (bucket).
  4. The method of claim 1,
    Packet shaper device using a double regulator, characterized in that for reserving bandwidth in advance when the virtual link (VL) allocation.
  5. The method of claim 1,
    The bandwidth is determined from the size and BAG value of the largest data frame that can be transmitted on a virtual link (VL),
    Figure 112010017686520-pat00011
    The bandwidth is determined by, wherein Lmax is the size of the largest data frame, the BAG (msec) is a packet shaper device using a double regulator, characterized in that the BAG value.
  6. The method of claim 1,
    The first regulator is a packet shaper device using a double regulator, characterized in that for setting the BAG value in the range of 1 ~ 128 msec.
  7. The method of claim 1,
    The second regulator is a packet shaper device using a double regulator, characterized in that for setting the BAG value less than the BAG value set in the first regulator.
  8. The method of claim 1,
    The first regulator is composed of a plurality of one-to-one correspondence with the plurality of subsystems,
    The second regulator is a packet shaper device using a double regulator, characterized in that configured to at least one or more so as to correspond to the plurality of first regulators.
  9. In the packet shaper method of the avionic full duplex switched ethernet system (AFDX) for avionics,
    A first adjustment step of adjusting an output of the data frame according to a bandwidth allocation interval (BAG) value set first when a data frame is received from a transmitting terminal;
    And a second adjusting step of adjusting the output of the data frame again to a bandwidth allocation interval (BAG) value of the frame output in the first adjusting step.
  10. 10. The method of claim 9,
    The first adjustment step is a packet shaper method using a double regulator, characterized in that for setting the BAG value in the range of 1 ~ 128 msec.
  11. 10. The method of claim 9,
    The second adjusting step is a packet shaper method using a double regulator, characterized in that the setting below the BAG value set in the first adjusting step.
  12. 10. The method of claim 9,
    The first and second adjustment step is a packet shaper method using a double regulator, characterized in that for transmitting a frame when a token equal to the size of the frame is generated in the bucket (bucket).
  13. 10. The method of claim 9,
    The method of claim 1, further comprising pre-allocating a separate virtual link (VL) from a plurality of subsystems.
  14. The method of claim 13,
    And reserving a bandwidth in advance when allocating the virtual link (VL).
  15. The method of claim 14,
    The bandwidth is determined from the largest frame size and BAG value that can be transmitted on the virtual link (VL),
    Figure 112010017686520-pat00012
    The bandwidth is determined by, wherein Lmax is the size of the largest data frame, and BAG (msec) is the BAG value, characterized in that the packet shaper method using a double regulator.
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CN101924713B (en) * 2010-09-07 2012-05-23 北京航空航天大学 Real-time assurance switched interconnection buffer capacity determining method
KR101434422B1 (en) * 2013-07-24 2014-08-26 전자부품연구원 Method for improving network by modulating virtual link and the system thereof

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020036984A1 (en) 2000-06-02 2002-03-28 Fabio Chiussi Method and apparatus for guaranteeing data transfer rates and enforcing conformance with traffic profiles in a packet network
KR100566996B1 (en) 2004-11-12 2006-03-27 엘지전자 주식회사 Apparatus and method for packet data shaping of ler in mpls network
KR20060060390A (en) * 2004-11-30 2006-06-05 삼성전자주식회사 System and method for controlling a traffic scheduling
US7289447B2 (en) 2003-10-21 2007-10-30 Comcast Cable Holdings, Llc Method and packet-level device for traffic regulation in a data network

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020036984A1 (en) 2000-06-02 2002-03-28 Fabio Chiussi Method and apparatus for guaranteeing data transfer rates and enforcing conformance with traffic profiles in a packet network
US7289447B2 (en) 2003-10-21 2007-10-30 Comcast Cable Holdings, Llc Method and packet-level device for traffic regulation in a data network
KR100566996B1 (en) 2004-11-12 2006-03-27 엘지전자 주식회사 Apparatus and method for packet data shaping of ler in mpls network
KR20060060390A (en) * 2004-11-30 2006-06-05 삼성전자주식회사 System and method for controlling a traffic scheduling

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