KR100964719B1 - A SAW package having a wafer level sealing part and a manufacturing method therefor - Google Patents

Abstract

The present invention relates to a saw package having a wafer level sealing portion and a manufacturing method thereof, in order to miniaturize the saw device, to seal it from the outside to protect it, and to minimize the influence of the reflected wave generated during operation, the saw package according to the present invention, An Inter Digital Transduce (IDT) pattern formed on the surface of the device substrate; A sealing part covering the IDT pattern; At least two inner solder parts electrically connected to the IDT pattern and spaced apart from the sealing part by a predetermined distance; An outer solder part formed in a closed curve surrounding the IDT pattern and the inner solder part at a position spaced apart from the IDT pattern and the inner solder part by a predetermined distance; A device substrate electrically connected to the inner solder portion and the outer solder portion; And a cap shape having an open bottom portion as a whole, and coupled along an outer circumference of the device substrate to accommodate the IDT pattern, the sealing portion, the inner solder portion, and the outer solder portion in an inner space, and a plurality of reflected wave absorbing bars are defined in the inner space. And a package cover protruding at intervals.

Wafer, Saw, DFR, Sealing Part, Reflective Wave, Sealed

Description

A saw package having a wafer level sealing part and a method for manufacturing the same {A SAW package having a wafer level sealing part and a manufacturing method therefor}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a saw package having a wafer level sealing portion and a method of manufacturing the same, and more particularly, to a technique for miniaturizing a saw device, sealing it from the outside, protecting it, and minimizing the influence of reflected waves generated during operation.

With the development of the telecommunications industry, wireless communication products are becoming smaller, higher quality and more versatile. In accordance with this trend, miniaturization and multifunctionality are also required for components used in wireless communication products such as filters and duplexers. As an example of such a component, a surface acoustic wave (SAW) device (surface acoustic wave element) is used. Particularly, when used in a radio frequency (RF) part of a cellular phone or the like, in order to improve reception sensitivity, reduce power consumption, and sufficiently suppress a noise level in the vicinity of a pass band, it has a thin thickness and low loss. There is a need for a SAW device.

Hereinafter, a saw device according to the related art will be described with reference to FIG. 1.

1 is a cross-sectional view of a saw device according to the prior art.

As shown in FIG. 1, the saw device 10 is formed by forming at least one IDT (Inter Digital Transducer) electrode 12 and input / output electrodes 13 and 14 on the piezoelectric substrate 11. The IDT electrode 12 is formed on the piezoelectric substrate 11 with two opposing electrodes in the form of combs.

In the saw device 10 having such a configuration, when an electrical signal is applied through the input electrode 13, piezoelectric distortion due to the piezoelectric effect is generated by the overlapping length between the IDT electrodes 12, and the piezoelectric plate is caused by the piezoelectric distortion. The surface acoustic wave transmitted to (11) is generated, and is converted into an electrical signal through the output electrode 14 and output. At this time, only the electric signal of the predetermined frequency band determined by various factors such as the interval, the electrode width or the length of the IDT electrode 12 is filtered.

The SAW device 10 is flip-chip bonded through a bump ball 26 bonded to the input / output electrodes 13 and 14 on an insulating substrate 24 having connection pins (not shown) formed on the bottom thereof. flip chip bonding) to realize electrical connection.

However, the conventional SAW device 10 has a limitation in miniaturization and low cost, and sealing of the SAW device 10 in the process of flip chip bonding and mounting through the bump ball 26. It is difficult to implement the structure.

In order to solve this problem, a method of implementing and miniaturizing the sealing of a SAW device using two wafers of a cap wafer and a device wafer at the wafer level has emerged. The disadvantage is the high process cost for machining and joining.

On the other hand, the saw device has a problem that the surface acoustic wave is reflected during operation. Hereinafter, this will be described with reference to FIGS. 2 and 3.

2 is a perspective view showing the structure of a saw package according to the prior art, Figure 3 is a view for explaining the effect of the reflected wave in FIG.

As shown, the saw package 50 is the saw device 10 is connected to the connecting pin 40 of the body 35 through the wire 30, the cover 45 is covered on the top of the body 35 Has a configuration.

The saw package 50 having such a configuration causes a problem that noise is generated due to a reflected wave generated during the operation of the saw device 10. In order to solve this problem, a technique for applying a sound absorbing material to both ends or the surface of the cover 45 has been proposed, but in this case, the manufacturing process is complicated to increase the manufacturing cost, prolong the manufacturing time, causing a package failure A problem arises.

The present invention has been made to solve the problems according to the prior art described above, and an object of the present invention is to provide a saw package capable of sealing with only one wafer.

Another object of the present invention is to provide a saw package capable of precise operation by removing reflected waves generated during operation of the saw device.

In order to achieve the above object, the saw package having a wafer level sealing portion according to an embodiment of the present invention, the IDT (Inter Digital Transduce) pattern formed on the surface of the device substrate; A sealing part covering the IDT pattern; At least two inner solder parts electrically connected to the IDT pattern and spaced apart from the sealing part by a predetermined distance; An outer solder part formed in a closed curve surrounding the IDT pattern and the inner solder part at a position spaced apart from the IDT pattern and the inner solder part by a predetermined distance; A device substrate electrically connected to the inner solder portion and the outer solder portion; And a cap shape having an open bottom portion as a whole, and coupled along an outer circumference of the device substrate to accommodate the IDT pattern, the sealing portion, the inner solder portion, and the outer solder portion in an inner space, and a plurality of reflected wave absorbing bars are defined in the inner space. And a package cover protruding at intervals.

In the present exemplary embodiment, a protective layer formed of silicon oxide or silicon nitride and positioned between the IDT pattern and the sealing part to cover the IDT pattern may be further included.

In the present embodiment, the sealing part may be formed of a dry film resist (DFR).

In the present embodiment, the sealing portion may be formed in a cup shape consisting of a wall surface portion formed along the upper outer periphery of the IDT pattern, and an upper plate portion covering the upper portion of the wall surface portion.

In the present embodiment, the inner solder portion and the outer solder portion, each having an inner solder UBM (solder Under-Bump Metallization) and the outer solder UBM, a solder bump is seated on top of the inner solder UBM, the outer solder UBM The solder well may be mounted on the upper portion of the solder well.

In order to achieve the above object, a method of manufacturing a saw package having a wafer level sealing portion according to another embodiment of the present invention, forming a protective film covering an IDT pattern formed on a wafer for a device substrate; Forming a solder portion on the passivation layer and a wafer for a device substrate; Forming a sealing part on the passivation layer; And a cap shape having an open bottom portion as a whole, and coupled along an outer circumference of the device substrate to accommodate the IDT pattern, the sealing portion, and the solder portion in an inner space, and a plurality of reflected wave absorption bars protruding at predetermined intervals in the inner space. And engaging the cover.

In the present embodiment, the forming of the passivation layer may form a passivation layer using silicon oxide or silicon nitride.

In the present embodiment, the forming of the sealing part may form a sealing part using a DFR material.

In the present embodiment, the forming of the sealing part may include: bonding a first DFR to the protective film; Patterning the first DRF to form a wall portion along an upper periphery of the IDT pattern; Bonding a second DFR to cover an upper portion of the wall portion; And patterning the second DFR to form an upper plate portion covering only an upper portion of the wall surface portion.

In the present embodiment, the forming of the solder part may include: forming an inner solder part in at least two or more regions spaced apart from the sealing part by a predetermined distance; And forming an outer solder part formed in a closed curve surrounding the IDT pattern and the inner solder part at a position spaced apart from the IDT pattern and the inner solder part by a predetermined distance.

In the present embodiment, the forming of the inner solder portion may include: forming an inner solder UBM electrically connected to the IDT pattern; And mounting a solder bump on an upper portion of the inner solder UBM.

In the present embodiment, the forming of the outer solder portion may include: forming an outer solder UBM in the form of a closed curve surrounding the sealing portion at a position spaced apart from the inner solder portion by a predetermined distance; And mounting a solder well on an upper portion of the outer solder UBM.

According to the present invention, it is possible to provide a saw package that can be sealed by forming a sealing portion in an IDT pattern without using a separate cap wafer.

In addition, according to the present invention it is possible to provide a saw package capable of precise operation by removing the reflected wave by the reflected wave absorption bar formed on the package cover.

In the following, embodiments of the present invention are described with reference to the accompanying drawings.

In the following description of the present invention, if it is determined that detailed descriptions of related known functions or configurations may unnecessarily obscure the subject matter of the present invention, the detailed description will be omitted. In addition, the terms to be described later are terms set in consideration of functions in the present invention, and these terms may vary according to the intention or custom of the producer producing the product, and the definition of the terms should be made based on the contents throughout the present specification.

(Saw package)

First, a saw package having a wafer level sealing part according to the present embodiment will be described with reference to FIGS. 4 to 13.

Figure 4 is a plan view of a saw package according to an embodiment of the present invention, Figures 5 to 12 shows a manufacturing process of the saw package according to an embodiment of the present invention, Figure 13 is a saw according to an embodiment of the present invention A diagram for explaining the influence of reflected waves in a package.

As shown, the saw package 100 having a wafer level sealing portion according to the present embodiment (for convenience of description below), unless otherwise stated, a 'saw package having a wafer level sealing portion' is simply referred to as a 'saw package'. In FIG. 1, an inter digital transduce (IDT) pattern 120 is formed on the surface of the device substrate 110.

The passivation layer 130 is positioned between the IDT pattern 120 and the sealing part 155 to cover the IDT pattern 120. The passivation layer 130 protects the IDT pattern 120 from external impact or impurities, and is formed of silicon oxide (SiO ₂ ) or silicon nitride (Si ₃ N ₄ ) to prevent corrosion. The protective film 130 preferably has a thickness of 10 to 200 kPa.

The sealing part 155 covers the IDT pattern 120 and the passivation layer 130. The sealing unit 155 is formed of a resist material, and particularly preferably formed of a dry film resist (DFR). The sealing part 155 is formed of a wall portion and an upper plate portion, the wall portion is formed along the upper outer periphery of the IDT pattern 120, the upper plate portion is formed in a cup shape covering the upper portion of the wall portion. The sealing part 155 seals the IDT pattern 120 to protect it from impurities.

At least two inner solder parts are electrically connected to the IDT pattern 120 and are formed at positions spaced apart from the sealing part 155 by a predetermined interval. The inner solder part includes an inner solder UBM 141 and a solder bump 160 seated thereon. The inner solder portion is used for electrical signal transmission between the IDT pattern 120 and the device substrate 110.

The outer solder portion is formed in the form of a closed curve surrounding the IDT pattern 120 and the predetermined spaced apart from the inner solder portion. The outer solder portion is composed of an outer solder UBM 142 and a solder well 170 seated thereon. The outer solder portion is used to prevent the introduction of electromagnetic noise from the outside of the saw package. Although the outer solder portion is shown as having a rectangular shape in FIG. 4, it is noted that the present invention need not be particularly limited thereto and may have various closed curve shapes such as circular or elliptical.

The device substrate 110 is electrically connected to the inner solder portion. The connection pin 320 is formed under the device substrate 110 to perform signal transmission with an external printed circuit board.

The package cover 310 has a cap shape with an open bottom, and is coupled along the outer circumference of the device substrate 110 to accommodate the IDT pattern 120, the sealing part 155, the inner solder part, and the outer solder part in the inner space. do. In the inner space of the package cover 310, a plurality of reflected wave absorption bars 315 are formed to protrude at predetermined intervals. The reflected wave absorption bar 315 absorbs the reflected wave according to the operation of the saw device 100 to help precise operation. Although the reflected wave absorbing bar 315 is shown as having a bar shape in FIG. 13, it should be noted that the present invention is not particularly limited thereto, and may have a sawtooth shape as necessary.

(Production method)

Hereinafter, a method of manufacturing a saw package having a wafer level sealing part according to an exemplary embodiment of the present invention will be described.

A method of manufacturing a saw package having a wafer level sealing part according to the present embodiment (hereinafter, for convenience of description, unless otherwise stated, the method of manufacturing a saw package having a wafer level sealing part is referred to simply as a 'manufacturing method') This includes forming a protective film, forming a solder portion, forming a sealing portion, and bonding the package cover.

The forming of the passivation layer is a step of forming the passivation layer 130 covering the IDT pattern 120 formed on the wafer for the device substrate 110. The passivation layer 130 may be formed by, for example, forming a deposition layer through a PECVD (Plasma Enhanced Chemical Vapor Deposition) method, and etching the photoresist pattern on the deposition layer. The state at this time is shown in FIG.

The forming of the solder portion may include forming the solder portion on the passivation layer 130 and the wafer for the device substrate 110. Formation of the solder portion consists of forming an inner solder portion and forming an outer solder portion.

The forming of the inner solder portion may include forming the inner solder portion in at least two or more regions spaced apart from the sealing portion 155 by a predetermined interval. This step includes forming an inner solder UBM 141 electrically connected to the IDT pattern 120, and seating the solder bumps 160 on the inner solder UBM 141. The inner solder UBM 141 may be formed by depositing and patterning a metal such as Ni, Cu, or Ag through a PVD method. The state at this time is shown in FIG. The solder bumps 160 are formed higher than the height of the sealing part 155 to prevent pressure or impact from being applied to the sealing part 155 during the packaging process. The state at this time is shown in FIG.

The forming of the outer solder portion may include forming an outer solder portion formed in a closed curve surrounding the IDT pattern 120 and the inner solder portion at a position spaced a predetermined distance from the IDT pattern 120 and the inner solder portion. This step is to form a closed curve outer solder UBM 142 surrounding the sealing portion 155 and a predetermined spaced apart from the inner solder portion, and the solder well 170 on top of the outer solder UBM 142 ) Is settled. The outer solder UBM 142 may also be formed by the same method as the inner solder UBM 141. The state at this time is shown in FIG. In addition, like the solder bumps 160, the solder well 170 may be formed higher than the height of the sealing portion 155 to prevent pressure or impact on the sealing portion 155 during the packaging process. The state at this time is shown in FIG.

The forming of the sealing part is to form the sealing part 155 on the passivation layer 130. In the forming of the sealing unit, first, the first DFR 150 is bonded to the passivation layer 130. The state at this time is shown in FIG. After bonding the first DFR 150, the first DRF 150 forms the wall surface 151 along the upper circumference of the IDT pattern 120 through a patterning process including an exposure process and an etching process. The state at this time is shown in FIG. Thereafter, the second DFR 152 is bonded to cover the top of the wall portion 151. The state at this time is shown in FIG. Thereafter, the second DFR 152 is patterned to form an upper plate portion covering only the upper portion of the wall surface portion 151. The state at this time is shown in FIG. The saw device 100 manufactured through the above steps is coupled to the printed circuit board 200 using the solder bumps 160 and the solder wells 170. The state at this time is shown in FIG.

The step of combining the package cover has a cap shape with the bottom open as a whole, is coupled along the outer periphery of the device substrate 110 to accommodate the IDT pattern 120, the sealing portion 155 and the solder portion in the inner space, the inner space A plurality of reflection wave absorption bars 315 are coupled to the package cover 310 protruding at predetermined intervals. The state at this time is shown in FIG. Joining the package cover is preferably performed after the dicing of the saw device 100 is completed.

The embodiments of the present invention have been described above with reference to the accompanying drawings.

However, it is to be noted that the present invention is not particularly limited only to the above-described embodiments, and that various modifications and changes can be made by those skilled in the art within the spirit and spirit of the appended claims as necessary.

1 is a cross-sectional view of a saw device according to the prior art.

Figure 2 is a perspective view showing the structure of a saw package according to the prior art.

3 is a view for explaining the influence of the reflected wave in FIG.

4 is a top view of a saw package according to an embodiment of the present invention.

5 to 12 illustrate a manufacturing process of a saw package according to an embodiment of the present invention.

13 is a view for explaining the influence of the reflected wave in the saw package according to an embodiment of the present invention.

<Explanation of symbols for the main parts of the drawings>

100: saw device 110: device substrate

120: IDT pattern 130: protective film

155: sealing portion 160: solder bump

170: solderwell 300: saw package

310: package cover 315: reflected wave absorption bar

320: connection pin

Claims (12)

An Inter Digital Transduce (IDT) pattern formed on the surface of the device substrate; A sealing part covering the IDT pattern; At least two inner solder parts electrically connected to the IDT pattern and spaced apart from the sealing part by a predetermined distance; An outer solder part formed in a closed curve surrounding the IDT pattern and the inner solder part at a position spaced apart from the IDT pattern and the inner solder part by a predetermined distance; A device substrate electrically connected to the inner solder portion and the outer solder portion; And The cap has an overall open cap shape and is coupled along the outer circumference of the device substrate to accommodate the IDT pattern, the sealing portion, the inner solder portion, and the outer solder portion in an inner space, and a plurality of reflected wave absorbing bars are disposed in the inner space. A package cover formed to protrude into; A saw package having a wafer level sealing portion comprising a. The method of claim 1, A protective film formed of silicon oxide or silicon nitride and positioned between the IDT pattern and the sealing part to cover the IDT pattern; The saw package having a wafer level sealing portion further comprises. The method according to claim 1 or 2, The saw package having a wafer level sealing portion, characterized in that the sealing portion is formed of a dry film resist (DFR). The method according to claim 1 or 2, And the sealing portion is formed in a cup shape comprising a wall surface portion formed along an upper circumference of the IDT pattern and an upper plate portion covering an upper portion of the wall surface portion. The method according to claim 1 or 2, The inner solder portion and the outer solder portion include inner solder UBM and outer solder UBM, respectively. A saw package having a wafer level sealing portion, wherein a solder bump is seated on an upper portion of the inner solder UBM, and a solder well is seated on an upper portion of the outer solder UBM. Forming a protective film covering an IDT pattern formed on the device substrate wafer; Forming a solder portion on the passivation layer and a wafer for a device substrate; Forming a sealing part on the passivation layer; And The cap has an open cap shape as a whole, and is coupled along the outer circumference of the wafer for the device substrate to accommodate the IDT pattern, the sealing portion, and the solder portion in an inner space, and a plurality of reflected wave absorbing bars protrude at predetermined intervals in the inner space. Combining the package cover; Method of manufacturing a saw package having a wafer level sealing portion comprising a. The method of claim 6, The forming of the passivation film may include forming a passivation film using silicon oxide or silicon nitride. The method of claim 6, wherein the forming of the solder portion: Forming an inner solder portion in at least two regions spaced apart from the sealing portion by a predetermined distance; And Forming an outer solder portion formed in a closed curve surrounding the IDT pattern and the inner solder portion at a position spaced a predetermined distance from the IDT pattern and the inner solder portion; Method of manufacturing a saw package having a wafer level sealing portion comprising a. The method of claim 8, wherein the forming of the inner solder portion: Forming an inner solder UBM electrically connected with the IDT pattern; And Mounting a solder bump on top of the inner solder UBM; Method of manufacturing a saw package having a wafer level sealing portion comprising a. The method of claim 8, wherein the forming of the outer solder portion: Forming an outer solder UBM having a closed curve surrounding the sealing portion and the inner solder portion at a predetermined distance from the sealing portion; And Mounting a solder well on top of the outer solder UBM; Method of manufacturing a saw package having a wafer level sealing portion comprising a. The method of claim 6, The forming of the sealing part is a method of manufacturing a saw package having a wafer level sealing part, characterized in that for forming a sealing part using a DFR material. The method of claim 11, wherein the forming of the sealing part comprises: Bonding a first DFR to the protective film; Patterning the first DRF to form a wall portion along an upper periphery of the IDT pattern; Bonding a second DFR to cover an upper portion of the wall portion; And Patterning the second DFR to form an upper plate portion covering only an upper portion of the wall surface portion; Method of manufacturing a saw package having a wafer level sealing portion comprising a.

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