KR100949236B1 - Image Sensor and Method for Manufacturing Thereof - Google Patents

Image Sensor and Method for Manufacturing Thereof Download PDF

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Publication number
KR100949236B1
KR100949236B1 KR1020070135954A KR20070135954A KR100949236B1 KR 100949236 B1 KR100949236 B1 KR 100949236B1 KR 1020070135954 A KR1020070135954 A KR 1020070135954A KR 20070135954 A KR20070135954 A KR 20070135954A KR 100949236 B1 KR100949236 B1 KR 100949236B1
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South Korea
Prior art keywords
impurity region
formed
semiconductor substrate
photodiode
dielectric film
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KR1020070135954A
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Korean (ko)
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KR20090068081A (en
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박지환
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주식회사 동부하이텍
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Abstract

In another embodiment, an image sensor includes: a gate formed on a semiconductor substrate including an isolation layer; A photodiode including a first impurity region and a second impurity region formed in the semiconductor substrate; A dielectric film pattern formed on the photodiode of the semiconductor substrate; And a third impurity region formed in the dielectric layer pattern and the second impurity region.
In another embodiment, a method of manufacturing an image sensor includes: forming a gate on a semiconductor substrate including an isolation layer; Forming a photodiode including a first impurity region and a second impurity region in the semiconductor substrate; Forming a dielectric film on the semiconductor substrate including the gate and photodiode; And forming a third impurity region in the dielectric film and the second impurity region.
Deuterium ion implantation

Description

Image sensor and method for manufacturing thereof

Embodiments relate to an image sensor and a method of manufacturing the same.

An image sensor is a semiconductor device that converts an optical image into an electrical signal. The image sensor is largely a charge coupled device (CCD) and a complementary metal oxide silicon (CMOS) image sensor. (CIS).

In the CMOS image sensor, a photo diode and a MOS transistor are formed in a unit pixel to sequentially detect an electrical signal of each unit pixel in a switching manner to implement an image.

The embodiment provides an image sensor and a method of manufacturing the same, which can improve the characteristics of the device by minimizing dangling bonds generated between the silicon interface of the photodiode and the oxide film.

In another embodiment, an image sensor includes: a gate formed on a semiconductor substrate including an isolation layer; A photodiode including a first impurity region and a second impurity region formed in the semiconductor substrate; A dielectric film pattern formed on the photodiode of the semiconductor substrate; And a third impurity region formed in the dielectric layer pattern and the second impurity region.

In another embodiment, a method of manufacturing an image sensor includes: forming a gate on a semiconductor substrate including an isolation layer; Forming a photodiode including a first impurity region and a second impurity region in the semiconductor substrate; Forming a dielectric film on the semiconductor substrate including the gate and photodiode; And forming a third impurity region in the dielectric film and the second impurity region.

In an image sensor and a method of manufacturing the same, a deuterium ion layer is formed on a semiconductor substrate and a dielectric film, and deuterium ions are bonded to a dangling bond existing at an interface between the semiconductor substrate and the dielectric film.

That is, deuterium ions are bonded to dangling bonds present at the interface between the semiconductor substrate and the dielectric film, whereby electron-hole pairs are trapped in the dangling bonds formed on the semiconductor substrate. to prevent trapping.

Preventing trapping of electron-hole pairs in dangling bonds increases the saturation current of the photodiode and improves the lag characteristics to ensure the reliability of the image sensor Can improve.

In another embodiment, an image sensor includes: a gate formed on a semiconductor substrate including an isolation layer; A photodiode including a first impurity region and a second impurity region formed in the semiconductor substrate; A dielectric film pattern formed on the photodiode of the semiconductor substrate; And a third impurity region formed in the dielectric layer pattern and the second impurity region.

In another embodiment, a method of manufacturing an image sensor includes: forming a gate on a semiconductor substrate including an isolation layer; Forming a photodiode including a first impurity region and a second impurity region in the semiconductor substrate; Forming a dielectric film on the semiconductor substrate including the gate and photodiode; And forming a third impurity region in the dielectric film and the second impurity region.

Hereinafter, an image sensor and a method of manufacturing the same according to an embodiment will be described in detail with reference to the accompanying drawings.

In the description of the embodiments, where it is described as being formed "on / under" of each layer, it is understood that the phase is formed directly or indirectly through another layer. It includes everything.

In the description of the embodiment will be described with reference to the structure of the CMOS image sensor (CIS), the present invention is not limited to the CMOS image sensor, it is applicable to all image sensors, such as CCD image sensor.

5 is a cross-sectional view of an image sensor according to an embodiment.

As shown in FIG. 5, an image sensor according to the embodiment includes a gate 15 formed on a semiconductor substrate 10 including an isolation layer 5; A dielectric film pattern 23 formed on the semiconductor substrate 10; A photodiode 55 and a third impurity region 60 including a first impurity region 50 and a second impurity region 40 formed in the semiconductor substrate 10; And a fourth impurity region 30 formed in the dielectric layer pattern 23 and the second impurity region 40.

The semiconductor substrate 10 may have a low concentration p-type epi layer (not shown) on a high concentration p ++ type silicon substrate.

This may increase the depth of the depletion region of the photodiode due to the low concentration of p epitaxial layer, thereby increasing the photodiode's ability to collect photocharges.

In addition, when a high concentration of p ++ substrate is provided under the p-type epilayer, the charge is recombined before charge is diffused to neighboring unit pixels, thereby causing random diffusion of photocharges. This is because the reduction in the transfer function of the photocharge can be reduced.

The gate 15 may be formed of an oxide pattern and a polysilicon pattern, and the gate 15 may be a transfer gate.

In the present embodiment, the gate 15 is formed of polysilicon, but is not limited thereto. The gate 15 may be formed of a metal silicide layer.

The first impurity region 40 is formed of an n-type impurity, and the second impurity region 50 is formed of a p-type impurity, and includes the first impurity region 40 and the second impurity region 50. The photodiode 55 is formed.

The third impurity region 60 may be a floating diffusion region.

The dielectric film 20 is formed of an oxide-nitride-oxide (ONO) film in which an oxide film, a nitride film, and an oxide film are sequentially formed.

The oxide film formed on the dielectric film 20 may be formed of tetraethly orthosilicate (TEOS).

The fourth impurity region 30 may be formed of deuterium ions (D + ).

The fourth impurity region 30 is formed of a deuterium ion layer, and heavy hydrogen ions are bonded to a dangling bond existing at an interface between the semiconductor substrate 10 and the dielectric film 20.

That is, deuterium ions are bonded to dangling bonds present at the interface between the photodiode 55 and the dielectric film 20, thereby forming electron-hole pairs in dangling bonds formed on the semiconductor substrate 10. (electron-hole pair) can be prevented from being trapped.

Prevents trapping of electron-hole pairs in the dangling bonds, thereby increasing the saturation current of the photodiode 55 and improving lag characteristics The reliability of the sensor can be improved.

1 to 5 are cross-sectional views illustrating a method of manufacturing the image sensor according to the embodiment.

As shown in FIG. 1, the gate 15 is formed on the semiconductor substrate 10 on which the device isolation film 5 is formed, and the photodiode 55 is formed on the semiconductor substrate 10.

The semiconductor substrate 10 may have a low concentration p-type epi layer (not shown) on a high concentration p ++ type silicon substrate.

This may increase the depth of the depletion region of the photodiode due to the low concentration of p epitaxial layer, thereby increasing the photodiode's ability to collect photocharges.

In addition, having a high concentration of p ++ type substrate under the p type epitaxial layer causes random diffusion of photocharges because the charge is recombined before the charge is diffused to neighboring pixel units. This is because it is possible to reduce the change in the transfer function of the photocharges.

The isolation layer 5 may be formed by forming a trench in the semiconductor substrate 10 and then filling an insulating material.

The gate 15 may be formed by forming and patterning an oxide film and polysilicon on the semiconductor substrate 10.

The gate 15 may be a transfer gate.

In the present embodiment, the gate 15 is formed of polysilicon, but is not limited thereto. The gate 15 may be formed of a metal silicide layer.

The first photoresist pattern 100 is formed on the semiconductor substrate 10 on which the gate 15 is formed, and the first impurity region 40 is formed by performing a first ion implantation process and a second ion implantation process. And the second impurity region 50 is formed.

The first impurity region 40 is formed by performing the first ion implantation process with n-type impurities in the semiconductor substrate 10, and the second impurity region 50 is p-type in the semiconductor substrate 10. It is formed by performing a second ion implantation process with impurities.

In addition, the first photoresist pattern 100 may be removed by an ashing process.

Next, as shown in FIG. 2, the second photoresist pattern 200 is formed on the semiconductor substrate 10, and a third impurity region 60 is formed by performing a third ion implantation process.

The third impurity region 60 may be a floating diffusion region.

The second photoresist pattern 200 may be removed by an ashing process.

3, the dielectric film 20 is formed on the semiconductor substrate 10 on which the gate 15 is formed, and a fourth impurity region 30 is formed by performing a fourth ion implantation process. do.

The dielectric film 20 is formed of an oxide-nitride-oxide (ONO) film in which an oxide film, a nitride film, and an oxide film are sequentially formed on the semiconductor substrate 10 on which the gate 15 is formed.

The dielectric layer 20 may be formed by low pressure-chemical vapor deposition (LP-CVD), and the oxide layer formed on the dielectric layer 20 may be formed by tetraethly orthosilicate (TEOS).

The fourth ion implantation process is performed by injecting deuterium ions (D + ) at a concentration of 1 × 10 15 to 1 × 10 16 atoms / cm 2 at an energy of 0.1 to 10 KeV. The fourth impurity region 30 is formed by the process.

The fourth impurity region 30 may be formed in the dielectric layer 20 and the second impurity region 50.

After the fourth impurity region 30 is formed, a heat treatment process is performed by a rapid thermal annealing method.

The heat treatment process may be performed for 10 seconds at a temperature of 1000 ~ 1100 ℃ in a nitrogen (N 2 ) atmosphere.

At this time, through the heat treatment process, deuterium ions are bonded to dangling bonds present at the interface between the semiconductor substrate 10 and the dielectric film 20.

That is, electron-hole pairs are formed on dangling bonds formed on the semiconductor substrate 10 by coupling deuterium ions to dangling bonds present at the interface between the semiconductor substrate 10 and the dielectric film 20. (electron-hole pair) can be prevented from being trapped.

By preventing electron-hole pairs from trapping in the dangling bonds, the saturation current of the photodiode 55 is increased, and the lag characteristic is improved to provide an image. The reliability of the sensor can be improved.

As shown in FIG. 4, a third photoresist pattern 300 is formed on the dielectric film 20, and an etching process is performed on the dielectric film 20, thereby forming the dielectric film pattern 23 and Spacers 25 are formed on sidewalls of the gate 15.

The spacer 25 may be formed on the third impurity region 60.

The third photoresist pattern 300 may be removed by an ashing process.

Subsequently, as shown in FIG. 5, an interlayer insulating layer 35 may be formed on the semiconductor substrate 10.

Although not shown, a metal wiring layer, a color filter array, and a micro lens may be formed on the semiconductor substrate 10.

As described above, the image sensor and the method of manufacturing the same according to the embodiment form a deuterium ion layer on the semiconductor substrate and the dielectric film, and deuterium at the dangling bond present at the interface between the semiconductor substrate and the dielectric film. Ions are bound.

That is, deuterium ions are bonded to dangling bonds present at the interface between the semiconductor substrate and the dielectric film, whereby electron-hole pairs are trapped in the dangling bonds formed on the semiconductor substrate. to prevent trapping.

Preventing trapping of electron-hole pairs in dangling bonds increases the saturation current of the photodiode and improves the lag characteristics to ensure the reliability of the image sensor Can improve.

Although the above description has been made based on the embodiments, these are merely examples and are not intended to limit the present invention. Those skilled in the art to which the present invention pertains may not have been exemplified above without departing from the essential characteristics of the present embodiments. It will be appreciated that many variations and applications are possible. For example, each component specifically shown in the embodiment can be modified. And differences relating to these modifications and applications will have to be construed as being included in the scope of the invention defined in the appended claims.

1 to 5 are cross-sectional views of a method of manufacturing the image sensor according to the embodiment.

Claims (7)

  1. A gate formed on the semiconductor substrate including an isolation layer;
    A photodiode including a first impurity region and a second impurity region formed in the semiconductor substrate;
    A dielectric film pattern formed on the photodiode of the semiconductor substrate; And
    And a third impurity region formed in the dielectric film pattern and the second impurity region, and formed in a region where the dielectric film pattern and the second impurity region are in contact with each other.
  2. The method of claim 1,
    The third impurity region is an image sensor comprising a deuterium ion (D + ) layer.
  3. The method of claim 1,
    And the first impurity region is formed of an n-type impurity, and the second impurity region is formed of a p-type impurity.
  4. Forming a gate on a semiconductor substrate including an isolation layer;
    Forming a photodiode including a first impurity region and a second impurity region in the semiconductor substrate;
    Forming a dielectric film on the semiconductor substrate including the gate and photodiode; And
    Forming a third impurity region inside the dielectric film and the second impurity region,
    And the third impurity region is formed in a region where the dielectric layer pattern and the second impurity region are in contact with each other.
  5. The method of claim 4, wherein
    And the third impurity region is formed by ion implanting deuterium ions (D + ) into the semiconductor substrate.
  6. The method of claim 4, wherein
    And the first impurity region is formed by ion implantation of n-type impurities, and the second impurity region is formed by ion implantation of p-type impurities.
  7. The method of claim 4, wherein
    And forming a heat treatment process on the semiconductor substrate after forming the third impurity region.
KR1020070135954A 2007-12-22 2007-12-22 Image Sensor and Method for Manufacturing Thereof KR100949236B1 (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6838298B2 (en) 2001-11-16 2005-01-04 Hynix Semiconductor Inc. Method of manufacturing image sensor for reducing dark current
KR20060000900A (en) * 2004-06-30 2006-01-06 매그나칩 반도체 유한회사 Fabricating method of image sensor with deuterium annealing
KR100587394B1 (en) 2004-12-30 2006-05-30 동부일렉트로닉스 주식회사 Method for fabricating semiconductor device
KR20070035066A (en) * 2004-07-08 2007-03-29 마이크론 테크놀로지, 인크 For the image sensor structure and a method for deuteration

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6838298B2 (en) 2001-11-16 2005-01-04 Hynix Semiconductor Inc. Method of manufacturing image sensor for reducing dark current
KR20060000900A (en) * 2004-06-30 2006-01-06 매그나칩 반도체 유한회사 Fabricating method of image sensor with deuterium annealing
KR20070035066A (en) * 2004-07-08 2007-03-29 마이크론 테크놀로지, 인크 For the image sensor structure and a method for deuteration
KR100587394B1 (en) 2004-12-30 2006-05-30 동부일렉트로닉스 주식회사 Method for fabricating semiconductor device

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