KR100940395B1 - 반도체 집적 회로 장치 - Google Patents
반도체 집적 회로 장치 Download PDFInfo
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- KR100940395B1 KR100940395B1 KR1020020047023A KR20020047023A KR100940395B1 KR 100940395 B1 KR100940395 B1 KR 100940395B1 KR 1020020047023 A KR1020020047023 A KR 1020020047023A KR 20020047023 A KR20020047023 A KR 20020047023A KR 100940395 B1 KR100940395 B1 KR 100940395B1
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- Prior art keywords
- film
- insulating film
- wiring
- siof
- silicon oxide
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 94
- 239000010410 layer Substances 0.000 claims abstract description 46
- 238000000034 method Methods 0.000 claims abstract description 41
- 239000011229 interlayer Substances 0.000 claims abstract description 26
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 67
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 67
- 239000010949 copper Substances 0.000 claims description 60
- 239000000758 substrate Substances 0.000 claims description 46
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 45
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 41
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 41
- 229910052757 nitrogen Inorganic materials 0.000 claims description 22
- 230000015572 biosynthetic process Effects 0.000 claims description 15
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 claims description 11
- 239000011737 fluorine Substances 0.000 claims description 11
- 229910052731 fluorine Inorganic materials 0.000 claims description 11
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 7
- 229910052802 copper Inorganic materials 0.000 claims description 7
- 238000009413 insulation Methods 0.000 claims 5
- 229910020177 SiOF Inorganic materials 0.000 abstract description 81
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 43
- 229910052710 silicon Inorganic materials 0.000 abstract description 43
- 239000010703 silicon Substances 0.000 abstract description 43
- 238000001312 dry etching Methods 0.000 abstract description 27
- 238000005530 etching Methods 0.000 abstract description 24
- 238000000926 separation method Methods 0.000 abstract description 3
- 238000004519 manufacturing process Methods 0.000 description 41
- 239000007789 gas Substances 0.000 description 22
- 238000005498 polishing Methods 0.000 description 17
- 230000004888 barrier function Effects 0.000 description 16
- 229920002120 photoresistant polymer Polymers 0.000 description 16
- 239000000126 substance Substances 0.000 description 15
- 238000005229 chemical vapour deposition Methods 0.000 description 13
- 229910052751 metal Inorganic materials 0.000 description 12
- 239000002184 metal Substances 0.000 description 12
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 8
- 239000001301 oxygen Substances 0.000 description 8
- 229910052760 oxygen Inorganic materials 0.000 description 8
- 238000004544 sputter deposition Methods 0.000 description 8
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 6
- 238000009792 diffusion process Methods 0.000 description 5
- 230000008569 process Effects 0.000 description 5
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 5
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 5
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 4
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 4
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 4
- 229910052796 boron Inorganic materials 0.000 description 4
- 238000000151 deposition Methods 0.000 description 4
- 229910052698 phosphorus Inorganic materials 0.000 description 4
- 239000011574 phosphorus Substances 0.000 description 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 4
- 229920005591 polysilicon Polymers 0.000 description 4
- 229910000077 silane Inorganic materials 0.000 description 4
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 3
- 238000010438 heat treatment Methods 0.000 description 3
- 239000012535 impurity Substances 0.000 description 3
- 238000002955 isolation Methods 0.000 description 3
- 229910021332 silicide Inorganic materials 0.000 description 3
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 3
- PQDJYEQOELDLCP-UHFFFAOYSA-N trimethylsilane Chemical compound C[SiH](C)C PQDJYEQOELDLCP-UHFFFAOYSA-N 0.000 description 3
- GQPLMRYTRLFLPF-UHFFFAOYSA-N Nitrous Oxide Chemical compound [O-][N+]#N GQPLMRYTRLFLPF-UHFFFAOYSA-N 0.000 description 2
- 229910021529 ammonia Inorganic materials 0.000 description 2
- 229910052785 arsenic Inorganic materials 0.000 description 2
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 2
- 230000032798 delamination Effects 0.000 description 2
- PZPGRFITIJYNEJ-UHFFFAOYSA-N disilane Chemical compound [SiH3][SiH3] PZPGRFITIJYNEJ-UHFFFAOYSA-N 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000009713 electroplating Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- NBVXSUQYWXRMNV-UHFFFAOYSA-N fluoromethane Chemical compound FC NBVXSUQYWXRMNV-UHFFFAOYSA-N 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- VCJMYUPGQJHHFU-UHFFFAOYSA-N iron(3+);trinitrate Chemical compound [Fe+3].[O-][N+]([O-])=O.[O-][N+]([O-])=O.[O-][N+]([O-])=O VCJMYUPGQJHHFU-UHFFFAOYSA-N 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- QJGQUHMNIGDVPM-UHFFFAOYSA-N nitrogen group Chemical group [N] QJGQUHMNIGDVPM-UHFFFAOYSA-N 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 125000006850 spacer group Chemical group 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- 239000010937 tungsten Substances 0.000 description 2
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 description 1
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 description 1
- 229910008284 Si—F Inorganic materials 0.000 description 1
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 1
- 239000006061 abrasive grain Substances 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 239000007864 aqueous solution Substances 0.000 description 1
- 239000010941 cobalt Substances 0.000 description 1
- 229910017052 cobalt Inorganic materials 0.000 description 1
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- UBHZUDXTHNMNLD-UHFFFAOYSA-N dimethylsilane Chemical compound C[SiH2]C UBHZUDXTHNMNLD-UHFFFAOYSA-N 0.000 description 1
- 229910001873 dinitrogen Inorganic materials 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000001307 helium Substances 0.000 description 1
- 229910052734 helium Inorganic materials 0.000 description 1
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- UIUXUFNYAYAMOE-UHFFFAOYSA-N methylsilane Chemical compound [SiH3]C UIUXUFNYAYAMOE-UHFFFAOYSA-N 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 239000001272 nitrous oxide Substances 0.000 description 1
- 239000007800 oxidant agent Substances 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 239000005360 phosphosilicate glass Substances 0.000 description 1
- 230000002250 progressing effect Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 239000003870 refractory metal Substances 0.000 description 1
- 230000003252 repetitive effect Effects 0.000 description 1
- 239000002002 slurry Substances 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- CZDYPVPMEAXLPK-UHFFFAOYSA-N tetramethylsilane Chemical compound C[Si](C)(C)C CZDYPVPMEAXLPK-UHFFFAOYSA-N 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- -1 tungsten nitride Chemical class 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76834—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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Abstract
Description
Claims (17)
- 반도체 기판과, 상기 반도체 기판의 주면 위에 형성되고, 불소를 함유하는 산화 실리콘으로 이루어지는 제1 절연막과, 상기 제1 절연막의 배선 형성 영역에 형성된 제1 배선과, 상기 제1 절연막 및 상기 제1 배선의 각각의 상부에 형성된 질화실리콘으로 이루어지는 제2 절연막과, 상기 제1 절연막과 상기 제2 절연막 사이에 개재하는, 질소를 함유하는 산화 실리콘으로 이루어지는 제3 절연막을 갖는 것을 특징으로 하는 반도체 집적 회로 장치.
- 삭제
- 제1항에 있어서,상기 제3 절연막의 질소 농도는 5 atom% 이하인 것을 특징으로 하는 반도체 집적 회로 장치.
- 제1항에 있어서,상기 제3 절연막의 막 두께는 50㎚ 이상인 것을 특징으로 하는 반도체 집적 회로 장치.
- 제1항에 있어서,상기 제1 배선은 구리를 포함하는 도전층으로 이루어지는 것을 특징으로 하는 반도체 집적 회로 장치.
- 제1항에 있어서,상기 제2 절연막의 상부에는, 불소를 함유하는 산화 실리콘으로 이루어지는 제4 절연막과, 질화실리콘으로 이루어지는 제5 절연막과, 상기 제4 절연막과 상기 제5 절연막 사이에 개재하는, 질소를 함유하는 산화 실리콘으로 이루어지는 제6 절연막을 포함한 층간 절연막이 형성되고, 상기 층간 절연막의 배선 형성 영역에는 상기 제1 배선과 전기적으로 접속된 제2 배선이 형성되며, 상기 제2 배선과의 접속부를 제외한 영역의 상기 제1 배선의 표면은, 질화실리콘으로 이루어지는 상기 제2 절연막으로 덮여 있는 것을 특징으로 하는 반도체 집적 회로 장치.
- 제6항에 있어서,상기 제2 절연막과 상기 제4 절연막 사이에는, 질소를 함유하는 산화 실리콘으로 이루어지는 제8 절연막이 개재하고 있는 것을 특징으로 하는 반도체 집적 회로 장치.
- 반도체 기판과, 상기 반도체 기판의 주면 위에 형성되고, 불소를 함유하는 산화 실리콘으로 이루어지는 제1 절연막과, 상기 제1 절연막의 배선 형성 영역에 형성된 제1 배선과, 상기 제1 절연막 및 상기 제1 배선의 각각의 상부에 형성된 SiC 또는 SiCN으로 이루어지는 제2 절연막과, 상기 제1 절연막과 상기 제2 절연막 사이에 개재하는, 질소를 함유하는 산화 실리콘으로 이루어지는 제3 절연막을 갖는 것을 특징으로 하는 반도체 집적 회로 장치.
- 삭제
- 제8항에 있어서,상기 제3 절연막의 질소 농도는 5 atom% 이하인 것을 특징으로 하는 반도체 집적 회로 장치.
- 제8항에 있어서,상기 제3 절연막의 막 두께는 50㎚ 이상인 것을 특징으로 하는 반도체 집적 회로 장치.
- 제8항에 있어서,상기 제1 배선은 구리를 포함하는 도전층으로 이루어지는 것을 특징으로 하는 반도체 집적 회로 장치.
- 제8항에 있어서,상기 제2 절연막의 상부에는, 불소를 함유하는 산화 실리콘으로 이루어지는 제4 절연막과, SiC 또는 SiCN으로 이루어지는 제5 절연막과, 상기 제4 절연막과 상기 제5 절연막 사이에 개재하는, 질소를 함유하는 산화 실리콘으로 이루어지는 제6 절연막을 포함한 층간 절연막이 형성되고, 상기 층간 절연막의 배선 형성 영역에는, 상기 제1 배선과 전기적으로 접속된 제2 배선이 형성되며, 상기 제2 배선과의 접속부를 제외한 영역의 상기 제1 배선의 표면은, SiC 또는 SiCN으로 이루어지는 상기 제2 절연막으로 덮여 있는 것을 특징으로 하는 반도체 집적 회로 장치.
- 제13항에 있어서,상기 제2 절연막과 상기 제4 절연막 사이에는, SiC 또는 SiCN으로 이루어지는 제8 절연막이 개재하고 있는 것을 특징으로 하는 반도체 집적 회로 장치.
- 반도체 기판과, 상기 반도체 기판의 주면 위에 형성되고, 불소를 함유하는 산화 실리콘으로 이루어지는 제1 절연막과, 상기 제1 절연막의 배선 형성 영역에 형성된 제1 배선과, 상기 제1 절연막 및 상기 제1 배선의 각각의 상부에 형성된 SiC 또는 SiCN으로 이루어지는 제2 절연막과, 상기 제2 절연막의 상부에는, 불소를 함유하는 산화 실리콘으로 이루어지는 제3 절연막을 갖는 것을 특징으로 하는 반도체 집적 회로 장치.
- 제15항에 있어서,상기 제1 배선은 구리를 포함하는 도전층으로 이루어지는 것을 특징으로 하는 반도체 집적 회로 장치.
- 제15항에 있어서,상기 제3 절연막의 배선 형성 영역에는 상기 제1 배선과 전기적으로 접속된 제2 배선이 형성되며, 상기 제2 배선과 접속부를 제외한 영역의 상기 제1 배선의 표면은 상기 제2 절연막으로 덮여 있는 것을 특징으로 하는 반도체 집적 회로 장치.
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JP2001244152A JP4257051B2 (ja) | 2001-08-10 | 2001-08-10 | 半導体集積回路装置の製造方法 |
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Families Citing this family (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7271489B2 (en) | 2003-10-15 | 2007-09-18 | Megica Corporation | Post passivation interconnection schemes on top of the IC chips |
JP4606713B2 (ja) | 2002-10-17 | 2011-01-05 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
CN100352036C (zh) | 2002-10-17 | 2007-11-28 | 株式会社瑞萨科技 | 半导体器件及其制造方法 |
US6727560B1 (en) * | 2003-02-10 | 2004-04-27 | Advanced Micro Devices, Inc. | Engineered metal gate electrode |
JP4454242B2 (ja) | 2003-03-25 | 2010-04-21 | 株式会社ルネサステクノロジ | 半導体装置およびその製造方法 |
KR100539444B1 (ko) * | 2003-07-11 | 2005-12-27 | 매그나칩 반도체 유한회사 | 반도체 소자의 금속배선 형성방법 |
CN100499035C (zh) * | 2003-10-03 | 2009-06-10 | 株式会社半导体能源研究所 | 半导体器件的制造方法 |
KR100562675B1 (ko) * | 2003-11-04 | 2006-03-20 | 주식회사 하이닉스반도체 | 반도체 소자의 제조방법 |
US8552559B2 (en) * | 2004-07-29 | 2013-10-08 | Megica Corporation | Very thick metal interconnection scheme in IC chips |
US7605414B2 (en) * | 2005-01-24 | 2009-10-20 | Macronix International Co., Ltd. | MOS transistors having low-resistance salicide gates and a self-aligned contact between them |
US9202758B1 (en) * | 2005-04-19 | 2015-12-01 | Globalfoundries Inc. | Method for manufacturing a contact for a semiconductor component and related structure |
KR100695431B1 (ko) * | 2005-06-22 | 2007-03-15 | 주식회사 하이닉스반도체 | 반도체 소자의 컨택홀 형성방법 |
KR100790237B1 (ko) * | 2005-12-29 | 2008-01-02 | 매그나칩 반도체 유한회사 | 이미지 센서의 금속배선 형성방법 |
JP4865361B2 (ja) * | 2006-03-01 | 2012-02-01 | 株式会社日立ハイテクノロジーズ | ドライエッチング方法 |
US8022552B2 (en) * | 2006-06-27 | 2011-09-20 | Megica Corporation | Integrated circuit and method for fabricating the same |
KR100788362B1 (ko) * | 2006-12-19 | 2008-01-02 | 동부일렉트로닉스 주식회사 | 모스펫 소자 및 그 형성 방법 |
US8193636B2 (en) * | 2007-03-13 | 2012-06-05 | Megica Corporation | Chip assembly with interconnection by metal bump |
US8030733B1 (en) | 2007-05-22 | 2011-10-04 | National Semiconductor Corporation | Copper-compatible fuse target |
US7964934B1 (en) | 2007-05-22 | 2011-06-21 | National Semiconductor Corporation | Fuse target and method of forming the fuse target in a copper process flow |
KR100885895B1 (ko) * | 2007-07-02 | 2009-02-26 | 삼성전자주식회사 | 반도체 장치의 제조 방법 |
US8021975B2 (en) * | 2007-07-24 | 2011-09-20 | Tokyo Electron Limited | Plasma processing method for forming a film and an electronic component manufactured by the method |
US8197913B2 (en) * | 2007-07-25 | 2012-06-12 | Tokyo Electron Limited | Film forming method for a semiconductor |
US20090045515A1 (en) * | 2007-08-16 | 2009-02-19 | Texas Instruments Incorporated | Monitoring the magnetic properties of a metal layer during the manufacture of semiconductor devices |
US7709956B2 (en) * | 2008-09-15 | 2010-05-04 | National Semiconductor Corporation | Copper-topped interconnect structure that has thin and thick copper traces and method of forming the copper-topped interconnect structure |
US8093153B2 (en) * | 2009-12-18 | 2012-01-10 | United Microelectronics Corporation | Method of etching oxide layer and nitride layer |
JP5224012B2 (ja) * | 2010-12-08 | 2013-07-03 | 日新電機株式会社 | シリコン酸窒化膜の形成方法及び半導体デバイス |
KR102616489B1 (ko) | 2016-10-11 | 2023-12-20 | 삼성전자주식회사 | 반도체 장치 제조 방법 |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR19980025934A (ko) * | 1996-10-07 | 1998-07-15 | 양승택 | 절연막 형성 방법 |
KR20000002928A (ko) * | 1998-06-24 | 2000-01-15 | 윤종용 | 반도체장치의 금속배선 구조 및 그 제조방법 |
KR20000076923A (ko) * | 1999-03-23 | 2000-12-26 | 가네꼬 히사시 | 반도체 장치 및 그 제조 방법 |
JP2001085517A (ja) * | 1999-09-13 | 2001-03-30 | Sony Corp | 半導体装置およびその製造方法 |
KR20010033959A (ko) * | 1998-01-10 | 2001-04-25 | 히가시 데쓰로 | 불소 첨가 탄소막으로 이루어지는 절연막을 구비하는반도체 디바이스 및 그 제조 방법 |
KR20030038736A (ko) * | 2000-09-11 | 2003-05-16 | 동경 엘렉트론 주식회사 | 반도체 소자 및 이의 제조 방법 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH09213699A (ja) * | 1996-02-06 | 1997-08-15 | Tokyo Electron Ltd | 多層配線半導体装置の配線形成方法 |
US6252303B1 (en) * | 1998-12-02 | 2001-06-26 | Advanced Micro Devices, Inc. | Intergration of low-K SiOF as inter-layer dielectric |
US6255233B1 (en) * | 1998-12-30 | 2001-07-03 | Intel Corporation | In-situ silicon nitride and silicon based oxide deposition with graded interface for damascene application |
JP2001319928A (ja) * | 2000-05-08 | 2001-11-16 | Hitachi Ltd | 半導体集積回路装置およびその製造方法 |
US6645873B2 (en) * | 2000-06-21 | 2003-11-11 | Asm Japan K.K. | Method for manufacturing a semiconductor device |
JP3773800B2 (ja) | 2001-03-21 | 2006-05-10 | 三洋電機株式会社 | モーター駆動電気機器の電流検出方法 |
JP3967567B2 (ja) | 2001-07-30 | 2007-08-29 | 株式会社東芝 | 半導体装置およびその製造方法 |
-
2001
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Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR19980025934A (ko) * | 1996-10-07 | 1998-07-15 | 양승택 | 절연막 형성 방법 |
KR20010033959A (ko) * | 1998-01-10 | 2001-04-25 | 히가시 데쓰로 | 불소 첨가 탄소막으로 이루어지는 절연막을 구비하는반도체 디바이스 및 그 제조 방법 |
KR20000002928A (ko) * | 1998-06-24 | 2000-01-15 | 윤종용 | 반도체장치의 금속배선 구조 및 그 제조방법 |
KR20000076923A (ko) * | 1999-03-23 | 2000-12-26 | 가네꼬 히사시 | 반도체 장치 및 그 제조 방법 |
JP2001085517A (ja) * | 1999-09-13 | 2001-03-30 | Sony Corp | 半導体装置およびその製造方法 |
KR20030038736A (ko) * | 2000-09-11 | 2003-05-16 | 동경 엘렉트론 주식회사 | 반도체 소자 및 이의 제조 방법 |
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JP4257051B2 (ja) | 2009-04-22 |
US7282434B2 (en) | 2007-10-16 |
US20030030146A1 (en) | 2003-02-13 |
US20060258149A1 (en) | 2006-11-16 |
TW578225B (en) | 2004-03-01 |
US7078815B2 (en) | 2006-07-18 |
US6856019B2 (en) | 2005-02-15 |
KR20030014152A (ko) | 2003-02-15 |
JP2003060030A (ja) | 2003-02-28 |
US20050151262A1 (en) | 2005-07-14 |
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