KR100806301B1 - Plasma Display Device - Google Patents

Abstract

The present invention relates to a plasma display device, comprising: a first electrode formed on an upper substrate, and a partition wall formed on a lower substrate facing the upper substrate and partitioning a discharge space, wherein the first electrode comprises the discharge space. Since it is formed on the partition wall so that the margin of the bus electrode is sufficiently secured in consideration of the error in the alignment process, the bus electrode is prevented from invading into the discharge space, and a groove is formed in the partition wall, so the panel capacitance is increased. Has the effect of decreasing.

Plasma Display Panel, Transparent Electrode, Bus Electrode, Scan Electrode, Sustain Electrode

Description

Plasma Display Device

1 is a structural diagram of a discharge cell electrode according to the prior art,

2 is a configuration diagram of a plasma display panel of the present invention;

3 is a first embodiment of a discharge cell electrode structure of the present invention;

Figure 4 is a second embodiment of the discharge cell electrode structure of the present invention,

5 is a cross-sectional view of a discharge cell according to a second embodiment of the present invention.

<Explanation of symbols on main parts of the drawings>

30: upper substrate 31: scan electrode

31a: transparent electrode 31b: bus electrode

32: sustain electrode 32a: bus electrode

32b: transparent electrode 40: lower substrate

41: address electrode 43: partition wall

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display device. In particular, a bus electrode is formed with a high definition, and a bus electrode is discharged due to an error in the upper / lower substrate alignment because the bus electrode is formed on the partition wall with a predetermined margin so as not to overlap the discharge space. The present invention relates to a plasma display device in which capacitance of a panel is reduced without invading space.

In general, a plasma display panel uses visible light of red (R), green (G), and blue (B) generated by vacuum ultraviolet rays (VUV) radiating from a plasma obtained through gas discharge to excite phosphors. The display device to implement a predetermined image.

In the plasma display apparatus, a discharge cell is selected as a counter discharge between a scan electrode and an address electrode, and an image is realized due to a surface discharge between the scan electrode and the sustain electrode.

Looking at the configuration of the plasma display device in more detail, the panel is formed by combining the upper substrate and the lower substrate facing the upper substrate, the scan substrate, the sustain electrode and the dielectric layer is formed on the upper substrate.

The lower substrate includes a plurality of address electrodes, a dielectric layer for protecting and insulating the address electrodes, a partition partitioning a discharge cell, the dielectric layer and the partition wall, and emitting visible light by plasma discharge. Phosphor layer is formed.

In addition, a scan electrode and a sustain electrode and a dielectric layer for protecting and insulating the electrode are formed on the upper substrate, and the scan electrode and the sustain electrode are formed of a bus electrode and a transparent electrode, respectively.

As voltage is applied to either the address electrode, the scan electrode or the sustain electrode, an address discharge is generated to select a discharge cell, and a sustain discharge is generated between the scan electrode and the sustain electrode to display an image.

The discharge cell electrode structure of the plasma display device configured as described above will be described with reference to FIG. 1, and the problems of the related art will be described.

Referring to FIG. 1, the discharge space is partitioned by the partition 23, and the bus electrode 11b is formed on the partition 23 with a predetermined margin (m1, less than 20 μm) from the discharge space. In addition, the width d1 of the conventional bus electrode is formed to be 55 to 80 mu m.

However, in the process of forming the panel by combining the upper substrate and the lower substrate as in the prior art, when the alignment of the upper substrate or the lower substrate exceeds the tolerance, the margin m1 of the bus electrode 11b is Since it was not sufficiently secured, as shown in FIG. 1, the bus electrode was formed by invading into the discharge space.

Accordingly, there is a problem that the luminance is reduced because the emission area in which visible light is emitted is reduced due to the bus electrode.

In addition, since the discharge cell generally stores energy by an electric field and has a characteristic of inducing current by voltage fluctuations, the discharge cell can be equally represented as a capacitor, and the higher the capacitance of the discharge cell, the higher the power consumption. And waveforms are distorted. In order to reduce the capacitance of the discharge cell, a discharge cell having a large gap between the electrodes formed on the upper substrate or the lower substrate and having a narrow width of the electrode is required.

The present invention has been made to solve the above problems of the prior art, the object of which is to form a narrow width of the bus electrode in consideration of the panel capacitance, the margin of the bus electrode sufficiently in view of the error in the alignment process The present invention provides a plasma display apparatus which is secured and formed so that the bus electrode does not intrude into the discharge space.

The plasma display device according to the present invention for solving the above problems comprises a first electrode formed on the upper substrate, and a partition wall formed on the lower substrate facing the upper substrate to partition the discharge space, the first The electrode is formed on the partition wall so as not to overlap with the discharge space.

The upper substrate further includes a second electrode formed to be parallel to the first electrode, and the first electrode and the second electrode are formed on the partition wall so as not to overlap the discharge space.

The first electrode is formed to be spaced apart from the outside of the discharge space with a predetermined margin, characterized in that the predetermined margin is within 20 ~ 200㎛.

In addition, since the first electrode and the second electrode are metal bus electrodes, a width of the bus electrode is 50 μm or less, and grooves are formed in the lower partition wall of the first electrode or the second electrode. Is reduced.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. 2 is a perspective view showing the configuration of a plasma display panel according to the present invention. The scan electrodes and the sustain electrodes of the plasma display panel should be arranged in units of discharge cells, but are shown one by one for convenience.

First, the scan electrode (Y) and the sustain electrode (Z) are formed on the upper substrate (30), and the upper dielectric layer (33) is stacked adjacent to the scan electrode (Y) and the sustain electrode (Z). In addition, a protective layer 34 for protecting the upper dielectric layer 33 is included.

The lower substrate 40 includes an address electrode X facing the scan electrode Y and the sustain electrode Z formed on the upper substrate 30, and a lower dielectric layer 42 stacked on the address electrode. do. In addition, the phosphor 44 is coated on the lower dielectric layer 42 and the partition 43 that partitions the discharge space.

Discharge cells are selected by opposing discharges between the scan electrodes Y and the address electrodes X during an address period, and surface discharges between the scan electrodes Y and the sustain electrodes Z during a sustain period. A vacuum ultraviolet ray (VUV) is generated by the discharge, and the phosphor 44 coated inside the discharge space is excited / light-emitting to display an image.

Figure 3 is a first embodiment of the discharge cell electrode structure according to the present invention. The first embodiment is characterized in that the metal bus 31b is formed in the non-discharge space with a sufficient margin m2 to prevent the metal bus from invading into the discharge space in the alignment process.

One of the electrodes shown in FIG. 3 is a scan electrode Y receiving a driving signal from a scan driver (not shown), and the other is a sustain electrode Z receiving a driving signal from a sustain driver (not shown).

Each of the metal bus electrodes 31b constituting the scan electrode Y and the sustain electrode Z is formed to face each other in a non-discharge space so as not to overlap with the discharge space, and although not shown, the discharge space from each bus electrode. A transparent electrode protruding therein is provided.

At this time, the bus electrode 31b is formed to be spaced apart from the outside of the discharge space with a predetermined margin (m2), which is preferably within 20 ~ 200㎛. In view of the current level, since the error in the alignment process is within about 20 μm, the margin of the bus electrode is 20 μm or more and preferably 200 μm or less in consideration of the distance of the non-discharge space of neighboring discharge cells.

As described above, since the margin m2 of the bus electrode 31b is increased in comparison with the related art, the spacing between the bus electrodes is also increased to improve the discharge efficiency.

In addition, it is preferable that the width d2 of the bus electrode 31b is formed to have a high definition of 50 μm or less, thereby reducing the capacitance formed between the bus electrodes.

4 and 5 are a second embodiment of the discharge cell electrode structure according to the present invention. In the second embodiment, the metal bus is formed in the non-discharge space with a sufficient margin m2 in order to prevent the metal bus from invading into the discharge space in the alignment process, and on the lower substrate facing the metal bus. Grooves (G) are formed in the partition wall. The groove means a curved portion which is concave inward from the top of the partition wall toward the outer side portion.

Referring to FIG. 4, one of the illustrated electrodes is a scan electrode Y that receives a driving signal from a scan driver not shown, and the other is a sustain electrode Z that receives a driving signal from a sustain driver not shown. to be.

Each of the metal bus electrodes 31b constituting the scan electrode Y and the sustain electrode Z is formed to face each other in a non-discharge space so as not to overlap with the discharge space, and although not shown, the discharge space from each bus electrode. A transparent electrode protruding therein is provided.

At this time, the bus electrode 31b is formed to be spaced apart from the outside of the discharge space with a predetermined margin (m2), which is preferably within 20 ~ 200㎛. At the present level, since the error in the alignment process is within about 20 μm, the margin of the bus electrode is 20 μm or more, and preferably 200 μm or less in consideration of the distance of the non-discharge space of neighboring discharge cells.

In addition, it is preferable that the width d2 of the bus electrode 31b is formed to have a high definition of 50 μm or less, and the capacitance formed between the bus electrodes is larger than the conventional case in which the width of the bus electrode is 55 μm or more. Can be reduced.

In addition, in the second embodiment, since grooves are formed in the barrier rib 43 positioned below the bus electrode 31b, the curved portion of the bus electrode is opposed to the curved portion of the lower portion of the bus electrode, as shown in FIG. A vacancy is formed in which air with low permittivity is present.

5 is a cross-sectional view of the discharge cell of the second embodiment, in which the address electrode X and the dielectric layer 42 are formed on the lower substrate 40, and the partition wall 43 is formed on the dielectric layer to form the discharge space. Compartment. However, since the grooves G are formed in the partition wall 43, the dielectric constant of the partition wall is lowered by the grooves, thereby lowering the capacitance of the lower substrate.

The scan electrode Y and the sustain electrode Z are formed on the upper substrate 30, and a dielectric layer 33 and a protective layer 34 stacked on the electrode are formed. However, the bus electrode 31b constituting the scan electrode Y and the sustain electrode Z is formed to be positioned above the groove G, and the transparent electrode 31a is formed in the discharge space from the bus electrode 31b. Is formed to protrude.

As described above, the plasma display device according to the present invention has been described with reference to the illustrated drawings. However, the present invention is not limited by the embodiments and drawings disclosed herein, and is provided to those skilled in the art within the scope of the technical idea of the present invention. Application is possible.

In the plasma display device according to the present invention configured as described above, the width of the bus electrode is fixed to 50 μm or less, and the bus electrode is formed because the margin of the bus electrode is sufficiently secured in consideration of an error in the alignment process. Prevents invasion into the discharge space. In addition, since grooves are formed in the lower partition of the bus electrode, the panel capacitance is reduced.

Claims (8)

A first electrode of a metal having a high definition on the upper substrate, a transparent second electrode overlapping the first electrode and protruding into the discharge space, and a partition wall formed on the lower substrate facing the upper substrate to partition the discharge space. Including, The partition wall is formed with a groove formed concavely in the lower portion of the partition wall from the flat top toward the outer side, And the first electrode does not overlap the discharge space and is formed at a position opposite to the curved portion of the partition wall. delete delete In claim 1, Than a distance to an upper portion of the partition wall facing the second electrode And a distance to the curved portion of the partition wall facing the first electrode is further formed. In claim 1, And the first electrode is spaced apart from the outside of the discharge space by a distance within 20 to 200 μm. In claim 1, The width of the first electrode is a plasma display device, characterized in that 20 to 50㎛. delete delete

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