KR100776126B1 - Method for fabricating semiconductor device - Google Patents

Abstract

A method for manufacturing a semiconductor device is provided to improve an optical sensitivity of an image sensor by preventing a salicide layer from being formed in a non-salicide forming region. A silicon pattern is formed on a substrate(100). A salicide blocking film(111) is formed on the substrate except for the silicon pattern. A titanium film and a cobalt film are sequentially formed on the silicon pattern and the salicide blocking film, respectively. A permeation blocking layer to prevent a cobalt component of the cobalt film from permeating is formed on an interface between the titanium film and the salicide blocking film. An upper portion of the silicon pattern is annealed to form a mono salicide layer(115) on the silicon pattern. A remaining titanium film and a remaining cobalt film are removed. The mono salicide layer is annealed again to form a di-salicide layer.

Description

Manufacturing method of semiconductor device {METHOD FOR FABRICATING SEMICONDUCTOR DEVICE}

1 is a circuit diagram showing a unit pixel composed of one photodiode (PD) and four MOS transistors in a conventional CMOS image sensor.

Figure 2 shows a conventional salicide forming process.

3A and 3E are cross-sectional views illustrating a method of forming a salicide according to an embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

100: p + type substrate 101: p epi layer

102 semiconductor substrate 103 device isolation film

104: gate insulating film 105: gate conductive film

106: spacer 107: gate pattern

108: n-type impurity region 109: floating diffusion region

110: p-type impurity region 111: salicide preventing film

115: cobalt salicide layer 116: titanium oxide film

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to semiconductor manufacturing technology, and more particularly, to a manufacturing process of an image sensor during a semiconductor device manufacturing process.

In general, image sensors are used in a wide range of fields, from home products such as digital cameras and mobile phones, to endoscopes used in hospitals, and to satellite telescopes around the earth. The CMOS image sensor is a device that converts an optical image into an electrical signal, and employs a switching method in which a MOS transistor is formed by the number of pixels and the output is sequentially detected using the MOS transistor. The CMOS image sensor is simpler to drive than the CCD image sensor, which is widely used as a conventional image sensor, enables various scanning methods, and can integrate signal processing circuits onto a single chip. In addition to the use of compatible CMOS technology, the manufacturing cost can be lowered and the power consumption is significantly lower. Therefore, it is used in low cost and low power fields such as mobile phones, PCs and surveillance cameras.

1 is a circuit diagram showing a unit pixel composed of one photodiode (PD) and four MOS transistors in a conventional CMOS image sensor. 10), the transfer transistor 11 for transporting the photocharges collected from the photodiode 10 to the floating diffusion region 12, and setting the potential of the floating diffusion region to a desired value and discharging electric charges to discharge the floating diffusion region ( 12, a reset transistor 13 for resetting, a drive transistor 14 serving as a source follower buffer amplifier by applying a voltage of a floating diffusion region to a gate, and addressing as a switching role. And a select transistor 15 which performs a role of (Addressing). Outside the unit pixel, a load transistor 16 is formed to read an output signal.

Meanwhile, the CMOS image sensor is in a stage where high integration is rapidly achieved. Also in the manufacture of an image sensor having a line width of 0.25 mu m or less, a gate electrode having a salicide such as Ti or Co is indispensable, similar to existing standard logic.

In general, in the prior art, the salicide process causes deterioration of the photodiode characteristic and is not used in the 'photodiode' of the CMOS image sensor. Therefore, the generation of leakage current was suppressed by preventing the formation of salicide only in the photodiode.

2 is a diagram illustrating a conventional salicide forming process, and corresponds to a process for forming salicide on the gate pattern 17.

To this end, the cobalt film 22 and the titanium nitride film 23 for forming the cobalt salicide layer on the resultant after forming the salicide preventing film 21 covering the photodiodes 18 and 20 and the floating diffusion region 19 are formed. , TiN) are formed sequentially. The titanium nitride film 23 prevents the cobalt film 22 from being exposed to the atmosphere prior to the annealing process for forming the salicide layer, thereby protecting the cobalt film 22 from the formation of a natural oxide film and generation of contaminants due to prolonged exposure. do. Subsequently, the salicide layer 25 is formed by sequentially performing the primary annealing → cobalt film 22 removal → secondary annealing process.

Here, the thickness of the salicide prevention film 21 should have a thickness that does not affect light irradiation. However, when the salicide barrier layer 21 is formed to a thickness that does not affect light irradiation as described above, the cobalt component 24 of the cobalt layer 22 is applied to the salicide barrier layer 21 in the first annealing process. It penetrates, penetrates into the photodiode 18 and 20 surface in a secondary annealing process, and degrades optical characteristics.

If foreign material-cobalt component 24-is present on the surface of the photodiode 18, 20, the number of particles of incident photons is reduced, thereby reducing the number of electrons and holes generated. This means that the number of electrons moving to the floating diffusion region 19 is reduced. In addition, when the foreign material is a metal, the time for recombination by the metal ions after the electrons and holes are generated is shortened to reduce the number of electrons moving to the floating diffusion region 19. This problem is more pronounced when irradiated in the dark.

The above description focuses on the problem of the image sensor, but this is a common problem in the semiconductor device forming the salicide layer. In the salicide forming process of the semiconductor device, the source component for forming the salicide layer is non-existent. There is a need for a technique that can prevent migration to the salicide forming region.

The present invention has been proposed to solve the above problems of the prior art, and an object thereof is to provide a method of manufacturing a semiconductor device which prevents formation of a salicide layer correctly in a nonsalicide formation region.

According to an aspect of the present invention for achieving the above object, the step of forming a silicon pattern on a substrate, forming a salicide prevention film on a substrate in a region other than the silicon pattern, the silicon pattern and the salicide prevention film Forming a titanium film and a cobalt film sequentially on the substrate; a penetration preventing layer for preventing the cobalt component of the cobalt film from penetrating into the substrate is formed at an interface between the titanium film and the salicide preventing film; Firstly annealing to form a salicide layer, removing the unreacted titanium film and the cobalt film, and secondly annealing the monosalicide layer to be a dissalicide layer. Provide a method.

Hereinafter, the preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. .

3A and 3E are cross-sectional views illustrating a salicide forming method according to an embodiment of the present invention.

First, as shown in FIG. 3A, an isolation layer 103 is formed on a semiconductor substrate 102 on which a p epitaxial layer 101 is formed on a p + type substrate 100.

In this case, the reason for using the low concentration p epi layer 101 on the high concentration p + type substrate 100 is first, since the low concentration p epi layer 101 is present, a large depletion region (Depletion region) of the photodiode, Can be deeply increased to increase the photodiode's ability to collect photocharges, and secondly, having a high concentration of the p + type substrate 100 under the p-type epilayer 101, This is because the charge is quickly recombined before the charge spreads to the pixel, thereby reducing the random diffusion of the photocharge, thereby reducing the change in the transfer function of the photocharge.

In addition, the device isolation layer 103 may be formed through a shallow trench isolation (STI) process, in which there is almost no bird's beak, thereby reducing the area of electrical separation between devices according to high integration of devices.

Subsequently, the gate insulating film 104 and the gate conductive film 105 are sequentially deposited on the resultant film on which the device isolation film 103 is formed, and then the photoresist for etching the gate insulating film 104 and the gate conductive film 105. Form a pattern. Subsequently, the gate insulating layer 104 and the gate conductive layer 105 are etched using the photoresist pattern as an etch barrier to form the gate electrode patterns 104 and 105, and the photoresist pattern is removed. At this time, during the cleaning process for removing the photoresist pattern, contaminants that may form on the surface of the substrate are also removed. In addition, an oxide film is generally used as the gate insulating film 104, and the gate conductive film 105 may be a polysilicon film, a metal film, or a laminated film of a polysilicon film and a metal film. Preferably, a polysilicon film is used.

Subsequently, an ion implantation mask covering a portion of the gate electrode patterns 104 and 105 and opening the region where the photodiode is to be formed is formed, and an n-type impurity region 108 is formed using the ion implantation mask.

Subsequently, spacers 106 are formed on both sidewalls of the gate electrode patterns 104 and 105, and floating diffusion regions 109 are formed on the opposite side of the n-type impurity region 108 around the gate pattern 107. The p-type impurity region 110 is formed on the n-type impurity region 108 to form photodiodes 108 and 110.

Subsequently, a salicide prevention layer 111 is formed, which opens only the region where the salicide layer is to be formed.

The salicide preventing film 111 is effective to form an oxide film having a thickness of 10 to 1000 kPa, because it is possible to minimize the occurrence of crystal bonding on the silicon surface. In addition, the salicide barrier layer 111 is preferably formed at a deposition temperature of 500 to 680 ° C.

Next, as shown in FIG. 3B, the titanium film 112 is formed on the resultant on which the salicide prevention film 111 is formed.

The titanium film 112 is preferably formed of a titanium (Ti) having a thickness of 5 ~ 100Å by a sputtering method. And argon (Ar) gas can also be flowed in the middle of forming in a sputter | spatter system.

Next, as shown in FIG. 3C, the cobalt film 113 and the titanium nitride film 114 are sequentially formed on the resultant product on which the titanium film 112 is formed, and then a first annealing process (RTP anneal) is performed.

The primary annealing process is carried out at a process temperature of 550 ~ 650 ℃. The temperature does not react between the upper silicon of the gate electrode pattern 107 and the titanium film 112, and the cobalt component of the cobalt film 113 penetrates the titanium film 112 and reacts with the silicon of the gate electrode pattern 107. It is the temperature that can be. Therefore, a monosalicide layer, that is, a cobalt salicide layer 115 having a CoSi phase is formed on the gate electrode pattern 107.

In addition, a titanium oxide layer 116 (TiO ₂ ), which is a penetration prevention layer for preventing the cobalt component from penetrating into the lower side of the salicide prevention layer 111, is formed on the salicide prevention layer 111 due to the primary annealing process. The titanium oxide film 116 is a film formed by reacting the salicide preventing film 111, which is an oxide film, with the titanium film 112 during the first annealing process, to prevent the cobalt film 113 from penetrating into the semiconductor substrate 102 surface. prevent.

Next, as shown in FIG. 3D, the unreacted titanium film 112, the cobalt film 113, and the titanium nitride film 114 are removed.

Next, as shown in FIG. 3E, a secondary annealing process is performed.

The secondary annealing process is an annealing process for making a cobalt salicide 115 having a monosalicide layer, that is, a CoSi phase, into a dissalicide layer, that is, a CoSi ₂ phase, and preferably proceeding at a process temperature of 760 to 850 ° C. Do.

An embodiment of the present invention will be described below with reference to FIGS. 3A to 3D.

According to an embodiment of the present invention, the cobalt film 113 formed to form the cobalt salicide layer 115A on the gate pattern 107 penetrates the salicide barrier layer 112 and is prevented from adsorbing onto the upper surface of the substrate. 112 is interposed between the salicide preventing film 112 and the cobac film 113.

The titanium film 112 forms a titanium oxide film 116 (TiO ₂ ) on the titanium film 112 in the first annealing process for forming the salicide layer 115A. The titanium oxide film 116 serves to prevent the cobalt component of the cobalt film 113 from penetrating into the substrate surface.

The monosalicide layer obtained in the primary annealing process is converted into a dissalicide layer through a secondary annealing process.

For reference, the monosalicide layer (CoSi) has a high resistance, and the dissalicide layer (CoSi ₂ ) has a low resistance. Therefore, it is the dissalicide layer which has a molecular structure suitable as a salicide layer.

The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes are possible in the art without departing from the technical spirit of the present invention. It will be apparent to those of ordinary skill.

As described above, the present invention prevents the formation of the salicide layer correctly in the nonsalicide formation region.

Therefore, the reliability of the semiconductor element is improved. For example, in the case of an image sensor, sensing capability and light sensitivity may be improved.

Claims (8)

Forming a silicon pattern on the substrate; Forming a salicide barrier on a substrate in a region excluding the silicon pattern; Sequentially forming a titanium film and a cobalt film on the silicon pattern and the salicide barrier layer; A first annealing layer is formed at an interface between the titanium film and the salicide barrier layer to prevent the cobalt component of the cobalt layer from penetrating into the substrate and a monosalicide layer is formed on the silicon pattern; Removing the titanium film and the cobalt film that are not reacted; And Second annealing the monosalicide layer to be a dissalicide layer Method for manufacturing a semiconductor device comprising a. The method of claim 1, The first annealing step is a method of manufacturing a semiconductor device, characterized in that proceeding at a process temperature of 550 ~ 650 ℃. The method of claim 1, The second annealing step is a method of manufacturing a semiconductor device, characterized in that proceeding at a process temperature of 760 ~ 850 ℃. The method of claim 1, A method of manufacturing a semiconductor device, characterized by further forming a cobalt antioxidant film for preventing the cobalt film from being exposed to the atmosphere. The method of claim 1, The titanium film is formed by a sputtering method, and argon (Ar) gas is flowed during formation. The method of claim 1, A method of manufacturing a semiconductor device, wherein the titanium film is formed to a thickness of 5 to 100 GPa. The method of claim 4, wherein The cobalt antioxidant film is a manufacturing method of a semiconductor device, characterized in that formed by a titanium nitride film. The method of claim 1, The salicide preventing film is formed in a thickness of 10 ~ 1000 형성 at a deposition temperature of 500 ~ 680 ℃ manufacturing method of a semiconductor device.

Images