KR100533966B1 - Isolation by trench type and method for manufacturing the same - Google Patents

Abstract

The present invention provides a device isolation film having a trench structure and a method of manufacturing the same. The device isolation film of the present invention is a trench formed in a silicon substrate. A first sidewall oxide film deposited on the bottom and sidewalls of the trench by ALD, a second sidewall oxide film formed on the first sidewall oxide film by a furnace oxidation method, and formed on the surface of the second sidewall oxide film. By including a liner nitride film, a liner oxide film formed on the surface of the liner nitride film, and an insulating film formed so as to fill the trench on the surface of the liner oxide film, the first side wall oxide film is formed in advance in a thin and uniform thickness before the second side wall oxide film. When the furnace is oxidized, the second side wall oxide film is equalized so that there is no difference in the amount of oxidation at the side walls and the bottom of the trench. Formed by the effect it becomes easily buried in the trench.

Description

Device isolation film with trench structure and manufacturing method thereof {ISOLATION BY TRENCH TYPE AND METHOD FOR MANUFACTURING THE SAME}

The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device having a device isolation film of a trench structure.

In addition to the advancement of semiconductor technology, high speed and high integration of semiconductor devices is progressing. In connection with this, the necessity of refinement | miniaturization of a pattern becomes increasingly high, and the dimension of a pattern is also required for high precision. This also applies to device isolation regions that occupy a wide area in semiconductor devices.

LOCOS oxide films are mostly used as device isolation films of semiconductor devices. However, the LOCOS isolation layer has a drawback in which a bird-shaped bird's beak is generated at an edge thereof, thereby generating a leakage current while reducing the area of the active region.

At present, a shallow trench isolation (STI) structure having a narrow width and excellent device isolation characteristics has been proposed.

1A and 1B are cross-sectional views illustrating a method of manufacturing a device isolation film having an STI structure according to the prior art.

As shown in FIG. 1A, a multilayer pad 12 is formed on the silicon substrate 11 to expose the device isolation region. At this time, the multilayer pad 12 is a laminated film of the pad oxide film 12a and the pad nitride film 12b.

Next, the trench 13 is formed in the silicon substrate 11 by etching the exposed silicon substrate 11 to a predetermined depth using the multilayer pad 12 as an etching mask. At this time, the bottom of the trench 13 is flat, but the sidewalls of the trench are inclined. In other words, the surfaces of the silicon substrates 11 forming the trenches 13 have different orientations.

As an etching process for forming the trench 13, a dry etching method using plasma gas is used, for example. In this case, due to the dry etching process for forming the trench 13, silicon lattice defects and damage may occur on the sidewalls of the trench 13.

In order to reduce such silicon lattice defects and damage, as shown in FIG. 1B, a wall oxidation process is performed to form sidewall oxide films 14 on the bottom and sidewalls of the trench 13.

In a subsequent process, the trench 13 is buried in an insulating film such as HDP oxide on the sidewall oxide film 14, and a series of chemical mechanical polishing and removal of the multilayer pad 12 are performed to form an STI device. A separator is formed.

However, the prior art has a problem that the filling of the trench 13 is difficult due to the high aspect ratio as the semiconductor device is highly integrated. In particular, the filling of the trench 13 is difficult because of poor uniformity caused by the sidewall oxidation process performed after the trench 13 is formed. In general, sidewall oxidation is performed after the trench etching, and the degree of oxidation is known to be changed by the difference in the orientation of the exposed silicon substrate surface after the trench etching. In particular, as the size of the device decreases, the oxidation amount of the sidewall portion after the trench is relatively large, so that the space of the trench is narrowed, making it difficult to fill the trench.

Referring to FIG. 1B, the prior art uses a furnace oxidation method for sidewall oxidation, and the oxidation amount t1 of the sidewalls is about twice as large as the oxidation amount t2 of the bottom of the trench 13.

In addition, as the sidewall oxidation is performed based on the bottom of the trench 13, there is a problem that the amount of oxidation of the sidewall is undesirably two times thicker than the reference due to the difference in the amount of oxidation of the bottom portion and the sidewall.

Figure 2 shows the results after the furnace oxidation according to the prior art, it can be seen that the oxidation amount in the side wall of the trench is much larger than the bottom of the trench after the furnace oxidation. In addition, in FIG. 2, the sidewall oxide layer is formed thicker than the sidewall at the top portion of the trench because the furnace oxidation method is dry oxidation, and the dry oxidation is more effective than the sidewalls of the trench. There is further oxidizing property.

The present invention has been proposed to solve the above problems of the prior art, to provide a trench isolation device isolation film and a method of manufacturing the same suitable for preventing the trench buried due to the difference in the amount of oxidation in the bottom and sidewalls of the trench There is this.

delete

The device isolation film of the present invention for achieving the above object is a trench formed in a silicon substrate, a first side wall oxide film deposited by atomic layer deposition on the bottom and sidewalls of the trench, a second oxide formed on the first side wall oxide film by a furnace oxidation method And a sidewall oxide film, a liner nitride film formed on the surface of the second side wall oxide film, a liner oxide film formed on the surface of the liner nitride film, and an insulating film formed so as to fill the trench on the surface of the liner oxide film. The one side wall oxide film is a silicon oxide film deposited by atomic layer deposition.

The method of manufacturing a device isolation film of the present invention includes forming a trench in a silicon substrate, depositing a sidewall oxide film on the bottom and sidewalls of the trench by using an atomic layer deposition method, and depositing a sidewall oxide film on the deposition interface between the sidewall oxide film and the trench. Heat treatment to relieve generated lattice mismatch and stress, forming a liner nitride film on the sidewall oxide film surface, forming a liner oxide film on the liner nitride film surface, and filling the trench on the liner oxide film surface And forming an insulating film so as to planarize the insulating film.

In addition, the method of manufacturing a device isolation film of the present invention comprises the steps of forming a trench in a silicon substrate, depositing a first sidewall oxide film using an atomic layer deposition method on the bottom and sidewalls of the trench, furnace oxidation on the first sidewall oxide film Forming a second sidewall oxide film using a method, heat-treating to remove lattice mismatch and stress generated in the deposition interface between the first sidewall oxide film and the trench, and forming a liner nitride film on the surface of the second sidewall oxide film Forming a liner oxide film on the liner nitride film surface, forming an insulating film to fill the trench on the liner oxide film surface, and planarizing the insulating film.

Hereinafter, the most preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. .

3 is a view illustrating a device isolation film having a trench structure according to a first embodiment of the present invention.

3 is a cross-sectional view illustrating a semiconductor device in accordance with an embodiment of the present invention.

As shown in FIG. 3, a device isolation film embedded in a silicon substrate 21 including a cell region in which a memory element is to be formed and a peripheral region in which other circuit elements are formed, and a trench 24 formed in the silicon substrate 21. It consists of 100.

Here, the device isolation layer 100 may include a trench 24 formed in the silicon substrate 21, a sidewall oxide film 25 deposited on the bottom and sidewalls of the trench 24, and a liner nitride film 26 formed on the sidewall oxide film 25. ), A liner oxide film 27 formed on the surface of the liner nitride film 26 and a high density plasma oxide film 28 formed so as to fill the trench 24 on the surface of the liner oxide film 27.

In FIG. 3, the sidewall oxide film 25 is a silicon oxide film (SiO ₂ ) deposited using atomic layer deposition (ALD) on the bottom and sidewalls of the trench 24, and has a thickness of 20 μm to 50 μm. . The atomic layer deposition method will be described later.

In addition, the liner nitride layer 26 buffers stress generated due to a difference in thermal expansion coefficient between the silicon substrate 21 and the high density plasma oxide layer 28, and defects generated in the active region are formed in the trench 24. It serves to block the spread inside. A silicon nitride film (Si ₃ N ₄ ) may be used as the liner nitride film 26, and is formed to have a thickness of 50 μs to 100 μs.

The liner oxide layer 27 serves as a buffer layer that prevents etching and oxidation of the liner nitride layer 26 by plasma damage and oxygen gas generated during the deposition of the high density plasma oxide layer 28.

According to the above, since the sidewall oxide film 25 constituting the device isolation film 100 is deposited using an atomic layer deposition method that can be uniformly deposited in a thin thickness, a uniform thickness at the bottom and sidewalls of the trench 24. This makes it easy to bury the high density plasma oxide film 28 in the trench 24.

4A to 4E are cross-sectional views illustrating a method of manufacturing the device isolation film shown in FIG. 3.

As shown in FIG. 4A, the pad oxide film 22 and the pad nitride film 23 are sequentially stacked on the silicon substrate 21. Here, the silicon substrate 21 is a silicon substrate containing predetermined impurities, and the pad oxide film 22 is for buffering the stress applied to the silicon substrate 21 when the pad nitride film 23 is deposited. The pad nitride film 23 is formed to have a thickness of 500 kPa to 1000 kPa for use as a polishing stop film in a subsequent chemical mechanical polishing process.

Next, the pad nitride film 23 and the pad oxide film 22 are etched using a well-known photolithography process so that the device isolation region of the silicon substrate 21 is exposed, thereby forming a device separation multilayer pad.

Next, the trench 24 is formed by etching the silicon substrate 21 to a depth of 2000 GPa to 2500 GPa by using the multilayer pad, preferably the pad nitride film 23 as a mask.

Due to the dry etching process for forming the trench 24, silicon lattice defects and damage may occur on the sidewalls of the trench 24. In order to reduce such silicon lattice defects and damage, a wall oxidation process is performed. The first embodiment uses atomic layer deposition (ALD) without using furnace oxidation as a sidewall oxidation method. The side wall oxide film 25 is deposited.

As shown in FIG. 4B, a sidewall oxide film 25 is formed on the surface of the trench 24 using atomic layer deposition (ALD) as a sidewall oxidation process.

At this time, the sidewall oxide film 25 is a silicon oxide film (SiO ₂ ), and in the atomic layer deposition process for forming it, SiH ₄ is used as the silicon source, O ₂ is used as the reaction gas, and argon (Ar is used as the purge gas. ) Use gas.

In detail, first, SiH ₄ gas is supplied to adsorb SiH ₄ to the surface of the trench 24, and then argon gas is supplied to purge unreacted SiH ₄ . Then, SiO ₂ is deposited on the bottom and sidewalls of the trench 24 by supplying oxygen (O ₂ ) gas to induce a reaction between the adsorbed SiH ₄ and O ₂ . Subsequently, argon gas is supplied and purged to remove hydrogen (2H ₂ ), which is a reaction by-product of SiH ₄ and O ₂ . The deposition cycle consisting of such a series of SiH ₄ feed, purge, O ₂ feed and purge is set to 1 cycle, and several cycles are repeated to deposit to the required thickness.

The sidewall oxide film 25 formed by the atomic layer deposition method (ALD) has a thickness of about 5 kPa to 10 kPa, and the atomic layer deposition method (ALD) can deposit the sidewall oxide film 25 in atomic layer units. (Step coverage) is excellent. That is, the sidewall oxide film 25 is formed to have a uniform thickness at the bottom and sidewalls of the trench 24.

In addition, since ALD is known to be a relatively low temperature deposition method compared to chemical vapor deposition or thermal growth method, the sidewall oxide film 25 can be deposited in the range of 300 ° C to 500 ° C when deposited by atomic layer deposition. .

In addition, by using the atomic layer deposition method, a high quality sidewall oxide film 25 having few impurities can be obtained.

As described above, since the sidewall oxide film 25 deposited using the atomic layer deposition method is thinly formed at a uniform thickness at the bottom and the sidewall of the trench 24, it is difficult to fill the trench 24 with a subsequent high density plasma oxide film. It is easy.

As shown in FIG. 4C, a subsequent heat treatment is performed to remove the stress between the silicon substrate 21 and the sidewall oxide layer 25 and the dislocation between lattices due to the deposition method.

At this time, the subsequent heat treatment proceeds in the range of 1000 ° C to 1100 ° C.

As such, when the subsequent heat treatment is performed in the range of 1000 ° C. to 1100 ° C., the silicon lattice defects and damage generated on the sidewalls of the trench 24 may be cured.

As shown in FIG. 4D, the liner nitride layer 26 and the liner oxide layer 27 are sequentially formed by chemical vapor deposition (CVD) on the silicon substrate 21 on which the sidewall oxide layer 25 is formed. To form.

Here, the liner nitride film 26 serves to buffer the stress generated due to the difference in thermal expansion coefficient between the silicon substrate 21 and the high density plasma oxide film to be embedded in the trench 24, and the defect generated in the active region. (defect) serves to block the diffusion into the trench (24). A silicon nitride film (Si ₃ N ₄ ) may be used as the liner nitride film 26, and is formed to a thickness of 20 μm to 100 μm. In addition, the liner oxide layer 27 may be formed in the liner nitride layer 26 by plasma damage and oxygen gas generated during deposition of a high density plasma oxide layer (HDP Oxide). It acts as a buffer layer to prevent etching and oxidation. At this time, the liner oxide film 27 is formed to a thickness of 20 kPa to 100 kPa.

Next, an insulating film, for example, a high density plasma oxide film 28, is formed to a thickness of 4000 kPa to 5000 kPa so that the trench 24 is sufficiently buried in the upper portion of the silicon substrate 21. At this time, the high-density plasma oxide film 28 uses a plasma deposition method using a silicon source and oxygen gas, preferably a chemical vapor deposition method (CVD) using a plasma.

As shown in FIG. 4E, the high-density plasma oxide film 28 is subjected to chemical mechanical polishing (CMP) until the surface of the pad nitride film 23 is exposed. Accordingly, the high density plasma oxide film 28 is embedded in the trench 24 to complete the device isolation film 100 having the STI structure.

In the subsequent process, after further etching to remove the step of the device isolation film 100, the cleaning process using a phosphate solution (H ₃ PO ₄ ) to remove the pad nitride film 23, the remaining pad In order to remove the oxide film 22, a cleaning process using an HF or BOE solution is performed.

In the first embodiment, the sidewall oxide film 25 is formed by atomic layer deposition, and thereafter, the lattice mismatch between the sidewall oxide film 25 and the silicon substrate 21 and the lattice inconsistency according to the deposition method are determined by subsequent heat treatment. It is being removed.

However, it is difficult to completely eliminate the stress of the deposition interface between the sidewall oxide film 25 and the silicon substrate 21 and the lattice mismatch due to the deposition method only by the subsequent heat treatment.

5 is a view illustrating a device isolation film having a trench structure according to a second embodiment of the present invention.

As shown in FIG. 5, a device isolation film embedded in a silicon substrate 31 including a cell region in which a memory element is to be formed and a peripheral region in which other circuit elements are formed, and a trench 34 formed in the silicon substrate 31. It consists of 200.

Here, the isolation layer 200 may include a trench 34 formed in the silicon substrate 31, a first sidewall oxide layer 35 and a first sidewall oxide layer 35 deposited on the bottom and sidewalls of the trench 34. Trench 34 on the surface of the liner nitride film 37 formed on the surface of the second side wall oxide film 36, the second side wall oxide film 36, the liner oxide film 38 and the liner oxide film 38 formed on the surface of the liner nitride film 37. ) Is composed of a high density plasma oxide film 39 formed to be embedded.

In FIG. 5, the first sidewall oxide film 35 is a silicon oxide film (SiO ₂ ) deposited on the bottom and sidewalls of the trench 34 using atomic layer deposition (ALD), and the second sidewall oxide film ( 36 is a silicon oxide film (SiO ₂ ) which is sidewall oxidized by furnace oxidation. Here, assuming that the total sidewall oxide film has a thickness of 20 kPa to 50 kPa, the first side wall oxide film 35 is about 5 kPa to 10 kPa, and the second side wall oxide film 36 is 15 kPa to 40 kPa.

In addition, the liner nitride film 37 serves to buffer stress generated due to the difference in thermal expansion coefficient between the silicon substrate 31 and the high density plasma oxide film 38, and the defects generated in the active region may be formed in the trench 34. It serves to block the spread inside. A silicon nitride film (Si ₃ N ₄ ) may be used as the liner nitride film 37, and is formed to have a thickness of 50 μs to 100 μs.

The liner oxide layer 38 serves as a buffer layer to prevent etching and oxidation of the liner nitride layer 37 by plasma damage and oxygen gas generated during the deposition of the high density plasma oxide layer 39.

As described above, the sidewall oxide film constituting the device isolation film 200 is composed of the first sidewall oxide film 35 deposited by the atomic layer deposition method and the second sidewall oxide film 36 oxidized by the furnace oxidation method.

As such, by depositing the first sidewall oxide layer 35 directly in contact with the trench 34 to a uniform thickness by using the atomic layer deposition method, the bottom of the trench and the bottom side of the trench when applying the furnace oxidation method for forming the second sidewall oxide layer 36 are formed. There is no difference in the amount of oxidation at the sidewalls, whereby the high density plasma oxide film 39 is easily embedded in the trench 34.

In particular, as will be described later, by forming the second side wall oxide film 36 using the furnace oxidation method, the stress of the deposition interface between the first side wall oxide film 35 and the silicon substrate 31 can be partially eliminated.

6A through 6F are cross-sectional views illustrating a method of manufacturing the device isolation film illustrated in FIG. 5.

As shown in FIG. 6A, the pad oxide film 32 and the pad nitride film 33 are sequentially stacked on the silicon substrate 31. Here, the silicon substrate 31 is a silicon substrate containing predetermined impurities, and the pad oxide film 32 is for buffering the stress applied to the silicon substrate 31 when the pad nitride film 33 is deposited. The pad nitride film 33 is formed to have a thickness of 500 kPa to 1000 kPa for use as a polishing stop film in a subsequent chemical mechanical polishing process.

Next, the pad nitride film 33 and the pad oxide film 32 are etched using a well-known photolithography process so that the device isolation region of the silicon substrate 31 is exposed, thereby forming a multi-layer pad for device isolation.

Next, using the multilayer pad, preferably the pad nitride film 33, as a mask, the trench 34 is formed by etching the silicon substrate 31 to a depth of 2000 Å to 2500 Å.

Due to the dry etching process for forming the trench 34, silicon lattice defects and damage may occur on the sidewalls of the trench 34. In order to reduce such silicon lattice defects and damages, a wall oxidation process is performed, and the present invention is a method of depositing a first silicon oxide film using atomic layer deposition (ALD) as a primary sidewall oxidation method. Subsequently, a second silicon oxide film is formed by using a furnace oxidation method as a secondary sidewall oxidation method.

As shown in FIG. 6B, the first sidewall oxide layer 35 is formed on the surface of the trench 34 using the atomic layer deposition method ALD as the primary sidewall oxidation process.

At this time, the first side wall oxide film 35 is a silicon oxide film (SiO ₂ ), and in the atomic layer deposition process for forming it, SiH ₄ is used as the silicon source, O ₂ is used as the reaction gas, and argon is used as the purge gas. (Ar) gas is used.

In detail, first, SiH ₄ gas is supplied to adsorb SiH ₄ to the surface of the trench 33, and then argon gas is supplied to purge unreacted SiH ₄ . Subsequently, SiO ₂ in atomic layer units is deposited on the bottom and sidewalls of the trench 33 by supplying oxygen (O ₂ ) gas to induce a reaction between the adsorbed SiH ₄ and O ₂ . Subsequently, argon gas is supplied and purged to remove hydrogen (2H ₂ ), which is a reaction by-product of SiH ₄ and O ₂ . The deposition cycle consisting of such a series of SiH ₄ feed, purge, O ₂ feed and purge is set to 1 cycle, and several cycles are repeated to deposit to the required thickness.

The first sidewall oxide film 35 formed by the atomic layer deposition method (ALD) has a thickness of about 5 kPa to about 10 kPa, and the atomic layer deposition method (ALD) can deposit the first sidewall oxide film 35 on an atomic layer basis. Therefore, step coverage is excellent. That is, the first sidewall oxide film 35 is formed to have a uniform thickness at the bottom and sidewalls of the trench 34.

Also, since ALD is known as a vapor deposition method capable of relatively low temperature process compared to chemical vapor deposition or thermal growth, the first sidewall oxide film 35 is deposited in the range of 300 ° C. to 500 ° C. when deposited by atomic layer deposition. It is possible.

In addition, by using the atomic layer deposition method, it is possible to obtain a high quality first sidewall oxide film 35 having few impurities.

As described above, since the first sidewall oxide film 35 deposited by using the atomic layer deposition method covers the entire surface of the trench 34, the oxidation according to the difference in the direction of the trench 34 surface even after the subsequent furnace oxidation is performed. The amount of nonuniformity does not occur. This will be described later.

As shown in FIG. 6C, the second sidewall oxide layer 36 is formed by using a furnace oxidation method. At this time, the furnace oxidation method is a dry oxidation method, the oxidation temperature is 800 ℃ to 900 ℃. Assuming that the total thickness of the sidewall oxide film required is 20 kPa to 50 kPa, since the first side wall oxide film 35 is formed to have a thickness of about 5 kPa to 10 kPa, the thickness of the second side wall oxide film 36 is 15 kPa to 40 kPa.

When the second side wall oxide film 36 is formed by using the furnace oxidation method as described above, the furnace substrate is oxidized while the first side wall oxide film 35 covers the trench 34 surface, so that the silicon substrate 31 is formed. There is no difference in the amount of oxidation due to the difference in the orientation of the surface. That is, since the surface where the furnace oxidation proceeds is not the surface of the silicon substrate 31 but the first side wall oxide film 35, the thickness of the second side wall oxide film 36 formed on the bottom and sidewalls of the trench 34 can be uniform. have.

In addition, since the furnace oxidation method proceeds at a relatively high temperature (800 ° C to 900 ° C), the stress of the deposition interface generated during deposition of the first sidewall oxide film 35, that is, the silicon substrate 31 and the first sidewall oxide film 35 Can partially relieve liver stress.

In addition, proceeding with sidewall oxidation by applying only furnace oxidation without the first sidewall oxide layer 35 causes loss of the silicon substrate 31 on the surface of the trench 34, resulting in a decrease in the size of the active region. (35) Reduction of the size of the active region can be suppressed by carrying out furnace oxidation after deposition.

Finally, when the furnace oxidation is performed after the formation of the first sidewall oxide film 35, the space of the trench 34 proceeds solely by furnace oxidation because the thickness of the trench 34 is uniform without difference in thickness at the top and the bottom and sidewalls of the trench 34. Wider than the case, the trench 34 may be easily buried in a subsequent process.

Through the furnace oxidation, the silicon lattice defects and damage generated on the sidewalls of the trench 34 are substantially healed.

As shown in FIG. 6D, a subsequent heat treatment is performed to completely remove the stress between the silicon substrate 31 and the first sidewall oxide layer 35 and the dislocation between lattices due to the deposition method.

At this time, the subsequent heat treatment proceeds in the range of 1000 ° C to 1100 ° C.

As such, since the subsequent heat treatment is performed in the range of 1000 ° C. to 1100 ° C., furnace oxidation, which is a process before the subsequent heat treatment, may be applied at a temperature of 900 ° C. or less.

As shown in FIG. 6E, a liner nitride layer 37 is formed on the silicon substrate 31 on which the first sidewall oxide layer 35 and the second sidewall oxide layer 36 are formed using chemical vapor deposition (CVD). A liner oxide 38 is formed in this order.

Here, the liner nitride film 37 serves to buffer stress generated due to the difference in thermal expansion coefficient between the silicon substrate 31 and the high density plasma oxide film to be embedded in the trench 34, and the defect generated in the active region. (defect) serves to block the diffusion into the trench (34). A silicon nitride film (Si ₃ N ₄ ) may be used as the liner nitride film 37, and is formed to have a thickness of 20 μs to 100 μs. In addition, the liner oxide film 38 is a plasma damage generated during the deposition of a high density plasma oxide film (HDP Oxide) proceeds to fill the trench 34 in a subsequent process and the liner nitride film 37 by oxygen gas. It acts as a buffer layer to prevent etching and oxidation. At this time, the liner oxide film 38 is formed to a thickness of 20 kPa to 100 kPa.

Next, an insulating film, for example, a high density plasma oxide film 39, is formed to a thickness of 4000 kPa to 5000 kPa so that the trench 34 is sufficiently filled in the upper portion of the silicon substrate 31. At this time, the high-density plasma oxide film 39 uses a plasma deposition method using a silicon source and oxygen gas, preferably a chemical vapor deposition method (CVD) using a plasma.

As shown in FIG. 6F, the high density plasma oxide film 39 is subjected to chemical mechanical polishing (CMP) until the surface of the pad nitride film 33 is exposed. Accordingly, the high density plasma oxide film 39 is embedded in the trench 34 to complete the device isolation film 200 having the STI structure.

In a subsequent process, after further etching to remove the step of the device isolation film 200, the cleaning process using a phosphate solution (H ₃ PO ₄ ) to remove the pad nitride film 33, and the remaining pad In order to remove the oxide film 32, a cleaning process using an HF or BOE solution is performed.

As described above, in the second embodiment, unlike the first embodiment, after forming the first sidewall oxide layer 35 using the atomic layer deposition method, the second sidewall oxide layer 36 is further formed by using the furnace oxidation method. In addition, by performing the subsequent heat treatment, the stress between the silicon substrate 31 and the first side wall oxide layer 35 and the mismatch between lattice due to the deposition method can be completely eliminated.

Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

The present invention described above has an effect of easily filling the trench by forming the sidewall oxide film by using the atomic layer deposition method capable of uniformly depositing the thin film with the sidewall oxide film.

In addition, since the first side wall oxide film is formed by atomic layer deposition and the second side wall oxide film is formed by the furnace oxidation method, there is no difference in the amount of oxidation at the bottom and sidewalls of the trench when forming the second side wall oxide film. Since the thickness can be formed uniformly, the trench can be easily buried.

In addition, since the furnace oxidation method is applied after the first sidewall oxide film is formed by the atomic layer deposition method, the loss of the active region can be prevented.

In addition, in the present invention, since the thickness of the sidewall oxide film is uniform at the bottom and sidewalls of the trench, the trench space is wider than the case where only the furnace oxidation is performed, so that the trench filling is advantageous.

1A and 1B are cross-sectional views illustrating a method of manufacturing a device isolation film having an STI structure according to the prior art;

2 shows the results after furnace oxidation according to the prior art;

3 is a view illustrating a device isolation film having a trench structure according to a first embodiment of the present invention;

4A to 4E are cross-sectional views illustrating a method of manufacturing the device isolation film shown in FIG. 3;

5 is a view illustrating a device isolation film having a trench structure according to a second embodiment of the present invention;

6A to 6F are cross-sectional views illustrating a method of manufacturing the device isolation film illustrated in FIG. 5.

* Explanation of symbols for the main parts of the drawings

31 silicon substrate 32 pad oxide film

33: pad nitride film 34: trench

35: first side wall oxide film (ALD-SiO ₂ ) 36: second side wall oxide film (furnace oxide-SiO ₂ )

37: liner nitride film 38: liner oxide film

39: high density plasma oxide film

Claims (14)

delete delete delete Trenches formed in the silicon substrate; A first sidewall oxide film deposited on the bottom and sidewalls of the trench by atomic layer deposition; A second side wall oxide film formed on the first side wall oxide film by a furnace oxidation method; A liner nitride film formed on the surface of the second sidewall oxide film; A liner oxide film formed on the surface of the liner nitride film; And An insulating layer formed to fill the trench on the liner oxide layer surface Device isolation film of a semiconductor device comprising a. The method of claim 4, wherein The first side wall oxide film, A device isolation film of a semiconductor device comprising a silicon oxide film deposited by atomic layer deposition. The method of claim 4, wherein Wherein the first sidewall oxide film is 5 Å to 10 Å thick and the second side wall oxide film is 15 Å to 40 Å thick. Forming a trench in the silicon substrate; Depositing a sidewall oxide film on the bottom and sidewalls of the trench using atomic layer deposition; Thermally treating the sidewall oxide layer and the trench to eliminate lattice mismatch and stress generated in the deposition interface; Forming a liner nitride film on the sidewall oxide film surface; Forming a liner oxide film on the surface of the liner nitride film; Forming an insulating layer on the surface of the liner oxide to fill the trench; And Planarizing the insulating film Device isolation film manufacturing method of a semiconductor device comprising a. The method of claim 7, wherein Depositing the sidewall oxide film, Supplying SiH ₄ gas to adsorb SiH ₄ on the trench surface; Supplying argon gas to purge the unreacted SiH ₄ ; Supplying oxygen gas to induce a reaction between the adsorbed SiH ₄ and the oxygen to deposit SiO ₂ in atomic layers on the bottom and sidewalls of the trench; And In order to remove the reaction by-products of the SiH ₄ and oxygen, argon gas is supplied and purged as one cycle, Method for manufacturing a device isolation film of a semiconductor device, characterized in that for repeating the cycle. The method of claim 7, wherein The heat treatment step, A device isolation film manufacturing method for a semiconductor device, characterized in that it proceeds in the range of 1000 ℃ to 1100 ℃. Forming a trench in the silicon substrate; Depositing a first sidewall oxide film on the bottom and sidewalls of the trench using atomic layer deposition; Forming a second sidewall oxide film on the first sidewall oxide film using a furnace oxidation method; Heat-treating the first side wall oxide layer and the trench to eliminate lattice mismatch and stress generated at the deposition interface; Forming a liner nitride film on the surface of the second sidewall oxide film; Forming a liner oxide film on the surface of the liner nitride film; Forming an insulating layer on the surface of the liner oxide to fill the trench; And Planarizing the insulating film Device isolation film manufacturing method of a semiconductor device comprising a. The method of claim 10, Depositing the first side wall oxide film, Supplying SiH ₄ gas to adsorb SiH ₄ on the trench surface; Supplying argon gas to purge the unreacted SiH ₄ ; Supplying oxygen gas to induce a reaction between the adsorbed SiH ₄ and the oxygen to deposit SiO ₂ in atomic layers on the bottom and sidewalls of the trench; And In order to remove the reaction by-products of the SiH ₄ and oxygen, argon gas is supplied and purged as one cycle, Method for manufacturing a device isolation film of a semiconductor device, characterized in that for repeating the cycle. The method of claim 10, The second side wall oxide film, A method of manufacturing a device isolation film for a semiconductor device, characterized in that it is formed by dry oxidation at a temperature of 800 ℃ to 900 ℃ by furnace oxidation method. The method of claim 10, The heat treatment step, A device isolation film manufacturing method for a semiconductor device, characterized in that it proceeds in the range of 1000 ℃ to 1100 ℃. The method of claim 10, Wherein the first sidewall oxide film is deposited at a thickness of 5 kV to 10 kV and the second side wall oxide film is formed at a thickness of 15 kV to 40 kV.