KR100516248B1 - Active Matrix Liquid Crystal Display and Liquid Crystal Display - Google Patents

Active Matrix Liquid Crystal Display and Liquid Crystal Display Download PDF

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Publication number
KR100516248B1
KR100516248B1 KR10-1997-0057605A KR19970057605A KR100516248B1 KR 100516248 B1 KR100516248 B1 KR 100516248B1 KR 19970057605 A KR19970057605 A KR 19970057605A KR 100516248 B1 KR100516248 B1 KR 100516248B1
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South Korea
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generating means
film
connected
liquid crystal
scanning
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KR10-1997-0057605A
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Korean (ko)
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KR19980042033A (en
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켕이치 오니사와
토시키 카네코
켕이찌 차라하
에쯔코 니시무라
타케시 사토오
테쯔로 미네무라
키쿠오 오노
카쯔노리 나카지마
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가부시끼가이샤 히다치 세이사꾸쇼
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    • GPHYSICS
    • G02OPTICS
    • G02FDEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH IS MODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THE DEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY, COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g. SWITCHING, GATING, MODULATING OR DEMODULATING; TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF; FREQUENCY-CHANGING; NON-LINEAR OPTICS; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1345Conductors connecting electrodes to cell terminals
    • G02F1/13458Terminal pads
    • GPHYSICS
    • G02OPTICS
    • G02FDEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH IS MODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THE DEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY, COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g. SWITCHING, GATING, MODULATING OR DEMODULATING; TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF; FREQUENCY-CHANGING; NON-LINEAR OPTICS; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • GPHYSICS
    • G02OPTICS
    • G02FDEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH IS MODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THE DEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY, COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g. SWITCHING, GATING, MODULATING OR DEMODULATING; TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF; FREQUENCY-CHANGING; NON-LINEAR OPTICS; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1345Conductors connecting electrodes to cell terminals
    • GPHYSICS
    • G02OPTICS
    • G02FDEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH IS MODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THE DEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY, COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g. SWITCHING, GATING, MODULATING OR DEMODULATING; TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF; FREQUENCY-CHANGING; NON-LINEAR OPTICS; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1345Conductors connecting electrodes to cell terminals
    • G02F1/13452Conductors connecting driver circuitry and terminals of panels
    • GPHYSICS
    • G02OPTICS
    • G02FDEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH IS MODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THE DEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY, COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g. SWITCHING, GATING, MODULATING OR DEMODULATING; TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF; FREQUENCY-CHANGING; NON-LINEAR OPTICS; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • G02F2001/13629Multi-layer wirings
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to an active matrix liquid crystal display device using a thin film transistor (TFT), in particular, an active matrix capable of lowering the contact resistance of a connection portion with an element forming a signal transmission path. It is an object of the present invention to provide a liquid crystal display device, in which a liquid crystal layer containing liquid crystals constituting a plurality of pixels, and a pair of substrates disposed at opposite sides with a liquid crystal layer interposed therebetween and at least one of which is transparent. And a plurality of scan lines arranged on one of the pair of substrates and connected to the scan pulse generating means, the plurality of scan lines generating means for generating the scan pulses, the image data generating means for generating the image data, and a plurality of scan lines connected to the scan pulse generating means; And a plurality of data signal lines arranged so as to intersect the scanning line in a matrix and connected to the image data generating means. In a plurality of display regions surrounded by a plurality of scan lines and a plurality of data signal lines, a transparent pixel electrode disposed on one of the pair of substrates and a liquid crystal layer interposed therebetween with a transparent pixel electrode interposed therebetween to provide liquid crystal driving voltage. A counter electrode applied thereto, a pixel driving semiconductor active element connected to the scanning line, the data signal line and the transparent pixel electrode, and an insulating film covering each of the scanning line, each data signal line and the pixel driving semiconductor active element, respectively; The material of at least one of the elements constituting the scanning line and the signal transmission path associated with the data signal line and the connection portion between the elements is an alloy of Cr with at least one element selected from Nb, Mo, Ta, and W, and the scanning line And the scanning pulse generating means are connected via a first opening formed in the insulating film, and the data signal line and the image data generating means are insulated from each other. A polycrystalline thin film connected to the scanning pulse generating means is inserted into the first opening, and a polycrystalline thin film connected to the image data generating means is inserted into the first opening. An active matrix liquid crystal display device composed of indium tin oxide containing tin oxide mainly composed of indium oxide, and having a specific resistance of 6x10 -4 ? Cm or less.

Description

Active Matrix Liquid Crystal Display and Liquid Crystal Display

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to an active matrix liquid crystal display device and a liquid crystal display device using a thin film transistor (TFT).

In an active matrix liquid crystal display device, a TFT (Thin Film Transistor) is used as a semiconductor active element (switching element). In general, the TFT has a reverse staggered structure, and a gate electrode is formed on a substrate, and a signal line or another electrode is formed thereon. Specifically, a gate insulating film is formed over the scan signal line (the same as the gate line and the gate electrode) on the transparent insulating substrate, a semiconductor layer is formed on the gate insulating film, a drain electrode (data line) and a source electrode are formed on the semiconductor layer. The transparent pixel electrode is connected to the source electrode. The image signal voltage is supplied to the drain electrode (data line). As such a TFT structure is adopted, for example, Japanese Patent Laid-Open No. 2-48639 is known.

On the other hand, two types of mounting methods, such as a tape carrier package (TCP) and a chip on glass (COG), are used to mount a driving circuit or the like on a substrate periphery of a liquid crystal display device. Among these schemes, many TCP schemes have been conventionally adopted, but in recent years, there has been a shift to the COG scheme, which is promising in terms of low cost and fine pitch.

In the COG method, a total of three types of connection between the input terminal of the driving circuit chip and the substrate, the connection between the output terminal and the substrate of the driving circuit chip, and the connection of the FPC (Flexible Printed Cable) connected to the substrate and the external circuit There is a connection. An anisotropic conductive film (ACF) is inserted into each of the connecting portions, and the connection is made via the anisotropic conductive film. In this case, in order to ensure the reliability of the connection, an indium tin oxide (ITO) film to which tin oxide is added, mainly with indium oxide, is used for the wiring material on the substrate side.

The liquid crystal display device using TFT has the feature that display quality is high because active driving is possible. However, the process of forming a TFT on a substrate is complicated, and requires at least six photolithography processes. The reason for this is that the basic elements (films) constituting the TFT include six kinds of scanning signal lines (gate lines), gate insulating films, semiconductor layers, drain electrodes (same as data lines, usually source electrodes), transparent pixel electrodes, and protective insulating films. To pattern each film by photographic plate. In addition, since the thickness of each film is hundreds of nm, and the width of the patterned wiring is fine with an order of 10 µm, the wiring (particularly, the data line and the transparent pixel) in the foreign material is mixed or the stepped overstepped part during the manufacturing process. If the pattern is not easily transferred in the photo-plating process, a short circuit occurs between the electrode wirings. In addition, if surface contamination is applied during the process, the electrical contact resistance between the source electrode and the transparent pixel electrode, the gate line in the terminal portion around the substrate, and the data line and the transparent pixel electrode are remarkably increased. If these phenomena occur, it causes display defects as a liquid crystal display device. That is, the yield of a board | substrate falls and it causes an increase in manufacturing cost.

As one method of improving the yield, in the prior art, an interlayer insulating film (protective insulating film) is formed on the source electrode and the drain electrode of the TFT, and the source electrode, the drain electrode, and the pixel electrode are formed through an opening formed in the interlayer insulating film. A structure for connecting is proposed. According to this structure, it is possible to prevent a short circuit between both electrodes, which tends to occur when the source electrode, the drain electrode, and the transparent pixel electrode are on the same plane.

However, in the prior art, when mounting a driving circuit or a TFT on a substrate of a liquid crystal display device, it is not sufficiently considered to lower the contact resistance of the connecting portion of each element constituting a transmission path through which an electric signal flows, and especially the terminal connecting portion. There is a problem that the yield is low. That is, in the prior art, in connecting the driving circuit chip and the drain wiring, the drain wiring is constituted by Cr, an ITO film is arranged on the driving circuit chip side, and both are contacted over almost the entire surface, and the contact area is increased. The contact resistance is made small. On the other hand, it is desired to reduce the area of the area (peripheral area) other than the display area of the display panel. In order to cope with this demand, if the area of the contact portion is made small, the contact resistance between ITO and Cr (contact resistance per unit area) is high, so that the contact resistance cannot be made small. In addition, when the contact portion increases, moisture penetrates through defects such as pinholes in the sealing resin, and it is easy to cause deterioration of the joint portion.

An object of the present invention is to provide an active matrix liquid crystal display device which can lower the contact resistance of an element forming a signal transmission path and a connection portion between the element.

According to the active matrix liquid crystal display device of the present invention, a liquid crystal layer containing a liquid crystal constituting a plurality of pixels, a pair of substrates arranged at opposite sides with a liquid crystal layer interposed therebetween, and generating a scanning pulse Scanning pulse generating means, image data generating means for generating image data, a plurality of scanning lines arranged in one substrate of a pair of substrates and connected to the scanning pulse generating means, a plurality of scanning lines and a matrix shape And a plurality of data signal lines arranged to intersect and connected to the image data generating means,

In a plurality of display areas surrounded by a plurality of scanning lines and a plurality of data signal lines,

A transparent pixel electrode disposed on one substrate side of the pair of substrates,

A counter electrode disposed to face the transparent pixel electrode with a liquid crystal layer interposed therebetween, to which a liquid crystal driving voltage is applied;

A pixel driving semiconductor active element connected to the scanning line, the data signal line and the transparent pixel electrode, and an insulating film covering each of the scanning line, each data signal line and the pixel driving semiconductor active element,

The material of at least one of the elements constituting the signal transmission path associated with the scan line and the data signal line and the connection portion between the elements is an alloy of Cr with at least one element selected from Nb, Mo, Ta, and W;

It is connected via the first opening formed in the insulating film of the scanning line and the scanning pulse generating means, and the data signal line and the image data generating means are connected via the second opening formed in the insulating film, and the first opening is connected to the scanning pulse generating means. The connected polycrystalline thin film is inserted, and in the second opening, a polycrystalline thin film connected to the image data generating means is inserted, and the polycrystalline thin film is composed of indium tin oxide to which tin oxide is added, mainly with indium oxide. The resistance is less than 6 × 10 -4 Ωcm.

In addition, according to another active matrix liquid crystal display device of the present invention, a liquid crystal layer containing a liquid crystal constituting a plurality of pixels, a pair of substrates arranged at opposite sides with a liquid crystal layer interposed therebetween, and scanning Scanning pulse generating means for generating pulses, image data generating means for generating image data, a plurality of scanning lines arranged to be distributed on one substrate of a pair of substrates and connected to the scanning pulse generating means, and a plurality of scanning lines; A plurality of data signal lines arranged to intersect in a matrix and connected to the image data generating means,

In a plurality of display areas surrounded by a plurality of scanning lines and a plurality of data signal lines,

A transparent pixel electrode disposed on one substrate side of the pair of substrates,

A counter electrode disposed to face the transparent pixel electrode with a liquid crystal layer interposed therebetween, to which a liquid crystal driving voltage is applied;

A pixel driving semiconductor active element connected to the scanning line, the data signal line and the transparent pixel electrode, and an insulating film covering each of the scanning line, each data signal line and the pixel driving semiconductor active element,

At least one material constituting the scan line, the data signal line and the electrode of the pixel driving semiconductor active element is an alloy of Cr with at least one element selected from Nb, Mo, Ta, and W;

The scanning line and the scanning pulse generating means are connected via the first opening formed in the insulating film, and the data signal line and the image data generating means are connected through the second opening formed in the insulating film, and the electrodes of the pixel active semiconductor active element The transparent pixel electrode is connected via a third opening, a polycrystalline thin film connected to the scanning pulse generating means is inserted into the first opening, and a polycrystalline thin film connecting the image data generating means is inserted into the second opening. In the three openings, a polycrystalline thin film connected to a transparent pixel electrode is inserted, and the polycrystalline thin film is composed of indium tin oxide to which tin oxide is added, mainly with indium oxide, and has a resistivity of 6 x 10 -4 Ωcm or less. .

In forming each of the above liquid crystal display devices, the following elements can be added.

(1) The composition of the elements forming the alloy film with Cr is 20 to 80% by weight.

(2) The scanning line and the scanning pulse generating means are formed through a plurality of first openings formed along the scanning line, and the data signal line and the image data generating means are connected via a plurality of second openings formed along the data signal line. have.

(3) The specific contact resistance of the polycrystalline thin film and the alloy in the first opening, the second opening, and the third opening is 1 × 10 −4 Ω μm 2 or less.

(4) A line belonging to the scanning pulse generating means, which is arranged on a substrate outside the display area and connected to the scanning pulse transmitting wiring for transmitting the scanning pulse and the other member via an anisotropic conductive film and displayed as a line belonging to the image data generating means. The image data transfer wiring, which is disposed on a substrate outside the area and transfers the image data, is connected via another member and an anisotropic conductive film, and is connected to another member of the scan pulse transfer wiring and another member of the image data transfer wiring. A polycrystalline thin film is formed on the connection surface with the polycrystalline thin film. The polycrystalline thin film is composed of indium tin oxide to which tin oxide is added, mainly with indium oxide, and has a resistivity of 6 x 10 -4 Ωcm or less.

According to the above means, one of the elements constituting the signal transmission path and the connection portion between the elements is made of an alloy of Cr with at least one element selected from Nb, Mo, Ta, and W, and therefore, the connection portion The contact resistance can be made small, and even if the mounting area of the circuit element is narrowed, the yield can be improved.

EMBODIMENT OF THE INVENTION Hereinafter, one Embodiment of this invention is described based on drawing.

(Embodiment 1)

1 is a cross-sectional view of a drain terminal portion of an active matrix liquid crystal display device according to a first embodiment of the present invention. In Fig. 1, the transparent insulating substrate 1 is formed almost on a flat plate as one component of the display panel. A display region 12 is formed in the center of the transparent insulating substrate 10, and a drain is disposed around the end portion. The terminal portion 14 is formed. A color filter substrate 18 is mounted on the display region 1 of the transparent insulating substrate 10 via a sealant 16. A plurality of drain wirings 20 as data signal lines are dispersed on the transparent insulating substrate 10. It is mounted. A plurality of scanning lines (not shown) are mounted via an insulating layer so as to intersect the drain wirings 20 in a matrix shape, and the plurality of display regions surrounded by the drain wirings 20 and the signal lines correspond to pixels. A transparent pixel electrode, a counter electrode, and a TFT (thin film transistor) as a pixel active semiconductor active element are mounted. A liquid crystal layer containing a liquid crystal forming pixels is formed between the substrate 10 and the color substrate 18.

On the other hand, in the drain terminal portion 14, the driving circuit chip 22, the terminal wiring 24, and the FPC (Flexible Printed Cable) 26 are mounted by the COG method. The drive circuit chip 20 includes circuit elements such as a shift register and is configured as one element of image data generating means for generating image data. Gold bumps are formed on both bottom portions of the driving circuit chip 22, and one bump is connected to the pad portion 30 of the drain wiring 20 via an anisotropic conductive film (ACF) 28. The other bump is connected to the pad portion 34 of the terminal wiring 24 via the anisotropic conductive film 32. In the anisotropic conductive films 28 and 32, plastic particles plated with nickel and gold in this order are dispersed, and when the pressure and heat are applied between the bumps and the pad portions 30 and 34 of the gold, the particles become stuck. The bumps of the gold and the pads 30 and 34 are electrically connected to each other. In other words, the anisotropic conductive films 28 and 32 display conductivity in the vertical direction and insulation in the horizontal direction. The FPC 26 is an external power supply, and is connected to a timing circuit. The FPC 26 has a copper wiring pattern formed on the bottom portion of the pad portion 38 of the terminal wiring 24 via the anisotropic conductive film 28. Is connected to. The sealing resin 40 is coated around the pads 34 and 38 to be isolated from the outside air.

As shown in FIG. 2, the pad part 30 includes an indium tin oxide film (hereinafter referred to as an ITO film) 42 and a protective film 44, and includes a protective film covering the drain wiring 20 ( The ITO film 42 and the drain wiring 20 are connected through the opening part 45 formed in the edge part of the 42. As described later, the drain wiring 20 is formed of an alloy of Cr and Mo. The drain wiring 20 is connected to the drain wiring 20 and the ITO film 42 by the alloy, thereby forming a signal transmission path. The contact resistance of the connection portion with the element can be reduced. An end portion of the ITO film 42 is connected to the bump of the driving circuit chip 22 via the anisotropic conductive film 28. As shown in Fig. 3, the ITO film 42 is formed of the same material as the transparent pixel electrode 46 formed with the TFT element by the same process. The TFT device includes a gate electrode 48, a drain electrode 50, and a source electrode 52 formed on the transparent insulating substrate 10. A gate insulating film 54 is formed on the gate electrode 48, and the gate insulating film is formed. An amorphous silicon (a-Si) semiconductor layer 56 is formed on (54). On the amorphous silicon semiconductor layer 56, n + and a-Si layers 58 doped with high concentration of phosphorus (P) are formed on the amorphous silicon semiconductor layer, and the amorphous silicon semiconductor layer 56 is an n + and a-Si layer. It is bonded to the drain electrode 50 and the source electrode 52 via the (58). The drain electrode 50 and the source electrode 52 are separated by the passivation film 44, and the source electrode 52 is formed of the transparent image electrode 46 via the opening 60 formed in the passivation film 44. Connected. When the TFT is operated by the scan pulse signal applied to the gate electrode 48, the pulse signal by the image data supplied to the drain electrode 50 is applied to the transparent pixel electrode 46 so that an electric field is applied to the liquid crystal. It is. As the electric field is applied to the liquid crystal, the transmittance of the pixel portion changes, so that an image corresponding to the image data is displayed.

On the other hand, in the pads 34 and 38 of the terminal wiring 24, as shown in Fig. 4, since a high frequency signal such as a timing signal is input from the FPC 26, a double structure is adopted. That is, the terminal wiring 24 is composed of an alloy film 62 formed by the same material and the same process as the drain wiring 20 and an ITO film 42 formed by the same process as the transparent pixel electrode 46. It is. The alloy film 62 is formed on the transparent insulating substrate 10 by an alloy of Cr and Mo, and the alloy film 62 is covered with the protective film 44. Openings 64 and 66 are formed in the passivation film 44 at both sides of the alloy film 62, and portions of the ITO film 42 stacked on the passivation film 44 are formed in the openings 64 and 66. The ITO film 42 and the alloy film 62 are joined at the openings 64 and 66. The ITO film 42 in the opening 64 is connected to the gold bumps of the drive circuit chip 22 via the anisotropic conductive film 28, and the ITO film 42 in the opening 66 is anisotropic. It is connected to the wiring pattern of the FPC 26 via the conductive film 36. Since the alloy film 62 is comprised in the alloy of Cr and Mo, the contact resistance in the junction part of the alloy film 62 and the ITO film 42 can be made small. In addition, since the alloy film 62 is joined to the ITO film 42 only through the openings 64 and 66, and other portions are covered by the protective film 44, the periphery of the terminal wiring 24 is increased. By inject | coating with sealing resin, invasion of water can be prevented twice. In addition, since the end portion of the alloy film 62 is covered by the protective film 44 and is bonded to the ITO film 42 only through the openings 64 and 66, the water is caused by the alloy film ( The battery reaction (corrosion) occurs between 62) and the ITO film 42, and the contact resistance can be increased or the terminal wiring 24 can be prevented from being broken and the reliability can be improved.

According to the present embodiment, since the drain wiring 20 is formed of an alloy of Cr and Mo, and the drain van line 20 and the ITO film 42 are connected, the drain wiring in the signal transmission path for transmitting the recall data is carried out. The contact resistance between the connection portion 20 and the ITO film 420 can be reduced.

In the above embodiment, the junction between the element constituting the signal transmission path for transmitting image data and the element has been described, but the junction between the element and the element constituting the transmission path for transmitting the scan pulse from the scanning pulse generating means is described. Also, the structure similar to the said embodiment can be employ | adopted. Also in this case, the contact resistance of the connection portion can be made low.

(Embodiment 2)

Next, a method of forming a film constituting the drain wiring 20 and the terminal wiring 24 will be described.

First, drain wiring 20 and terminal wiring 24 using a conventional DC magnetron sputtering device were deposited and film characteristics were evaluated. As compared with Cr films widely used as gate wiring and drain wiring, Mo to Cr It was found that in the alloy to which the alloy was added, the specific resistance and the film stress of the film can be greatly reduced. Subsequently, the contact characteristics of the alloy with Mo added to Cr and ITO were evaluated. It was found that the contact characteristics were significantly improved as compared with the contact characteristics between the Cr film and ITO.

Next, based on these findings, a Cr-Mo alloy film of the same size as the mass production product was used, using a cluster type DC magnetron sputtering device which has recently been widely operated in mass production lines for TFTs. It was formed on rod silicate glass (370 mm × 470 mm × 0.7 mm (thickness)). The Mo composition of the Cr-Mo alloy target was 50 wt (wt.%). The target was mixed with 50 wt% Cr and Mo powder, and then ), Solidified by HIP (Hot Isostatic Press) method, molded into a size of 260 mm x 243 mm x 6 mm by machining, and the six sheets were bonded onto a copper backing plate. The power of the sputtering device was 9.6 kW, the pressure of argon gas was 0.4 Pa, the Cr-Mo alloy film was deposited, and the film thickness was 20 nm, and the sheet resistance was measured by a 4-point probe method. The film thickness was measured using a stylus type profiler. Using the measured values was obtained a specific resistance. In addition to creating a film on a Si wafer, to obtain the amount of warpage of the wafer, the film stress was calculated. The results obtained are shown in Table 1 below.

Figure pat00001

In addition, similar experiments were performed on the 100% Cr films used in the past for comparison with the results of the Cr-Mo alloy films (Table 1), and the results as shown in the following Table 2 were obtained.

Figure pat00002

From Table 1, when the Cr-Mo alloy film is used, the resistivity and film stress decrease with the increase of the substrate temperature, and the film stress is almost zero at the substrate temperature of 200 deg. C (corresponding to the temperature in the TFT generation process). It can be seen that. In addition, even when compared with the result with the Cr film shown in Table 2, it turns out that a specific resistance is low and film stress is exceptionally small. In addition, as a result of further investigation on the substrate temperature of 130 ° C, the characteristics of the Cr film were not improved, but in the case of the Cr-Mo alloy film, the sputtering power and the pressure were optimized for the specific resistance of 18 μΩcm and the film stress of 180 MPa. It could reduce.

Next, in order to observe the structure of the obtained film, the Cr-Mo alloy film and the Cr film were observed with a scanning electron microscope (SEM) at a substrate temperature of 200 ° C. As a result, in the Cr-Mo alloy film, a large domain structure having a particle diameter of about 500 nm consisting of subgrains having a size of 50 to 100 nm was recognized. It is thought that each dovein structure acts as one crystal grain. As a result of observing the cross section of the film, it is understood that the crystal grain boundary is not reliably recognized, and that large crystal grains are densely packed. Furthermore, it was found that the cut surface of the membrane was torn apart, and the membrane was soft and, in other words, excellent in ductility. On the other hand, in the Cr film, the crystal grain diameter was smaller than 50 nm or less, and the crystal grain boundary was certainly recognized from the observation of the cross section. Therefore, in the Cr film, it can be judged that the small crystal grains are relatively coarsely packed and the ductility is small.

(Embodiment 3)

Next, the patterning characteristics of the Cr-50wt% Mo alloy film prepared in Embodiment 2 will be described.

First, the wiring pattern of the resist was formed by a photolithography step, and then etching was performed using a 15% aqueous solution of cerium ammonium nitrate, which is an etching solution for Cr. The shower type apparatus was used for this etching.

Next, the cross section of the formed Cr-Mo alloy film pattern was observed with the scanning electron microscope. As a result, it was found that in the Cr film, the pattern surface is almost vertical, whereas in the Cr-Mo alloy film, it is tapered, and the taper angle is about 50 degrees. In addition, the relationship between the taper angle and the fabrication process conditions was examined in detail. As a result, the taper was found to depend on the baking conditions of the photoresist and the ejection pressure of the shower etching. It was demonstrated. In the case of the Cr film, the reason why the taper cannot be formed well is that the adhesion between the Cr film and the resist is so strong that the etching surface does not easily penetrate the interface between them. The taper in the Cr-Mo alloy film is achieved by the intrusion of the etching liquid between the film and the resist and the etching progressing in the transverse direction (the direction perpendicular to the film thickness).

(Embodiment 4)

Next, the contact characteristics of the Cr film and the ITO film and the contact properties of the Cr-Mo alloy film and the ITO film will be described.

First, a Cr film and a Cr- (50wt%) Mo alloy film are deposited on a well cleaned glass substrate by a cluster type DC magnetron sputtering method. At this time, the substrate temperature was 200 ° C and the film thickness was 200 nm. The film was processed into a plurality of wiring patterns by means of a photographic flat plate, and the line width was set to 30 占 퐉, and pads were formed at the distal end to mount the point probe for measurement. The Cr film and the Cr- (50wt%) Mo alloy film were also processed by the wet etching method using a dicerium ammonium nitrate aqueous solution. After the resist was peeled off, an SiN film of an interlayer insulating film was formed on the metal wiring pattern by plasma CVD. At this time, the substrate temperature was 300 deg. C and the film thickness was 350 nm. Next, a through hole pattern was formed in the SiN film on the metal wiring by a photographic flat plate. The through-hole of the SiN film was processed by the dry etching method using the mixed gas of CF4 and 02. Next, after the resist was peeled off, the ITO film was deposited by a DC magnetron sputtering method (a conventional inline type was used in this step).

Next, two types of cases where a mixed gas of Ar and 02 are used as the sputter gas at a substrate temperature of 200 ° C. and a mixed gas of Ar and H20 are used as the sputter gas when the substrate temperature is at room temperature are used. It was. In the former case, a polycrystalline ITO film (hereinafter referred to as P-ITO) in the deposited state, and in the latter case, an amorphous ITO film (hereinafter referred to as a-ITO) in the deposited state. . In the case of amorphous, since heat of up to about 240 ° C. is applied in a later process, it is crystallized and finally polycrystalline. In addition, the film thickness was 140 nm in either case. Subsequently, the ITO film was patterned by the photographic flat plate, and the evaluation pattern of the contact resistance which intersects the metal wiring film and + magnetic field was created through the through-hole of a SiN film | membrane. The current flows from Cr to ITO, and the voltage drop V at the contact portion between the Cr film and the ITO film and the contact portion between the Cr-Mo alloy film and the ITO film is measured by a four-point probe method, respectively. From this measurement result, the specific contact resistance was obtained. The results are shown in Table 3 below.

Figure pat00003

From Table 3, when the Cr-Mo alloy film is used as the metal film, it can be seen that the specific contact resistance is lower than that of Cr regardless of ITO being polycrystalline or amorphous. As will be described later, it has been found that the contact portions in the pad portions 30, 34, 38 need to have a non-contact resistance of 1 × 10 5 Ωm 2 or less. Therefore, in the case of Cr film, it turns out that contact characteristics are inadequate.

In addition, it was found that the above-mentioned non-contact resistance depends on the resistance value of the ITO film itself. In other words, when the specific resistance of the ITO film is larger than 6 × 10 −4 Ωm, the specific contact resistance value cannot be made 1 × 10 5 Ω μm 2 or less even in the Cr-Mo alloy film. In addition, the specific resistance of the ITO film changes depending on the sputtering conditions of the ITO film. For example, in the case of P-IOT, if the amount of O 2 added is too high, the specific resistance of the ITO film increases, and in the case of a-ITO, the amount of H 2 O added is too high. If it increases, it rises. And the amount of H 2 O can be equal to or less than 2% with respect to Ar, the non-contact resistance to below 1 × 10 5 Ω㎛ 2.

(Embodiment 5)

The structure of the display part at the time of producing a liquid crystal display device (TFT-LCD) using the technique established by said embodiment is demonstrated.

5 is a plan view of one pixel of a display unit of a liquid crystal display device. In addition, the structure of the TFT part of the created device is the same as that of FIG. 3, and the drain terminal part is the same as the structure shown in FIG. In FIG. 5, a pixel electrode 46 is formed in the display area surrounded by the drain wiring 20 and the gate wiring 68, and a TFT is formed. The source electrode 52 and the pixel electrode 46 of the TFT are electrically connected to each other via the contact column CN1 opened in the protective film 44. By adopting such a structure, the following effects can be obtained.

(1) Since the drain wiring 20 and the pixel electrode 46 are two-layered, the probability of occurrence of a short circuit between the two can be significantly reduced, and a defect based thereon can be prevented.

(2) The light blocking film 70 is formed by using the gate electrode 48 and the gate wiring 68, and the pixel electrode 46 is formed so as to cover the pixel electrode 46 therebetween. Can eliminate light leakage. Therefore, the black matrix formed on the color filter substrate 18 facing the transparent insulating substrate 10 can be omitted. This can suppress the deviation of the alignment between the transparent insulating substrate 10 and the color filter substrate 18, thereby further improving the aperture ratio of the pixel portion.

For the same reason as (2), the pixel electrode 46 and the gate wiring 68 are superimposed on one another, whereby the additional capacitance Cadd can be formed (the other side of the gate wiring 68 and the source electrode 62). Parasitic capacitance Cgs due to nesting). For this reason, light leakage from this part can be eliminated and an aperture ratio can be improved.

(4) Between the drain wiring 20 and the pixel electrode 46, as shown in FIG. 3, the laminated insulating film of the gate insulating film 54 and the gate insulating film 54 / protective film 44 is interposed through the light shielding film 70. Since the capacitive coupling, the parasitic capacitance between the two electrodes can be reduced.

The number of photomasks in the case of employing the structure in this embodiment is: (1) gate electrode, (2) n + , a-Si layer (58) / amorphous silicon semiconductor layer (56), (3) gate insulating film (54), and (4) source. 6 of the electrode 52 and the drain electrode 50, the protective film 44 (the electrode terminal and the pixel electrode portion are formed through-holes), and the pixel electrode 46, 3 is omitted, and the mask pattern of ⑤ is omitted. It can also be used simultaneously. In this case, since the number of photomasks is reduced to five, an increase in the number of manufacturing patterns, that is, an improvement in system efficiency can be realized. In the above, the TFT element portion has been described with the mind in mind, but it goes without saying that the terminal portion can be formed by the same process (no additional step), which is a feature of the present invention.

Here, the structure of the drain terminal portion 14 of the TFT panel prepared with the photomask number 5 is shown in FIG. In the case of the drain terminal portion 14 shown in Fig. 6, the gate insulating film 54 is provided under the drain wiring 20 as compared with the case where the number of photomasks is six, and the gate insulating film 54 and the protective film 44 The end faces coincide. As described above, the processing of the gate insulating film using the photomask is omitted, and the gate insulating film and the protective film 44 are collectively processed by the same photomask.

Next, a TFT substrate was produced by the above method. As the ITO film 42, a P-ITO film having a substrate temperature of 200 deg. Here, in order to compare, ten pieces of the following three types were created, respectively.

(a) Gate electrode: Cr-50wt% Mo alloy film / source electrode and drain electrode: Cr-50wt% Mo alloy film

(b) Gate electrode: Cr-50wt% Mo alloy film / source electrode and drain electrode: Cr film

(c) Gate electrode: Cr film / source electrode and drain electrode: Cr-50wt% Mo alloy film

All of the above metal films were deposited under the conditions of the substrate temperature of 200 deg. Moreover, the etching was performed by the method described in the third embodiment. Therefore, the taper is formed in the gate electrode of (a) and (b), and the pattern end part which is substantially perpendicular is formed in (c). During such panel preparation, a conveyance trouble, which can be considered to be due to the warpage of the substrate, occurred in the cluster sputtering device when the electrode film was deposited in the structure according to (c). Thus, substrate transfer could be prevented by careful transfer, but it took a long time to prepare. This is due to the high stress of the Cr film, which causes a decrease in system efficiency in mass production. This point also shows that the Cr-Mo alloy film is excellent.

Next, the defect of the obtained panel is investigated and a result is shown in following Table 4.

Figure pat00004

From Table 4, in the structure of (a), one panel with disconnection occurred in the drain wiring 20, but this was a case where foreign matter existed in the CVD film as a result of the investigation, and the drain wiring 20 had no problem. It became clear. In the structure of (b), the disconnection of the drain wiring occurred in all the panels. As a result of examining the cross-sectional structure of the device, it was found that Cr of the drain wiring was disconnected at the portion where the drain wiring rides over the gate wiring. The reason for this is that a large stress of about 1000 MPa is generated in the Cr film, and since the direction of the stress is tensile, it is considered that the wiring is cut off at the stepped portion. In the structure (c), two occurrences of disconnection of the gate wiring were recognized. As a result of investigating this raw material, it is estimated that a minute flaw exists in a glass substrate, an etching liquid penetrates into this part at the time of the etching of Cr wiring, and Cr cut | disconnected. The same groove exists in the panel using Cr-Mo alloy wiring, but the Cr-Mo alloy film is etched because the crystal grain diameter is significantly larger than that of the Cr film, and the ductility of the film is larger than that of the Cr film. It is hard to be disconnected at the time. From Table 4, it can be seen that in the structure of (c), although no taper was formed in the gate wiring, disconnection did not occur in the drain wiring. From this, by using the Cr-Mo alloy film for wiring, the effect of expanding the process margin can be expected.

Subsequently, the entire panel without disconnection defects and a part of the defective panel were transferred to the LCD process to prepare an LCD device. That is, an alignment film is formed on the counter substrate and the TFT panel each having the color filter and the common transparent electrode, and the surfaces thereof are rubbed, and then the beads are dispersed. And after apply | coating a sealing agent, both are stuck together and the surroundings are sealed. Then, the cells are cut and bonded together, the liquid crystal is sealed between them, and the sealing opening is sealed. Then, the glass of the terminal part is cut | disconnected. The polarizing plate is mounted on the glass surface. In this way, after the LCD device was completed, the backlight was installed to check the lighting state. As a result, in the panel using the Cr-Mo alloy film for the drain wiring 20, point defects and linear phase defects in which pixels were missing were not recognized, and it was confirmed that it was in a good state. The occurrence of no point defects indicates that the source electrode 52 and the transparent pixel electrode 46 are in a good electrical connection state in the contact hole CN1 (opening portion 60) in FIGS. 3 and 5.

Next, after the external signal circuit was mounted using the drive circuit chip 22 and the FPC 26 in the terminal portion of the panel, the panel was driven. As a result, when Cr was used for the drain wiring, it was found that display unevenness occurred. This result was examined and found to be due to insufficient contact of ITO / Cr at the terminal wiring section and high non-contact resistance. In addition, as a result of investigating the threshold value at which display unevenness occurred using a contact resistance evaluation element provided in the outer peripheral part of the panel, if the non-contact resistance was approximately 1 × 10 5 Ωm 2 or less, such display unevenness did not occur. Became evident. It goes without saying that when the wiring Cr-Mo alloy film was used, display unevenness did not occur at all.

Next, after evaluation of the panel, the panel was transferred to a high temperature and high humidity test, and the reliability here was evaluated. As a result, it has been demonstrated that the display quality does not decrease at all in the panel using the wiring Cr-Mo alloy film.

Next, a modification of the terminal portion structure is shown in FIG. In the structure of the terminal portion shown in FIG. 7, the drain wiring 20 and the ITO film 42 are joined over almost the entire surface. However, both ends of the drain wiring 20 are covered with the protective film 44. By adopting such a structure, even if water intrudes from the outside through the unsealed resin to the surface of the ITO film 42, for example, the water enters the interface between the ITO film 42 and the drain wiring 22. Can be suppressed.

In order to obtain the effect of the present invention, it is basic to lower the contact resistance of the joint by using one of the elements constituting the signal transmission path and the connection portion between the elements as an alloy of Cr and Mo. Therefore, as another modification, it is needless to say that the gate wiring or / and the drain wiring are constituted by the laminated film, and the effect is achieved even if the main alloy is applied only to the uppermost layer, that is, only to the opening surface. Specifically, when the film thickness of the CrMo alloy of the uppermost layer was formed to be 20 nm or more, it was confirmed that the contact resistance was reduced and the effect of the present invention could be achieved. In addition, as described later, if the alloy is composed of at least one element selected from Nb, Mo, Ta, and W and Cr instead of an alloy of Cr and Mo, the specific contact resistance of the junction is 1 × 10 -4. It can be made low as a value of (ohmmicrometer) 2 or less.

The reason why the contact resistance of the Cr-Mo alloy film is significantly lower than that of the Cr film is that the film surface is irradiated by photoelectron spectroscopy, and the thickness of the oxide film formed on the surface of the Cr-Mo alloy film is thinner than that of the Cr film surface. It is assumed that the structure is different from that of the Cr film surface.

From the above, by using the Cr-Mo alloy film as the wiring film of the TFT panel, high yield can be realized during the process and in the reliability test, and the lower cost of the liquid crystal display device can be promoted.

Embodiment 6

Next, application of another alloy film will be described. In order to use an alloy film other than the Cr-Mo alloy film, an alloy film containing 5, 10, 20, 30, and 50 wt% of Nb, Ta, and W, respectively, was fabricated on the Cr film, and the resistivity and film stress of these alloy films were measured. . The method for producing an alloy film is the same as that described in Embodiment 2. Among the measurement results of these alloy films, the film stress was about the same as that of Mo shown in Embodiment 2 in the case of Nb. In the case of Ta and W, the drop of stress was recognized from the addition amount less than Mo, ie, about 10 wt%. From these things, it is judged that the same effect as Cr-Mo alloy film can be acquired by alloying any element with Cr. Regarding the specific resistance, it was found that the addition of Nb, Ta, and W performed here is higher than that of the Cr-Mo alloy film. Therefore, Nb, Ta, and W are very effective as elements for forming an alloy film with Cr. However, considering the results of both film stress and specific resistance, it is judged that Mo addition is most excellent.

In addition, although the Mo composition of the Cr-Mo alloy film was mainly demonstrated to 50 wt%, when reducing a non-contact resistance, the thing of the wide range of 20 to 80 wt% can be used. However, as the Mo composition increases, it is used in the range of 30 to 55 wt% due to the decrease in the rate of etching using the aqueous solution of dicerium ammonium nitrate and the increase of the film stress as the Mo composition decreases. It is desirable to.

As described above, according to the present invention, one of the elements constituting the signal transmission path and the connection portion between the elements is made of an alloy of Cr with at least one element selected from Nb, Mo, Ta, and W. Therefore, the contact resistance of the junction portion can be lowered and contribute to the improvement of the yield.

1 is a cross-sectional view of a drain terminal portion of a liquid crystal display device showing an embodiment of the present invention.

2 is a cross-sectional view of the terminal connecting portion

3 is a cross-sectional view of the TFT element

4 is a cross-sectional view of terminal wiring;

5 is a plan view of a pixel portion of a TFT panel

6 is a cross-sectional view of the drain terminal when the number of photomasks is 5;

7 is a sectional view showing another modification of the drain terminal portion;

<Explanation of symbols for main parts of drawing>

10: transparent insulating substrate 12: display area

14: drain terminal portion 16: sealant

18: color filter substrate 20: drain wiring

22: driver circuit chip 24: terminal wiring

26: flexible printed cable (FPC) 28, 32, 36: anisotropic conductive film (ACF)

30, 34, 38: pad portion 40: sealing resin

42: indium tin oxide film (ITO film) 44: protective film

45, 60, 64, 66: opening 46: transparent pixel electrode

48: gate electrode 50: drain electrode

52: source electrode 54: gate insulating film

56: amorphous silicon semiconductor layer 58: n + , a-Si layer

62: alloy film 68: gate wiring

70: shading film

Claims (23)

  1. A pair of substrates at least one of which is transparent;
    A liquid crystal layer interposed between the pair of substrates;
    Scanning pulse generating means;
    Image data generating means:
    A plurality of scanning lines disposed on one of the pair of substrates and connected to the scanning pulse generating means;
    A plurality of data signal lines arranged to intersect the plurality of scanning lines in a matrix form and connected to the image data generating means,
    In the plurality of pixels surrounded by the plurality of scanning lines and the plurality of data signal lines,
    A transparent pixel electrode disposed on one of the pair of substrates;
    A counter electrode disposed to face the transparent pixel electrode with the liquid crystal layer interposed therebetween, and having a liquid crystal driving voltage applied thereto;
    A pixel driving semiconductor active element connected to a scanning line, a data signal line and a transparent pixel electrode, an insulating film covering each scanning line and each data signal line;
    An active matrix liquid crystal display device further comprising:
    The material forming portion to which the scanning line and the scanning pulse generating means are connected, and the data signal line and the image data generating means, is approximately similar to a Cr alloy containing at least one chemical element selected from the group consisting of Nb, Mo, Ta and W. Composition,
    The scanning line and the scanning pulse generating means are connected to each other via a first opening formed in the insulating film, and the data signal line and the image data generating means are connected to each other via a second opening formed in the insulating film, and connected to the scanning pulse generating means. The polycrystalline thin film is inserted into the first opening, the polycrystalline thin film connected to the image data generating means is inserted into the second opening, and the polycrystalline thin film is composed of indium tin oxide containing indium oxide as a main component and tin oxide added. The active matrix liquid crystal display device, characterized in that the specific resistance is greater than 0Ωcm and less than 6 x 10 -4 Ωcm.
  2. The method of claim 1,
    The scanning line and the scanning pulse generating means are connected via a plurality of first openings formed along the scanning line,
    And said data signal line and said image data generating means are connected via a plurality of second openings formed along said data signal line.
  3. The method of claim 1,
    The non-contact resistance between the polycrystalline thin film and the alloy in the first opening and the second opening is 1 x 10 3 Ω 2 or more and 1 x 10 5 Ω 2 or less.
  4. The method of claim 1,
    An active matrix liquid crystal display device, wherein the chemical element forming the alloy with Cr is in the range of 20 to 80% by weight.
  5. The method of claim 1,
    A line belonging to the scanning pulse generating means, which is arranged on the substrate outside the pixel and transmits the scanning pulse, is connected to the first member via the anisotropic conductive film,
    A line belonging to the image data generating means, which is disposed on a substrate outside the pixel and transfers image data, is connected to the second member via an anisotropic conductive film,
    Polycrystalline thin films are formed on the connection surface of the scanning pulse transmission line and the first member and the connection surface of the image data transmission line and the second member, respectively.
    The polycrystalline thin film is an active matrix liquid crystal display device comprising an indium tin oxide composed mainly of indium oxide and to which tin oxide is added, and having a specific resistance of greater than 0 Ωcm and less than 6 x 10 -4 Ωcm.
  6. The method of claim 1,
    And at least one of the scanning line and the data signal line is formed of a material different from that of the connecting portion in a region other than the connecting portion.
  7. The method of claim 6,
    And said polycrystalline film is composed of ITO composed of indium oxide as a main component and tin oxide as an additive.
  8. The method of claim 6,
    And said polycrystalline film forming a part of said signal line is formed on said Cr-Mo alloy film at said connection portion.
  9. The method of claim 6,
    And a non-contact resistance between the polycrystalline film and the Cr-Mo alloy film is 1 x 10 3 Ωm 2 or more and 1 x 10 5 Ωcm 2 or less.
  10. A pair of substrates at least one of which is transparent;
    A liquid crystal layer interposed between the pair of substrates;
    Scanning pulse generating means;
    Image data generating means;
    A plurality of scan lines distributed on one of the pair of substrates and connected to the scan pulse generating means;
    A plurality of data signal lines arranged to intersect the plurality of scanning lines in a matrix shape and connected to the image data generating means,
    In the plurality of pixels surrounded by the plurality of scanning lines and the plurality of data signal lines,
    A transparent pixel electrode disposed on one of the pair of substrates;
    A counter electrode disposed to face the transparent pixel electrode with the liquid crystal layer interposed therebetween, and having a liquid crystal driving voltage applied thereto;
    A pixel active semiconductor active element connected to the scan line, the data signal line and the transparent pixel electrode, an insulating film covering each scan line and each data signal line;
    An active matrix liquid crystal display device further comprising:
    At least one portion for connecting the scanning line and the scanning pulse generating means, at least one portion for connecting the data signal line and the image data generating means, and at least one portion for connecting the transparent pixel electrode with an electrode composed of the semiconductor active element for pixel driving The material formed on has a composition similar to Cr alloy containing at least one chemical element selected from the group consisting of Nb, Mo, Ta and W,
    The scanning line and the scanning pulse generating means are connected to each other via a first opening formed in the insulating film, and the data signal line and the image data generating means are connected to each other via a second opening formed in the insulating film, and the semiconductor active element for pixel driving The electrode and the transparent pixel electrode are connected to each other via a third opening formed in the insulating film, and a polycrystalline film connected to the scanning pulse generating means is inserted into the first opening, and a polycrystalline film connecting to the image data generating means is inserted into the second opening. And a polycrystalline thin film connected to the transparent pixel electrode is inserted into a third opening, and the polycrystalline thin film is composed of indium tin oxide containing indium oxide as a main component and tin oxide added, and has a specific resistance of greater than 0? An active matrix liquid crystal display device, characterized in that less than -4 Ωcm.
  11. The method of claim 10,
    The scanning line and the scanning pulse generating means are connected via a plurality of first openings formed along the scanning line, and the data line and the image data generating means are connected via a plurality of second openings formed along the data line. An active matrix liquid crystal display device.
  12. The method of claim 10,
    The first opening and a non-contact resistance between the polycrystalline thin film and the alloy from the second opening is, 1 x 10 3 Ω㎛ active matrix type liquid crystal display device, characterized in that two or more 1 x 10 52 below.
  13. The method of claim 10,
    A non-contact resistance between the polycrystalline thin film and the alloy at the first opening, the second opening, and the third opening is between 1 x 10 3 Ω μm 2 and 1 x 10 5 Ω μm 2 .
  14. The method of claim 10,
    An active matrix liquid crystal display device, wherein the chemical element forming the alloy with Cr is in the range of 20 to 80% by weight.
  15. The method of claim 10,
    A line belonging to the scanning pulse generating means and transmitting a scanning pulse arranged outside the pixel is connected to the first member via the anisotropic conductive film;
    A line belonging to the image data generating means for transmitting the image data arranged outside the pixel is connected to the second member via the anisotropic conductive film;
    A polycrystalline thin film is formed on the connection surface between the line for scanning pulse transmission and the first member and the connection surface between the line for transmission of the image data and the second member, respectively;
    The polycrystalline thin film, and is made mainly of indium oxide composed of indium tin oxide on the tin oxide in addition, an active matrix type liquid crystal display device, characterized in that specific resistance is not higher than 6 x 10 -4 Ω㎛ than 0Ωcm.
  16. The method of claim 10,
    And at least one of the scanning line and the data signal line is formed of a material other than the material constituting the connecting portion in a region other than the connecting portion.
  17. The method of claim 16,
    And the ITO has a specific resistance of greater than 0 Ωcm and less than 6 x 10 -4 Ωcm.
  18. A pair of substrates at least one of which is transparent;
    A liquid crystal layer interposed between the pair of substrates;
    Scanning pulse generating means;
    Image data generating means;
    A plurality of scanning lines disposed on one of the pair of substrates and connected to the scanning pulse generating means;
    A plurality of data signal lines arranged to intersect the plurality of scanning lines in a matrix shape and connected to the image data generating means,
    In the plurality of pixels surrounded by the plurality of scanning lines and the plurality of data signal lines,
    A pair of electrodes including a pixel electrode and an opposite electrode;
    A pixel active semiconductor active element connected to the scan line, the data signal line, and the pixel electrode, an insulating film covering each scan line and each data signal line;
    A composition which connects the scanning line and the scanning pulse generating means and forms the portion connecting the data signal line and the image data generating means, and is substantially similar to a Cr alloy containing at least one chemical element selected from the group consisting of Nb, Mo, Ta, and W; With substances
    In an active matrix liquid crystal display device further comprising:
    The scanning line and the scanning pulse generating means are connected to each other via a first opening formed in the insulating film, and the data signal line and the image data generating means are connected to each other via a second opening formed in the insulating film, and connected to the scanning pulse generating means. The polycrystalline thin film is inserted into the first opening, the polycrystalline thin film connected to the image data generating means is inserted into the second opening, and the polycrystalline thin film is composed of indium tin oxide containing indium oxide as a main component and tin oxide added. The active matrix liquid crystal display device, characterized in that the specific resistance is greater than 0Ωcm and less than 6 x 10 -4 Ωcm.
  19. The method of claim 18,
    And at least one of the scanning line and the data signal line is formed of a material different from that of the connecting portion in a region other than the connecting portion.
  20. The Cr-Mo alloy film is formed at one end of the transparent pixel electrode made of the polycrystalline film and at the portion connecting the source electrode of the transistor,
    A signal line made of a polycrystalline film is connected to a driving circuit chip disposed on a substrate via an anisotropic conductive film.
  21. With a pair of substrates,
    A liquid crystal layer interposed between the pair of substrates,
    A liquid crystal display device comprising at least a transistor, a transparent pixel electrode, a signal line, and a driving circuit chip formed on at least one of a pair of substrates,
    The Cr-Mo alloy film is formed at a portion connecting one end of the transparent pixel electrode made of the polycrystalline film to the source electrode of the transistor,
    A signal line made of a polycrystalline film is connected to a driving circuit needle disposed on one of a pair of substrates via an anisotropic conductive film.
  22. The Cr-Mo alloy film is formed at one end of the transparent pixel electrode made of the polycrystalline film and at the portion connecting the source electrode of the transistor and at the end connecting the signal electrode and one end of the data signal line made of the polycrystalline film.
    A signal line made of a polycrystalline film is connected to a driving circuit chip disposed on a substrate via an anisotropic conductive film.
  23. The Cr-Mo alloy film is formed at one end of the transparent pixel electrode made of a polycrystalline thin film and at the portion connecting the source electrode of the transistor and at one end of the scan line made of the polycrystalline film and the signal electrode.
    A scanning line made of a polycrystalline film is connected to a driving circuit chip disposed on a substrate via an anisotropic conductive film.
KR10-1997-0057605A 1996-11-01 1997-11-01 Active Matrix Liquid Crystal Display and Liquid Crystal Display KR100516248B1 (en)

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JP3255942B2 (en) * 1991-06-19 2002-02-12 株式会社半導体エネルギー研究所 Method for manufacturing inverted staggered thin film transistor
JP3866783B2 (en) 1995-07-25 2007-01-10 株式会社 日立ディスプレイズ Liquid Crystal Display
JP2985124B2 (en) * 1997-06-12 1999-11-29 株式会社日立製作所 Liquid Crystal Display
JP4004672B2 (en) 1998-12-28 2007-11-07 シャープ株式会社 Substrate for liquid crystal display device and manufacturing method thereof
TWI255957B (en) * 1999-03-26 2006-06-01 Hitachi Ltd Liquid crystal display device and method of manufacturing the same
JP4627843B2 (en) 1999-07-22 2011-02-09 株式会社半導体エネルギー研究所 Semiconductor device
JP2001053283A (en) * 1999-08-12 2001-02-23 Semiconductor Energy Lab Co Ltd Semiconductor device and its manufacture
CN1186683C (en) * 1999-09-08 2005-01-26 松下电器产业株式会社 Display device and method of manufacture thereof
JP3670577B2 (en) * 2000-01-26 2005-07-13 シャープ株式会社 Liquid crystal display device and manufacturing method thereof
JP2002245947A (en) * 2000-12-15 2002-08-30 Canon Inc Substrate with thin line, manufacturing method thereof, electron source substrate and image display device
TW512536B (en) * 2001-02-21 2002-12-01 Au Optronics Corp Reflective TFT-LCD having pixel electrode with coarse diffuser
JP2002296609A (en) 2001-03-29 2002-10-09 Nec Corp Liquid crystal display device and its manufacturing method
KR100796749B1 (en) * 2001-05-16 2008-01-22 삼성전자주식회사 A thin film transistor array substrate for a liquid crystal display
JP3603890B2 (en) * 2002-03-06 2004-12-22 セイコーエプソン株式会社 Electronic device, method of manufacturing the same, and electronic apparatus
JP2004247373A (en) * 2003-02-12 2004-09-02 Semiconductor Energy Lab Co Ltd Semiconductor device
JP2004317924A (en) 2003-04-18 2004-11-11 Advanced Display Inc Display device and method for manufacturing display device
US7372528B2 (en) * 2003-06-09 2008-05-13 Samsung Electronics Co., Ltd. Array substrate, method of manufacturing the same and liquid crystal display apparatus having the same
KR100905662B1 (en) * 2003-06-26 2009-06-30 엘지디스플레이 주식회사 Method for manufacturing lcd and structure of lcd wiring
US8937580B2 (en) * 2003-08-08 2015-01-20 Semiconductor Energy Laboratory Co., Ltd. Driving method of light emitting device and light emitting device
KR101006438B1 (en) 2003-11-12 2011-01-06 삼성전자주식회사 Liquid crystal display
JP4202300B2 (en) * 2004-06-24 2008-12-24 三菱電機株式会社 Liquid crystal display device and method for inspecting liquid crystal display device
JP2006047827A (en) * 2004-08-06 2006-02-16 Mitsubishi Electric Corp Liquid crystal display and its manufacturing method
JP2006066676A (en) * 2004-08-27 2006-03-09 Seiko Epson Corp Electro-optical device and electronic machine
KR101085451B1 (en) * 2005-02-11 2011-11-21 삼성전자주식회사 Tft substrate for display apparatus and manufacturing method of the same
JP2006309028A (en) * 2005-04-28 2006-11-09 Sanyo Epson Imaging Devices Corp Display device and method for manufacturing display device
JP4662350B2 (en) * 2005-07-21 2011-03-30 エプソンイメージングデバイス株式会社 Liquid crystal display device and manufacturing method thereof
US8747387B2 (en) * 2005-10-11 2014-06-10 Covidien Lp IV catheter with in-line valve and methods related thereto
JP4894477B2 (en) * 2005-12-15 2012-03-14 ソニー株式会社 Electro-optical device, mounting structure, and electronic apparatus
JP5057321B2 (en) 2006-03-14 2012-10-24 株式会社ジャパンディスプレイウェスト Manufacturing method of display device
JP4952425B2 (en) * 2006-08-21 2012-06-13 ソニー株式会社 Liquid crystal device and electronic device
US20090079057A1 (en) * 2007-09-24 2009-03-26 Infineon Technologies Ag Integrated circuit device
JP5299768B2 (en) * 2009-01-26 2013-09-25 Nltテクノロジー株式会社 Thin film transistor array substrate, manufacturing method thereof, and liquid crystal display device
JP2013029532A (en) * 2009-11-20 2013-02-07 Sharp Corp Liquid crystal display device and manufacturing method for liquid crystal display device
JP2012073341A (en) * 2010-09-28 2012-04-12 Hitachi Displays Ltd Liquid crystal display device
CN103632972A (en) * 2012-08-23 2014-03-12 中国科学院微电子研究所 Semiconductor structure and manufacture method thereof
US20140069696A1 (en) * 2012-09-11 2014-03-13 Apple Inc. Methods and apparatus for attaching multi-layer flex circuits to substrates
US9228717B2 (en) * 2013-11-28 2016-01-05 Lg Display Co., Ltd. Quantum rod compound including electron acceptor and quantum rod luminescent display device including the same
JP2015129863A (en) * 2014-01-08 2015-07-16 パナソニック液晶ディスプレイ株式会社 Liquid-crystal display and manufacturing method thereof
CN105304646A (en) * 2015-10-19 2016-02-03 京东方科技集团股份有限公司 Array substrate and manufacture method thereof, display panel and display device
AT15220U1 (en) * 2016-03-07 2017-03-15 Ceratizit Austria Gmbh Process for producing a hard material layer on a substrate, hard material layer, cutting tool and coating source
US9960151B2 (en) * 2016-08-02 2018-05-01 Novatek Microelectronics Corp. Semiconductor device, display panel assembly, semiconductor structure

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4666252A (en) * 1984-06-29 1987-05-19 Energy Conversion Devices, Inc. High yield liquid crystal display and method of making same
US5187604A (en) * 1989-01-18 1993-02-16 Hitachi, Ltd. Multi-layer external terminals of liquid crystal displays with thin-film transistors
US5071800A (en) * 1989-02-28 1991-12-10 Tosoh Corporation Oxide powder, sintered body, process for preparation thereof and targe composed thereof
JP2794499B2 (en) * 1991-03-26 1998-09-03 株式会社半導体エネルギー研究所 Method for manufacturing semiconductor device
KR970000359B1 (en) * 1991-09-26 1997-01-08 사또오 후미오 Liquid crystal display device
JPH05249478A (en) * 1991-12-25 1993-09-28 Toshiba Corp Liquid crystal display device
US5401701A (en) * 1992-08-19 1995-03-28 Tosoh Corporation Ito sintered body and method of manufacturing the same
JP3098345B2 (en) * 1992-12-28 2000-10-16 富士通株式会社 Thin film transistor matrix device and method of manufacturing the same
JP3132310B2 (en) * 1994-11-18 2001-02-05 株式会社日立製作所 Active matrix type liquid crystal display
JPH08291899A (en) 1995-04-20 1996-11-05 Chubu Electric Power Co Inc Vaporizer for liquefied natural gas and cooling and stand-by holding method thereof
US5777710A (en) * 1995-04-28 1998-07-07 Canon Kabushiki Kaisha Electrode substrate, making the same, liquid crystal device provided therewith, and making the same
US5835177A (en) * 1995-10-05 1998-11-10 Kabushiki Kaisha Toshiba Array substrate with bus lines takeout/terminal sections having multiple conductive layers

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US20010002855A1 (en) 2001-06-07
TW374121B (en) 1999-11-11

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