KR100467804B1 - Formation method of fuse box in semiconductor device - Google Patents

Formation method of fuse box in semiconductor device Download PDF

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Publication number
KR100467804B1
KR100467804B1 KR10-2002-0080764A KR20020080764A KR100467804B1 KR 100467804 B1 KR100467804 B1 KR 100467804B1 KR 20020080764 A KR20020080764 A KR 20020080764A KR 100467804 B1 KR100467804 B1 KR 100467804B1
Authority
KR
South Korea
Prior art keywords
fuse box
pad
passivation layer
exposure mask
forming
Prior art date
Application number
KR10-2002-0080764A
Other languages
Korean (ko)
Other versions
KR20040054098A (en
Inventor
김재영
Original Assignee
동부아남반도체 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 동부아남반도체 주식회사 filed Critical 동부아남반도체 주식회사
Priority to KR10-2002-0080764A priority Critical patent/KR100467804B1/en
Publication of KR20040054098A publication Critical patent/KR20040054098A/en
Application granted granted Critical
Publication of KR100467804B1 publication Critical patent/KR100467804B1/en

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Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H01L23/5256Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274Photolithographic processes
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/62Protection against overvoltage, e.g. fuses, shunts

Abstract

A method of forming a fuse box of a semiconductor device which prevents damage to a fuse box due to excessive etching and simplifies a manufacturing process of a fuse box by omitting an oxide film forming process, wherein a fuse box and a pad are formed on a semiconductor substrate, respectively. A passivation layer is formed to cover the fuse box and the pad, a photosensitive film is formed on the passivation layer, and an exposure mask is disposed on the passivation layer. By adjusting the light transmittance of the exposure mask, part of the photoresist film on the upper part of the fuse box is removed while the photoresist film on the pad is completely removed to form a photoresist pattern. Is partially left and the passivation layer on top of the pad is completely removed to expose the pad.

Description

Formation method of fuse box of semiconductor device {FORMATION METHOD OF FUSE BOX IN SEMICONDUCTOR DEVICE}

The present invention relates to a method of forming a fuse box of a semiconductor device, and more particularly, to a method of forming a fuse box of a semiconductor device to prevent damage to a fuse box due to excessive etching and to simplify a manufacturing process.

Generally, semiconductor devices add extra circuitry in memory design to replace defective devices or circuits, which are made up of spare rows or columns formed adjacent to the memory array, Each device is tested in the wafer state and replaced with an extra row or column when a failure occurs in any row or column.

The replacement of the defective memory is made by flowing excessive current through the fuse box formed in the semiconductor device or by breaking the fuse box by irradiating a laser beam. Therefore, the fuse box forming process is very important for improving yield and quality in semiconductor devices. In addition, the fuse box generates a die ID to track manufacturing history in the event of a failure, contributing to preventing recurrence and improving quality.

1A to 1D are cross-sectional views illustrating a method of forming a fuse box of a conventional semiconductor device. First, as illustrated in FIG. 1A, a photoresist pattern 4 is formed on the passivation layer 3 covering the fuse box 1 and the pad 2, and the passivation exposed using the photoresist pattern 4 as a mask. The layer 3 is etched.

At this time, since excessive etching is performed to completely remove the protective metal layer 5 of the pad 2, excessive etching proceeds as compared to the thickness of the passivation layer 3 on the top of the fuse box 2 as shown in FIG. 1B. The fuse box 1 and the pad 2 are opened by etching.

Subsequently, as shown in FIG. 1C, an oxide film 7 is formed along the upper surface shape of the semiconductor substrate 6 to prevent contamination by impurities during the laser repair process, and finally, as shown in FIG. 1D. In order to disconnect the fuse box 1, a laser repair process of irradiating the laser beam 8 is performed.

As described above, the fuse box 1 is excessively etched to expose the pad 2, thereby causing damage to the fuse box 1, and when the fuse box 1 is damaged, a laser repair process, which is the next process, is performed. There is a problem that it is impossible to replace the bad memory because it cannot proceed.

Therefore, the present invention is to solve the above problems, an object of the present invention is to prevent the damage of the fuse box by preventing excessive etching in the fuse box, a method of forming a fuse box of a semiconductor device to simplify the manufacturing process of the fuse box To provide.

1A to 1D are cross-sectional views illustrating a method of forming a fuse box of a conventional semiconductor device.

2A to 2D are cross-sectional views illustrating a fuse box forming method of a semiconductor device according to the present invention.

In order to achieve the above object, the present invention,

Forming fuse boxes and pads on the semiconductor substrate at random intervals and covering the fuse boxes and pads with a passivation layer; Forming a photoresist film on the passivation layer; Arranging an exposure mask on the passivation layer, and adjusting the light transmittance of the exposure mask to partially remove the photoresist film on the fuse box while completely removing the photoresist film on the pad to form a photoresist pattern; A method of forming a fuse box of a semiconductor device may include etching a passivation layer exposed by a photoresist pattern to partially retain the passivation layer on the fuse box, and completely removing the passivation layer on the pad to expose the pad. .

After exposing the pads, the exposed pads are tested for defects. When the pads are exposed, a laser repair process of cutting the fuse boxes by irradiating a laser beam to the fuse box is performed.

Preferably, the fuse box has a laminated structure of a barrier metal film, a metal wiring film, and a protective metal film, and the thickness of the passivation layer remaining on the fuse box is preferably in the range of 6,000 to 10,000 kPa.

The exposure mask arranges a first light transmitting part having a light transmittance of 60 to 80% corresponding to the upper part of the fuse box, and a second light transmitting part having a light transmittance of 100% corresponding to the upper part of the pad. Preferably, the first light transmitting portion of the exposure mask is formed to have a larger width than the fuse box, and the second light transmitting portion of the exposure mask is formed to have a width smaller than the pad.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2A to 2D are cross-sectional views illustrating a fuse box forming method of a semiconductor device according to the present invention.

First, as shown in FIG. 2A, a fuse box 12 and a pad 13 are formed on the semiconductor substrate 11, and the semiconductor substrate 11 is formed to cover the fuse box 12 and the pad 13. The passivation layer 14 is formed thick on it. At this time, the fuse box 12 and the pad 13 are made of a barrier metal film 15, a metal wiring film 16, and a protective metal layer 17, respectively.

Then, the photosensitive film 18 is coated on the passivation layer 14, and an exposure mask 19 for exposing the photosensitive film 18 is disposed on the passivation layer 14. The exposure mask 19 has a first light transmitting portion 19A having a light transmittance of 60 to 80% correspondingly disposed on an upper end of the fuse box 12, and a second light transmitting portion 19B having a light transmittance of 100% is padded. (13) It consists of corresponding arrangement on the upper end.

In this case, the first light transmitting portion 19A of the exposure mask 19 is preferably formed to have a larger width than the fuse box 12, and the second light transmitting portion 19B is formed to have a smaller width than the pad 13. It is preferable.

Subsequently, ultraviolet rays (indicated by arrows in the figure) are irradiated through a light source not shown on the top of the exposure mask 19. As a result, ultraviolet rays passing through the first light transmitting portion 19A of the exposure mask 19 reach the photosensitive film 18 only 60-80% of the irradiated amount, partially dissolving the photosensitive film 18a in this portion, and exposing the exposure mask. Ultraviolet light passing through the second light transmitting portion 19B of (19) reaches 100% of the irradiated amount to completely dissolve the photosensitive film 18b in this portion.

When the photoresist film 18 is developed after the above-described exposure step, the photoresist pattern 20 is formed as shown in FIG. 2B, and the photoresist film having an arbitrary thickness d1 remains on the top of the fuse box 12 so that the fuse box 12 may be formed. The top of the passivation layer 14 is not exposed, and the photosensitive film is completely removed on the top of the pad 13 to expose the passivation layer 14 of the top of the pad 13.

Next, as shown in FIG. 2C, the passivation layer 14 is etched using the photosensitive film pattern 20 described above as a mask. As a result, in the pad 13 portion, the passivation layer 14 on the top of the pad 13 and the protective metal layer 17 of the pad 13 are removed to expose the metal wiring film 16 of the pad 13, but the fuse box is exposed. In the part (12), etching progresses slowly by the remaining photosensitive film, and the passivation layer 14 of arbitrary thickness d2 remains on the fuse box 12 upper part.

At this time, the thickness d2 of the passivation layer 14 remaining on the upper portion of the fuse box 12 is preferably 2000 to 4000 mW so that a subsequent laser repair process may be easily performed. For example, the passivation layer 14 having a thickness of 3000 mW may be used. ) May remain.

Thus, in the present invention, the fuse box 12 is not completely exposed, and the passivation layer 14 of any thickness remains on top thereof. As a result, the present invention prevents damage to the fuse box 12 in the process of opening the fuse box 12 to facilitate the subsequent laser repair process.

In addition, since the oxide film forming process that is preceded for the laser repair process may be omitted by the passivation layer 14 remaining on the fuse box 12, the present invention has an advantage of simplifying the manufacturing process of the fuse box.

Subsequently, if a defect occurs in any row or column after testing each device through the exposed pad 13, as shown in FIG. 2D, the fuse box 12 is irradiated with a laser beam 21 to fuse the fuse. Performing a laser repair process that breaks the box 12 replaces the defective row or column with an extra row or column.

Although the preferred embodiments of the present invention have been described above, the present invention is not limited thereto, and various modifications and changes can be made within the scope of the claims and the detailed description of the invention and the accompanying drawings. Naturally, it belongs to the range of.

As described above, according to the present invention, the laser repair process is smoothly performed by preventing damage to the fuse box in the process of opening the fuse box, and an oxide film is formed after the fuse box is opened by the passivation layer remaining on the fuse box. The process can be omitted, which simplifies the manufacturing process of the fuse box.

Claims (7)

  1. Forming a fuse box and a pad on the semiconductor substrate at random intervals, and forming a passivation layer on the semiconductor substrate to cover the fuse box and the pad;
    Forming a photoresist film on the passivation layer;
    Arranging an exposure mask on the passivation layer, and adjusting the light transmittance of the exposure mask to partially remove the photoresist film on the upper portion of the fuse box while completely removing the photoresist film on the pad to form a photoresist pattern; And
    Etching the passivation layer exposed by the photoresist pattern to partially retain the passivation layer on the fuse box, and completely removing the passivation layer on the pad to expose the pad;
    The exposure mask includes a semiconductor in which a first light transmitting portion having a light transmittance of 60 to 80% is disposed corresponding to an upper portion of the fuse box and a second light transmitting portion having a light transmittance of 100% is disposed corresponding to an upper portion of the pad. How to form a fuse box of the device.
  2. The method of claim 1,
    And a laser repair process of cutting the fuse box by irradiating a laser beam to the fuse box when the defect is generated by testing whether the defect is caused by the exposed pad.
  3. The method of claim 1,
    A fuse box forming method of a semiconductor device, wherein the fuse box has a laminated structure of a barrier metal film, a metal wiring film, and a protective metal film.
  4. delete
  5. The method of claim 1,
    And a first light transmitting portion of the exposure mask having a width larger than that of the fuse box.
  6. The method of claim 1,
    And a second light transmitting portion of the exposure mask having a width smaller than that of the pad.
  7. The method of claim 1,
    A method of forming a fuse box of a semiconductor device, wherein a thickness of a passivation layer remaining on the fuse box is in the range of 2000 to 4000 GPa.
KR10-2002-0080764A 2002-12-17 2002-12-17 Formation method of fuse box in semiconductor device KR100467804B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR10-2002-0080764A KR100467804B1 (en) 2002-12-17 2002-12-17 Formation method of fuse box in semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR10-2002-0080764A KR100467804B1 (en) 2002-12-17 2002-12-17 Formation method of fuse box in semiconductor device

Publications (2)

Publication Number Publication Date
KR20040054098A KR20040054098A (en) 2004-06-25
KR100467804B1 true KR100467804B1 (en) 2005-01-25

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KR10-2002-0080764A KR100467804B1 (en) 2002-12-17 2002-12-17 Formation method of fuse box in semiconductor device

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100927412B1 (en) * 2007-12-21 2009-11-19 주식회사 하이닉스반도체 Manufacturing Method of Semiconductor Device
KR100979242B1 (en) 2008-04-28 2010-08-31 주식회사 하이닉스반도체 Semiconductor device and method for manufacturing the same

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100703837B1 (en) * 2005-06-09 2007-04-06 주식회사 하이닉스반도체 Method for fabricating semiconductor memory device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100927412B1 (en) * 2007-12-21 2009-11-19 주식회사 하이닉스반도체 Manufacturing Method of Semiconductor Device
KR100979242B1 (en) 2008-04-28 2010-08-31 주식회사 하이닉스반도체 Semiconductor device and method for manufacturing the same

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Publication number Publication date
KR20040054098A (en) 2004-06-25

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