KR100286808B1 - BGA resin barrier - Google Patents
BGA resin barrier Download PDFInfo
- Publication number
- KR100286808B1 KR100286808B1 KR1019980056822A KR19980056822A KR100286808B1 KR 100286808 B1 KR100286808 B1 KR 100286808B1 KR 1019980056822 A KR1019980056822 A KR 1019980056822A KR 19980056822 A KR19980056822 A KR 19980056822A KR 100286808 B1 KR100286808 B1 KR 100286808B1
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- KR
- South Korea
- Prior art keywords
- bga
- blocking film
- resin
- chip
- chip component
- Prior art date
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- 229920005989 resin Polymers 0.000 title claims abstract description 42
- 239000011347 resin Substances 0.000 title claims abstract description 42
- 230000004888 barrier function Effects 0.000 title claims description 8
- 230000000903 blocking effect Effects 0.000 claims abstract description 32
- 238000007650 screen-printing Methods 0.000 claims abstract description 14
- 229910000679 solder Inorganic materials 0.000 claims abstract description 14
- 239000000758 substrate Substances 0.000 claims description 14
- 238000010438 heat treatment Methods 0.000 claims description 3
- 230000008878 coupling Effects 0.000 claims 1
- 238000010168 coupling process Methods 0.000 claims 1
- 238000005859 coupling reaction Methods 0.000 claims 1
- 239000003822 epoxy resin Substances 0.000 abstract description 13
- 229920000647 polyepoxide Polymers 0.000 abstract description 13
- 239000004850 liquid epoxy resins (LERs) Substances 0.000 abstract description 7
- 239000007788 liquid Substances 0.000 abstract description 2
- 238000000465 moulding Methods 0.000 abstract description 2
- 238000009413 insulation Methods 0.000 description 6
- 230000002093 peripheral effect Effects 0.000 description 4
- 229920001721 polyimide Polymers 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B05—SPRAYING OR ATOMISING IN GENERAL; APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
- B05D—PROCESSES FOR APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
- B05D7/00—Processes, other than flocking, specially adapted for applying liquids or other fluent materials to particular surfaces or for applying particular liquids or other fluent materials
- B05D7/24—Processes, other than flocking, specially adapted for applying liquids or other fluent materials to particular surfaces or for applying particular liquids or other fluent materials for applying particular liquids or other fluent materials
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B05—SPRAYING OR ATOMISING IN GENERAL; APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
- B05D—PROCESSES FOR APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
- B05D7/00—Processes, other than flocking, specially adapted for applying liquids or other fluent materials to particular surfaces or for applying particular liquids or other fluent materials
- B05D7/50—Multilayers
- B05D7/51—One specific pretreatment, e.g. phosphatation, chromatation, in combination with one specific coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B05—SPRAYING OR ATOMISING IN GENERAL; APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
- B05D—PROCESSES FOR APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
- B05D2350/00—Pretreatment of the substrate
- B05D2350/30—Change of the surface
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B05—SPRAYING OR ATOMISING IN GENERAL; APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
- B05D—PROCESSES FOR APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
- B05D2504/00—Epoxy polymers
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Life Sciences & Earth Sciences (AREA)
- Wood Science & Technology (AREA)
- Manufacturing & Machinery (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
본 발명은 BGA에 실장되는 칩 부품의 절연을 위하여 도포되는 에폭시수지 몰딩액의 흘러 넘치는 현상을 방지하기 위하여 BGA의 칩 부품 장착부 주연으로 수지 차단막을 형성하는 BGA의 수지 차단막에 관한 것으로 이는 특히, 칩 부품(20)이 장착되는 BGA(10)의 칩 장착부(70) 주연에는 1차 스크린 인쇄를 통한 일정한 폭(W)의 수지 차단막(80)이 형성되며, 상기 일정폭의 수지 차단막(80) 상측에는 2차 스크린 인쇄를 통한 일정높이(H)의 수지 차단막(80')을 형성토록 하는 것을 요지로 한다.The present invention relates to a resin blocking film of BGA that forms a resin blocking film around the periphery of the chip component mounting part of the BGA in order to prevent overflow of the epoxy resin molding liquid applied to insulate the chip component mounted on the BGA. On the periphery of the chip mounting portion 70 of the BGA 10 on which the component 20 is mounted, a resin blocking film 80 having a constant width W is formed through primary screen printing, and the upper side of the resin blocking film 80 having a predetermined width is formed. In the following description, the resin blocking film 80 'having a predetermined height H is formed by secondary screen printing.
이에 따라서, BGA에 실장되는 칩 부품의 절연을 위한 에폭시 수지의 도포시, 상기 액상의 에폭시 수지가 BGA의 솔더볼주위로 유입되는 현상을 방지하는 것이다.Accordingly, when the epoxy resin is applied to insulate the chip component mounted on the BGA, the liquid epoxy resin is prevented from flowing around the solder ball of the BGA.
Description
본 발명은 칩(Chip)부품이 실장되는 비 지 에이(Ball Grid Array)(이하 "BGA" 라함)에 있어서, 상기 BGA에 실장되는 칩 부품의 절연을 위하여 도포되는 에폭시수지 몰딩액의 흘러 넘치는 현상을 방지하기 위하여 BGA의 칩 부품 장착부 주연으로 수지 차단막을 형성하는 BGA의 수지 차단막에 관한 것으로 이는 특히, 칩 부품이 장착되는 BGA의 칩 장착부 주연으로 1차 스크린 인쇄를 통한 일정한 폭의 수지 차단막이 형성되며, 상기 일정폭의 수지 차단막 상측에는 2차 스크린 인쇄를 통한 일정높이의 수지 차단막을 형성토록 함으로 인하여, BGA에 실장되는 칩 부품의 절연을 위한 에폭시 수지의 도포시, 상기 액상의 에폭시 수지가 BGA의 솔더볼(solder ball)주위로 유입되는 현상을 방지하고, 이로인한 BGA의 기판상에 실장불량을 방지시킬 수 있도록한 BGA의 수지 차단막에 관한 것이다.The present invention is a phenomenon in which a flow of epoxy resin molding liquid coated for insulation of chip components mounted on the BGA in a ball grid array (hereinafter referred to as "BGA") in which chip components are mounted. The resin blocking film of the BGA to form a resin blocking film around the chip component mounting portion of the BGA to prevent the problem, in particular, the resin blocking film of a constant width through the primary screen printing to the peripheral portion of the chip mounting portion of the BGA to which the chip components are mounted When the epoxy resin for insulation of the chip component mounted on the BGA is formed by forming a resin barrier film having a predetermined height on the upper side of the resin barrier film by the second screen printing, the liquid epoxy resin is BGA. It is possible to prevent the flow of solder balls around the solder ball and to prevent the mounting defects on the BGA substrate. It is.
일반적으로 알려져있는 BGA에 있어서는, 폴리이미드 필름상으로 제조되는 연성기판의 중앙으로 전자부품인 칩(Chip)이 삽입되는 캐비티(Cavity)를 형성한후, 상기 캐비티 내부에 칩 부품을 삽입하여 칩부품으로 부터 인출되는 리드를 BGA 표면에 연결하고, 상기 BGA에 실장된 칩 부품의 절연을 위하여 그 표면에 절연수지인 에폭시 수지를 도포 경화하고, 상기 BGA에 형성된 다수의 솔더볼을 이용하여 기판상에 일체로 실장하는 것이다.In a generally known BGA, a cavity is formed in which a chip, which is an electronic component, is inserted into the center of a flexible substrate made of a polyimide film, and then a chip component is inserted into the cavity. Connect the lead drawn from the BGA to the surface of BGA, apply epoxy resin, which is an insulating resin, on the surface of the BGA to insulate the chip components mounted on the BGA, and integrate it onto the substrate using a plurality of solder balls formed on the BGA. Is to be mounted.
이와같은 기술과 관련된 종래의 BGA의 구조에 있어서는 도 1에 도시한 바와같이, 상기 BGA(10)의 중앙으로 내부에 칩 부품(20)이 실장되는 칩 실장홈(30)이 형성되며, 상기 IC 실장홈(30)내에 실장되는 칩 부품(20)의 주연으로 리드(40)를 인출하여 상기 BGA(10) 표면에 연결 접속되고, 상기 칩 실장홈(30) 주연의 BGA(10)표면에는 다수의 솔더볼(50)이 돌출 형성되어 기판(60)상에 가열에 의해 실장토록 되는 구성으로 이루어진다.In the conventional BGA structure related to such a technology, as shown in FIG. 1, a chip mounting groove 30 in which a chip component 20 is mounted is formed in the center of the BGA 10, and the IC The lead 40 is drawn out and connected to the surface of the BGA 10 at the periphery of the chip component 20 mounted in the mounting groove 30, and a large number is provided on the surface of the BGA 10 at the periphery of the chip mounting groove 30. Solder ball 50 is formed to protrude and is configured to be mounted on the substrate 60 by heating.
상기와 같은 구성으로 이루어진 종래의 BGA(10)는 도 2에 도시한 바와같이, 폴리이미드로 구성되는 필름상의 BGA(10) 중앙에 칩 캐비티인 실장홈(30)이 형성되는 상태에서, 상기 칩 실장홈(30)내에 칩 부품(20)을 내삽한후 칩 부품(20)로 부터 인출되는 리드(40)를 BGA(10) 표면에 실장한후, 절연수지인 에폭시 수지를 칩 부품 표면에 도포하여 이를 경화시키며, 상기와같은 BGA(10)를 기판(60)의 실장위치에 올려놓고 열을 가함에 따라, 상기 BGA(10)에 무수히 돌출된 솔더볼(50)이 용융되어 기판(60)상에 실장이 완료되는 것이다.As shown in FIG. 2, the conventional BGA 10 having the above configuration has a chip cavity mounting groove 30 formed at the center of the BGA 10 formed of a polyimide film. After inserting the chip component 20 into the mounting groove 30, the lead 40 drawn from the chip component 20 is mounted on the surface of the BGA 10, and then an epoxy resin, which is an insulating resin, is applied to the chip component surface. By hardening it, and placing the BGA 10 in the mounting position of the substrate 60 and applying heat, the solder ball 50 protruding innumerably to the BGA 10 is melted onto the substrate 60. The implementation is complete.
그러나, 상기 BGA(10)에 실장되는 칩 부품(20)은 절연을 위하여 그 표면에 액상의 에폭시 수지를 일정한 두께로 도포한후 이를 경화시키도록 함으로써, 상기 에폭시 수지 도포시 액상의 에폭시 수지가 칩 부품(20)의 표면은 물론, 그 주위에 설치되는 솔더볼(50) 주위까지 흘러 넘치게 되는 현상이 발생하게 되며, 상기와같은 경우 BGA(10)를 기판(60)상에 실장시 납땜불량을 유발하게 되는 문제점이 있었던 것이다.However, the chip component 20 mounted on the BGA 10 is coated with a liquid epoxy resin in a predetermined thickness on its surface for insulation and then cured. Thus, when the epoxy resin is applied, the liquid epoxy resin is chipped. The phenomenon that the surface of the component 20 flows to the surroundings of the solder ball 50 installed around the surface of the component 20 may occur, and in the above case, the soldering failure may occur when the BGA 10 is mounted on the substrate 60. There was a problem.
본 발명은 상기한 바와같은 종래의 여러 문제점들을 개선하기 위하여 안출된 것으로서 그 목적은, BGA에 실장되는 칩 부품의 절연을 위한 에폭시 수지의 도포시, 상기 액상의 에폭시 수지가 BGA의 솔더볼주위로 유입되는 현상을 방지하고, 이로인한 BGA의 기판상에 실장불량을 방지시킬 수 있도록 함은 물론, BGA에 도포되는 에폭시 수지의 도포에 따른 작업성 및 생산성을 향상시킬 수 있는 BGA의 수지 차단막을 제공하는데 있다.SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems. The object of the present invention is that, when the epoxy resin is applied for the insulation of the chip components mounted on the BGA, the liquid epoxy resin flows around the solder ball of the BGA. It provides a resin blocking film of BGA that can prevent the phenomenon, and thereby prevent the mounting failure on the substrate of the BGA, as well as improve the workability and productivity according to the application of the epoxy resin applied to the BGA. have.
도 1은 일반적인 BGA의 개략 사시도.1 is a schematic perspective view of a typical BGA.
도 2는 종래 칩 부품이 실장된 BGA가 기판상에 결합된 상태를 나타낸 정단면 구조도.Figure 2 is a front cross-sectional view showing a state in which a conventional BGA mounted chip component is coupled on a substrate.
도 3은 본 발명에 따른 수지 차단막이 설치되는 BGA의 개략 사시도.Figure 3 is a schematic perspective view of the BGA is installed resin blocking film according to the present invention.
도 4는 본 발명의 수지 차단막이 설치되는 BGA의 결합상태 정단면 구조도.Figure 4 is a cross-sectional structure of the bonded state of the BGA is installed resin blocking film of the present invention.
도 5는 본 발명에 의한 BGA 표면에 수지 차단막이 형성되는 과정을 나타낸 요부 구조도.5 is a main structural diagram showing a process of forming a resin blocking film on the BGA surface according to the present invention.
* 도면의 주요 부분에 대한 부호의 설명 *Explanation of symbols on the main parts of the drawings
10...BGA 20...칩 부품10 ... BGA 20 ... Chip Components
30...칩 실장홈 30...리드30 ... chip mounting groove 30 ... lead
50...솔더볼 60...기판50 Solder Ball 60 Substrate
70...칩 장착부 80,80'...수지 차단막70 Chip insert 80,80 'Resin barrier
상기 목적을 달성하기 위한 기술적인 구성으로서 본 발명은, 칩 부품이 장착되는 BGA의 칩 장착부 주연으로 1차 스크린 인쇄를 통한 일정한 폭의 수지 차단막이 형성되며, 상기 일정폭의 수지 차단막 상측에는 2차 스크린 인쇄를 통한 일정높이의 수지 차단막을 형성토록 하는 구성으로 이루어진 BGA의 수지 차단막을 마련함에 의한다.As a technical configuration for achieving the above object, the present invention, the resin barrier film of a constant width through the first screen printing is formed around the chip mounting portion of the BGA on which the chip component is mounted, the secondary on the resin barrier film of the constant width By providing a resin blocking film of BGA made of a configuration to form a resin blocking film of a certain height through screen printing.
이하, 첨부된 도면에 의거하여 본 발명의 실시예를 상세하게 설명하면 다음과 같다.Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.
도 3은 본 발명에 따른 수지 차단막이 설치되는 BGA의 개략 사시도이고, 도 4는 본 발명의 수지 차단막이 설치되는 BGA의 결합상태 정단면 구조도로서 제 1도와 연계하여 설명하면, BGA(10)의 중앙으로 내부에 칩 부품(20)이 실장되는 칩 실장홈(30)이 형성되며, 상기 칩 실장홈(30)내에 실장되는 칩 부품(20)의 주연으로 리드(40)를 인출하여 상기 BGA(10) 표면에 연결 접속되고, 상기 칩 실장홈(30) 주연의 BGA(10)표면에는 다수의 솔더볼(50)이 돌출 형성되어 기판(60)상에 가열에 의해 실장토록 설치된다.3 is a schematic perspective view of a BGA in which a resin blocking film according to the present invention is installed, and FIG. 4 is a schematic cross-sectional structural view of the BGA in which the resin blocking film of the present invention is installed, and will be described in connection with FIG. The chip mounting groove 30 in which the chip component 20 is mounted is formed at the center thereof, and the lead 40 is drawn out at the periphery of the chip component 20 mounted in the chip mounting groove 30 to the BGA ( 10) It is connected to the surface, a plurality of solder balls 50 protrudingly formed on the surface of the BGA (10) around the chip mounting groove 30 is installed on the substrate 60 by heating.
또한, 상기 칩 부품(20)이 장착되는 BGA(10)의 칩 장착부(70) 주연에는 1차 스크린 인쇄를 통한 일정한 폭(W)의 수지 차단막(80)이 형성되며, 상기 일정폭의 수지 차단막(80) 상측에는 2차 스크린 인쇄를 통한 일정높이(H)의 수지 차단막(80')을 형성토록 하는 구성으로 이루어진다.In addition, a resin blocking film 80 having a constant width W is formed on the peripheral edge of the chip mounting part 70 of the BGA 10 on which the chip component 20 is mounted, and the resin blocking film having the predetermined width is formed. (80) On the upper side is made of a configuration to form a resin blocking film (80 ') of a predetermined height (H) through secondary screen printing.
이와같은 구성으로 이루어진 본 발명의 작용 및 효과를 설명하면 다음과 같다.Referring to the operation and effect of the present invention made of such a configuration as follows.
도3 및 도 4에 도시한 바와같이, 폴리이미드로 구성되는 필름상의 BGA(10)의 중앙에 칩 부품의 캐비티인 칩 실장홈(30)을 엣칭(etching) 또는 펀칭(punching)등에 의해 사각형 형상으로 형성시킨 상태에서, 상기 칩 실장홈(30) 내부에 칩 부품(20)을 내삽시키고, 상기 칩 부품(20)의 주연으로 부터 인출되는 다수의 리드(40)는 상기 BGA(10)의 표면에 인쇄된 동박패턴에 연결 접속시킨후, 절연수지로서 칩 품(20)과 일체로 그 표면을 몰딩하게 된다.3 and 4, a rectangular shape is formed by etching or punching the chip mounting groove 30, which is a cavity of the chip component, in the center of the film-shaped BGA 10 made of polyimide. In the formed state, the chip component 20 is inserted into the chip mounting groove 30, and the plurality of leads 40 drawn out from the periphery of the chip component 20 has a surface of the BGA 10. After connection to the copper foil pattern printed on the surface, the surface of the chip product 20 is integrally molded with the insulating resin.
상기와같이 칩 실장홈(30) 내부에 칩 부품(20)이 실장된 BGA(10)는 기판(60)의 실장위치에 올려놓고 열을 가함에 따라, 상기 BGA(10) 표면에 무수히 돌출된 납으로 구성되는 솔더볼(50)이 열에 의해 용융되어 실장이 완료되도록 한다.As described above, the BGA 10 in which the chip component 20 is mounted in the chip mounting groove 30 is placed on the mounting position of the substrate 60 and applied with heat, protruding innumerably from the surface of the BGA 10. The solder ball 50 made of lead is melted by heat to complete the mounting.
한편, 상기 칩 부품(20)이 장착되는 BGA(10)의 칩 부품(20)이 장착되는 칩 장착부(70) 주연으로, 상기 칩 부품(20)의 절연을 위해 도포되는 액상의 에폭시 수지의 흘러넘침을 방지시키기 위하여, 상기 칩 부품 장착부(70)의 주연에 도 5에서와 같이 1차 스크린 인쇄를 통한 일정한 폭(W)의 잉크 수지 차단막(80)을 형성시키게 된다.On the other hand, the peripheral portion of the chip mounting portion 70 is mounted on the chip component 20 of the BGA (10) on which the chip component 20 is mounted, the flow of a liquid epoxy resin applied for the insulation of the chip component 20 In order to prevent the overflow, the ink resin blocking film 80 having a constant width W is formed on the peripheral edge of the chip component mounting unit 70 through primary screen printing as shown in FIG. 5.
계속해서, 상기와 같이 일정한 폭(W)의 잉크를 통해 형성된 수지 차단막(80) 상측에는, 재차 2차 스크린 인쇄를 통한 일정높이(H)의 수지 차단막(80')을 형성시켜 댐(Dam) 역할을 수행할 수 있도록 하며, 이때 상기 스크린 인쇄를 통해 형성되는 수지 차단막(80')의 높이(H)는 BGA(10) 표면에 돌설되는 솔더볼(50)의 돌출 높이보다 작게 형성시키게 된다.Subsequently, on the upper side of the resin blocking film 80 formed through the ink having a constant width W as described above, the dam blocking film 80 'is formed again by the second screen printing. In this case, the height H of the resin blocking film 80 ′ formed through the screen printing is smaller than the height of the protrusion of the solder ball 50 protruding from the surface of the BGA 10.
따라서, 상기 BGA(10)의 칩 부품 장착부(70) 주연에 형성된 일정한 폭과, 일정한 높이를 갖는 수지 차단막(80)(80')에 의해, 상기 칩 부품 장착부(70)에 도포되는 에폭시 수지는 상기 수지 차단막(80)(80') 내부에만 도포 및 경화토록 되어, 에폭시 수지의 흘러 넘침으로 인한 BGA(10)의 실장불량을 미연에 방지할 수 있게 되는 것이다.Therefore, the epoxy resin applied to the chip component mounting portion 70 by the resin blocking films 80 and 80 'having a predetermined width and a constant height formed at the periphery of the chip component mounting portion 70 of the BGA 10. It is to be applied and cured only inside the resin blocking film 80 (80 '), it is possible to prevent the mounting failure of the BGA (10) due to the overflow of the epoxy resin in advance.
이상과 같이 본 발명에 따른 BGA의 수지 차단막에 의하면, BGA에 실장되는 칩 부품의 절연을 위한 에폭시 수지의 도포시, 상기 액상의 에폭시 수지가 BGA의 솔더볼주위로 유입되는 현상을 방지하고, 이로인한 BGA의 기판상에 실장불량을 방지시킬 수 있게 됨은 물론, BGA에 도포되는 에폭시 수지의 도포에 따른 작업성 및 생산성을 향상시킬 수 있는 우수한 효과가 있다.According to the resin blocking film of the BGA according to the present invention as described above, when the epoxy resin for the insulation of the chip component mounted on the BGA, the liquid epoxy resin prevents the phenomenon that flows around the solder ball of the BGA, It is possible to prevent the mounting failure on the substrate of the BGA, as well as to improve the workability and productivity according to the application of the epoxy resin applied to the BGA.
Claims (3)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019980056822A KR100286808B1 (en) | 1998-12-21 | 1998-12-21 | BGA resin barrier |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019980056822A KR100286808B1 (en) | 1998-12-21 | 1998-12-21 | BGA resin barrier |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20000041053A KR20000041053A (en) | 2000-07-15 |
| KR100286808B1 true KR100286808B1 (en) | 2001-04-16 |
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| Application Number | Title | Priority Date | Filing Date |
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| KR1019980056822A KR100286808B1 (en) | 1998-12-21 | 1998-12-21 | BGA resin barrier |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20020027676A (en) * | 2000-10-04 | 2002-04-15 | 송재인 | Molding structure of hybrid ic |
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