KR0173321B1 - Switching circuit - Google Patents

Switching circuit Download PDF


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KR0173321B1 KR1019910002532A KR910002532A KR0173321B1 KR 0173321 B1 KR0173321 B1 KR 0173321B1 KR 1019910002532 A KR1019910002532 A KR 1019910002532A KR 910002532 A KR910002532 A KR 910002532A KR 0173321 B1 KR0173321 B1 KR 0173321B1
South Korea
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KR910015119A (en
사다시 시모다
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하라 레이노스께
세이꼬 덴시고교 가부시끼가이샤
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Priority to JP2031862A priority patent/JP2733796B2/en
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Publication of KR0173321B1 publication Critical patent/KR0173321B1/en



    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H03K17/693Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/22Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
    • H03K5/24Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
    • H03K5/2472Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors
    • H03K2217/00Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
    • H03K2217/0018Special modifications or use of the back gate voltage of a FET


본 발명의 스위칭 회로는 한쌍의 다른 입력 전압 모두에 대해서 선택적으로 할 수 있는 모노리틱 IC로 구성되어 있다. The switching circuit of the present invention is composed of a selective a monolithic IC which may be with respect to all of the other pair of the input voltage. 또한, 다이오드는 외부제어 신호에 응답하는 출력으로부터 양쪽입력 전압을 블록할 수 있도록 모노리틱 IC로 구성되어 있다. In addition, the diode is composed of a monolithic IC to block both the input voltage from the output in response to an external control signal.


스위칭 회로 The switching circuit

제1도는 본 발명의 스위칭 회로의 회로도. First turning circuit diagram of a switching circuit of the invention.

제2도는 종래의 스위칭 회로의 회로도. A second turning circuit diagram of a conventional switching circuit.

* 도면의 주요부분에 대한 부호의 설명 * Description of the Related Art

1,2 : 입력단자 3, 4 : 스위칭 트랜스지터 1,2: input terminals 3 and 4: the switching transformer jitter

5 : 출력단자 6 : 비교기 5: the output terminal 6: comparator

8, 9 : 쇼트키 장벽다이오드 10 : 게이트 8, 9: Schottky barrier diode 10: gate

11 : 제어단자 11: control terminal

본 발명의 모노리식 IC형의 스위칭 회로에 관한 것이다. It relates to a switching circuit of a monolithic IC form of the present invention.

제2도는 종래의 스위칭 회로도이다. A second turning a conventional switching circuit. 입력단자(1 및 2)는 상이한 전압(V 1 , V 2 )를 각각 수신한다. An input terminal (1) and (2) receives a different voltage (V 1, V 2), respectively. 수신된 전압 중 어느 한 전압은 대응하는 스위칭 트랜지스터(3, 4)를 통해 출력단자(5)로 출력된다. Any one of a voltage of the received voltage is output to the output terminal 5 through the corresponding switching transistors (3,4) to. 상기 전압(V 1 , V 2 )는 비교기(6)로 입력된다. The voltage (V 1, V 2) is input to the comparator 6. 비교기(6)는 상기 스위칭 트랜지스터(4)의 게이트 및 인버터(7)를 통해 다른 스위칭 트랜지스터(3)의 게이트에 동시에 인가되는 출력을 발생한다. Comparator 6 generates an output which is applied at the same time to the gate of the other switching transistor 3 through the gate and an inverter (7) of the switching transistor (4).

V 1 V 2 의 경우, 비교기(6)는 하이레벨 출력을 발생해서 스위칭 트랜지스터(4)가 턴오프된다. In the case of V 1 V 2, the comparator (6) is to generate a high level output and a turn-off switching transistor (4). 한편, 인버터(7)의 출력은 로우레벨로 유지되므로 스위칭 트랜지스터(3)는 턴온된다. On the other hand, the output of the inverter 7 is therefore maintained at a low level, the switching transistor 3 is turned on. 결국, 이러한 상태에서, 출력단자(5)는 전압(V 1 )을 공급한다. In the end, this state, the output terminal 5 is supplied with a voltage (V 1). V 1 V 2 경우에는 스위칭 트랜지스터(3, 4)의 상태는 역으로 되어서 출력단자(5)는 전압(V2)을 출력한다. When V 1 V 2, the state of the switching transistor (3,4) to be the reverse output terminal 5 and outputs a voltage (V2). 비교기(6) 및 인버터(7)는 출력단자(5)로부터 전원을 받는다. Comparator 6 and an inverter 7 receives power from the output terminal 5.

그러나, 이러한 회로구성에서 출력단자(5)가 부유상태(floating state)에 놓이도록 양 스위칭 트랜지스터를 턴-오프시킬 수 없다. However, the output terminal 5 in such a circuit configuration is to be placed in a floating state (floating state) returns the amount of the switching transistor can not be turned off. 그 이유는 MOS형 스위칭 트랜지스터는 입력단자(1,2) 중 어느 하나에 결합된 애노드 및 출력단자(5)에 결합된 캐소드를 가진 위생 다이오드를 구조적으로 동반하고 있기 때문이다. The reason is that the MOS switching transistor is because the accompanying sanitary diode having a cathode coupled to an anode and an output terminal (5) coupled to any one of the input terminals (1, 2) in structure. 따라서, 출력단자(5)는 입력전압 중 높은 전압에서 기생 다이오드에 걸린 전압강하를 뺀 전압을 수신하다. Accordingly, output terminal 5 is receiving a voltage obtained by subtracting a voltage drop takes the parasitic diode in the high voltage of the input voltage. 이러한 전압을 비교기(6) 및 인버터(7)를 동작시킴으로써 스위칭 트랜지스터(3),(4)를 턴온 및 턴오프시킬 수있으므로 기생 다이오드 양단의 전압강하보다 적은 전압강하를 가진 전류 경로를 구성하게 된다. By operating such a voltage to the comparator 6 and the inverter 7, so the switching transistor (3), can be turned on and off (4) constitutes a current path with a small voltage drop greater than the voltage drop across the parasitic diodes .

상술한 이유 때문에, 출력단자(5)는 전압(V 1 ,V 2 )중에서 더 높은 전압을 필연적으로 공급하므로, 부유상태가 실현될 수 없다는 문제점이 야기된다. Because of the aforementioned reason, the output terminal 5, so inevitably supplied to a higher voltage among the voltages (V 1, V 2), the problem that the floating state can be realized is caused.

이와 같은 종래의 문제점을 해결하기 위해서, 본 발명의 목적은 외부신호에 따라 출력단자가 부유상태를 유지할 수 있는 개량된 스위칭 회로를 제공하는 것이다. In order to solve the above conventional problems, it is an object of the present invention to provide an improved switching circuit which can maintain a floating state output terminal in accordance with an external signal.

상기 목적을 실현하기 위하여, 한쌍의 트랜지스터는 하나의 기판상에 복수개의 MOS 트랜지스터 형태로 집적되어 있으며 그들 소오스 영역 및 드레인 영역은 기판과 전기적으로 절연되어 있다. In order to achieve the above object, a pair of the transistor is integrated in the form of a plurality of MOS transistors on a single substrate and their source region and a drain region thereof is isolated from the substrate and electrically. 또한 다이오드는 각각의 입력단자와 기판 사이에 형성되어 있으며, 또 비교기 같은 제어회로는 기판을 개재하여 전원을 공급받는다. In addition, the diode is formed between each input terminal and the substrate, and the comparator of the control circuit is supplied with power via the substrate.

이하, 본 발명의 실시예를 도면을 참조하여 상세히 설명한다. With reference to the drawings an embodiment of the present invention will be described in detail. 제1도는 본 발명에 따른 모노리식 스위칭 회로의 회로도이다. The first turn is a circuit diagram of a monolithic switching circuit according to the present invention. 한쌍의 입력단자(1,2)는 스위칭 트랜지스터(3,4)를 통해 출력단자(5)에 각각 접속되어 있다. A pair of input terminals (1, 2) are connected to the output terminal 5 via the switching transistors (3, 4). 또한 입력단(1,2)는 종래의 회로와 마찬가지로 비교기(6)에 접속되어 있다. Also the input stage (1, 2) is as in the conventional circuit is connected to the comparator 6. 본 발명에 따라, 스위칭 트랜지스터(3,4)의 소스 단자 및 드레인 단자, 혹은 영역이 스위칭 트랜지스터(3,4)가 형성되어 있는 기판 상에서 전기적으로 절연되어 있다. According to the present invention, a source terminal and a drain terminal, or a region of the switching transistor (3, 4) is electrically isolated from the substrate is formed with a switching transistor (3, 4). 또한 기판은 입력단자(1)에 결합된 애노드를 가진 하나의 다이오드(8)에 접속되고, 입력단자(2)에 결합된 애노드를 가진 또 다른 다이오드(9)에도 접속되어 있다. The substrate is connected to the input terminal (1) is connected to a diode (8) having an anode and the other diode (9) having an anode coupled to an input terminal (2) coupled to. 또한, 기판은 비교기(6) 및 게이트 회로(10)의 전원라인로서 사용된다. Further, the substrate is used as the power supply line of the comparator 6 and the gate circuit 10. 게이트 회로(10)는 제어신호를 수신하는 제어단자(11)에 접속된 하나의 입력단자 및 비교기(6)의 출력단자에 접속된 또 다른 입력단자를 가지고 있다. Gate circuit 10 has the other input terminal connected to the output terminal of the one input terminal and the comparator (6) connected to a control terminal 11 for receiving a control signal.

동작시에는 전압(V 1 )(V 2 )이 입력단자(1),(2)에 각각 인가될 때, 전원이 다이오드(8)(9)를 통해 각각 공급되고 있으므로 비교기(6) 및 게이트 회로(10)는 각각 동작 상태에 있다. When the operating voltage (V 1) (V 2) when this is applied to each of the input terminal (1), (2), since the power is respectively supplied through a diode 8, 9, the comparator 6 and the gate circuit 10 is in each operating state. 이때 공급된 전원전압은 전압(V 1 ,V 2 )중 높은 전압에서 대응하는 다이오드의 전압강하량을 뺀 것과 같으므로, 비교기(6) 및 게이트 회로(10)는 전압(V 1 )과 전압(V 2 )사이의 비교 전압차에 따라 동작하여, 선택적으로 스위칭 트랜지스터(3,4)를 턴온 및 턴오프시킨다. At this time, the power supply voltage is the same as subtracting the voltage drop of the diode corresponding to a high voltage of the voltage (V 1, V 2), the comparator 6 and the gate circuit 10 is the voltage (V 1) and the voltage (V 2) to operate in accordance with the voltage difference between the comparison, to selectively turn on and turn off the switching transistor (3, 4) with. 이와 같은 동작에 있어서 제어단자(11)는 하이레벨로 유지된다. In this operation control terminal 11 is maintained at a high level.

한편, 제어단자(11)가 로우레벨로 스위치된 때, 게이트 회로(10)의 출력은 하이레벨로 되므로 스위칭 트랜지스터(3)는 턴오프된다. On the other hand, when the control terminal 11, the switch to the low level, the output of the gate circuit 10 is at the high level, so the switching transistor 3 is turned off. 이때 V 1 V 2 상태로 유지되면, 다른 스위칭 트랜지스터(4)가 턴오프되어 출력단자(5)는 부유상태를 유지한다. At this time, when kept at V 1 V 2 state, the other switching transistor 4 is turned off to output terminal 5 is maintained at the floating state.

본 발명의 스위칭 회로는 MOS 트랜지스터 형태로 비교기, 게이트 회로 및 다이오드를 포함하는 모든 구성요소들이 집적된 모노리식 IC 형태로 제조될 수 있다. The switching circuit of the present invention may be made from a monolithic IC form of all the components, including a comparator, a gate circuit and the integrated diode of the MOS transistor type. 더욱이, 상기 다이오드는 스위칭 회로의 성능을 개량하기 위해 순방향에서 비교적 적은 전압강하를 가지는 쇼트키 장벽 다이오드로 구성하는 것이 바람직하다. Furthermore, the diode is preferably composed of a Schottky barrier diode having a relatively small voltage drop in the forward direction in order to improve the performance of the switching circuit.

상술한 바와 같이 본 발명의 스위칭 회로에 의하면 다이오드는 스위칭 트랜지스터가 MOS 트랜지스터 형태로 집적되어 있는 기판과 각각의 입력단자 사이에 형성되고, 비교기와 같은 제어회로는 기판을 통해 전원이 공급된다. According to the switching circuit of the present invention as described above, a diode is formed between the substrate on which the switching transistors are integrated with the MOS transistors and form the respective input terminal, a control circuit such as a comparator is powered through a substrate. 이러한 구조에 의해서, 스위칭 회로에서 출력단자를 부유상태로 하기 위해 외부 제어신호에 응답하여 한쌍의 스위칭 트랜지스터를 동시에 턴오프시킬 수 있다는 뛰어난 효과가 있다 By such a structure, there is excellent effect that a pair of switching transistors in response to an external control signal can be simultaneously turned off to the output terminals in the switching circuit in the floating state

Claims (2)

  1. 각각의 입력 전압(V 1 ,V 2 )를 각각 수신하는 복수의 입력단자(1,2)기판 상에 형성된 복수의 MOS형 스위칭 트랜지스터(3,4) 및 제어회로(6,10)를 갖는 스위칭 회로에 있어서, 상기 기판과 상기 각각의 입력단자(1,2) 사이에 형성된 복수의 다이오드(8,9); Each of the input voltages (V 1, V 2) for switching having a plurality of MOS-type switching transistors (3, 4) and a control circuit (6,10) formed on the plurality of input terminals (1, 2) for receiving the substrate, each in the circuit, a plurality of diodes (8, 9) formed between the substrate and the respective input terminals (1, 2); 및 상기 기판을 통해서 상기 제어회로에 전원을 공급하는 수단을 포함하며, 상기 전원은 상기 각각의 입력전압(V 1 ,V 2 )을 수신하는 상기 입력단자(1,2), 상기 다이오드(8,9) 및 상기 기판을 통해 공급되는 것을 특징으로 하는 스위칭 회로. And means for supplying power to the control circuit through the substrate, the power source is a diode (8, the input terminal (1, 2), for receiving the respective input voltages (V 1, V 2), 9) and a switching circuit, characterized in that to be supplied through the substrate.
  2. 제1항에 있어서, 상기 각각의 다이오드는 쇼트키 장벽 다이오드로 이루어진 것을 특징으로 하는 스위칭 회로. 2. The method of claim 1, wherein each diode has a switching circuit, characterized in that consisting of a Schottky barrier diode.
KR1019910002532A 1990-02-13 1991-02-13 Switching circuit KR0173321B1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2-31862 1990-02-13
JP2031862A JP2733796B2 (en) 1990-02-13 1990-02-13 Switch circuit

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Publication Number Publication Date
KR910015119A KR910015119A (en) 1991-08-31
KR0173321B1 true KR0173321B1 (en) 1999-04-01



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US (2) US5157291A (en)
EP (1) EP0442688A3 (en)
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KR (1) KR0173321B1 (en)

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USRE36179E (en) 1999-04-06
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JPH03235517A (en) 1991-10-21
JP2733796B2 (en) 1998-03-30

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