JPWO2025028302A1 - - Google Patents

Info

Publication number
JPWO2025028302A1
JPWO2025028302A1 JP2025537844A JP2025537844A JPWO2025028302A1 JP WO2025028302 A1 JPWO2025028302 A1 JP WO2025028302A1 JP 2025537844 A JP2025537844 A JP 2025537844A JP 2025537844 A JP2025537844 A JP 2025537844A JP WO2025028302 A1 JPWO2025028302 A1 JP WO2025028302A1
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2025537844A
Other languages
Japanese (ja)
Other versions
JPWO2025028302A5 (https=
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPWO2025028302A1 publication Critical patent/JPWO2025028302A1/ja
Publication of JPWO2025028302A5 publication Critical patent/JPWO2025028302A5/ja
Pending legal-status Critical Current

Links

Classifications

    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23F—NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
    • C23F4/00—Processes for removing metallic material from surfaces, not provided for in group C23F1/00 or C23F3/00
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/24—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials
    • H10P50/242—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Plasma & Fusion (AREA)
  • Analytical Chemistry (AREA)
JP2025537844A 2023-08-02 2024-07-19 Pending JPWO2025028302A1 (https=)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2023126149 2023-08-02
PCT/JP2024/025936 WO2025028302A1 (ja) 2023-08-02 2024-07-19 エッチング方法及びプラズマ処理装置

Publications (2)

Publication Number Publication Date
JPWO2025028302A1 true JPWO2025028302A1 (https=) 2025-02-06
JPWO2025028302A5 JPWO2025028302A5 (https=) 2025-12-02

Family

ID=94395219

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2025537844A Pending JPWO2025028302A1 (https=) 2023-08-02 2024-07-19

Country Status (5)

Country Link
JP (1) JPWO2025028302A1 (https=)
KR (1) KR20260048572A (https=)
CN (1) CN121647062A (https=)
TW (1) TW202520374A (https=)
WO (1) WO2025028302A1 (https=)

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040077169A1 (en) * 2001-09-27 2004-04-22 International Business Machines Corporation Method of fabricating a narrow polysilicon line
JP2016513883A (ja) * 2013-03-15 2016-05-16 アプライド マテリアルズ インコーポレイテッドＡｐｐｌｉｅｄ Ｍａｔｅｒｉａｌｓ，Ｉｎｃｏｒｐｏｒａｔｅｄ 極端な共形性を有するカーボンフィルム堆積、背景技術
US20160307773A1 (en) * 2015-04-15 2016-10-20 Samsung Electronics Co., Ltd. Method of Manufacturing Semiconductor Devices
US20170110475A1 (en) * 2014-08-19 2017-04-20 Applied Materials, Inc. High aspect ratio 3-d flash memory device
JP2017191938A (ja) * 2016-04-12 2017-10-19 東京エレクトロン株式会社 自己整列スペーサ形成
JP2018032664A (ja) * 2016-08-22 2018-03-01 東京エレクトロン株式会社 エッチング方法およびｄｒａｍキャパシタの製造方法
JP2023055335A (ja) * 2021-10-06 2023-04-18 東京エレクトロン株式会社 エッチング方法及びエッチング装置

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6230954B2 (ja) * 2014-05-09 2017-11-15 東京エレクトロン株式会社 エッチング方法
US20220165578A1 (en) * 2020-11-25 2022-05-26 Tokyo Electron Limited Substrate processing method and substrate processing apparatus

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040077169A1 (en) * 2001-09-27 2004-04-22 International Business Machines Corporation Method of fabricating a narrow polysilicon line
JP2016513883A (ja) * 2013-03-15 2016-05-16 アプライド マテリアルズ インコーポレイテッドＡｐｐｌｉｅｄ Ｍａｔｅｒｉａｌｓ，Ｉｎｃｏｒｐｏｒａｔｅｄ 極端な共形性を有するカーボンフィルム堆積、背景技術
US20170110475A1 (en) * 2014-08-19 2017-04-20 Applied Materials, Inc. High aspect ratio 3-d flash memory device
US20160307773A1 (en) * 2015-04-15 2016-10-20 Samsung Electronics Co., Ltd. Method of Manufacturing Semiconductor Devices
JP2017191938A (ja) * 2016-04-12 2017-10-19 東京エレクトロン株式会社 自己整列スペーサ形成
JP2018032664A (ja) * 2016-08-22 2018-03-01 東京エレクトロン株式会社 エッチング方法およびｄｒａｍキャパシタの製造方法
JP2023055335A (ja) * 2021-10-06 2023-04-18 東京エレクトロン株式会社 エッチング方法及びエッチング装置

Also Published As

Publication number Publication date
CN121647062A (zh) 2026-03-10
WO2025028302A1 (ja) 2025-02-06
KR20260048572A (ko) 2026-04-10
TW202520374A (zh) 2025-05-16

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