JPWO2024079886A1 - - Google Patents
Info
- Publication number
- JPWO2024079886A1 JPWO2024079886A1 JP2024551029A JP2024551029A JPWO2024079886A1 JP WO2024079886 A1 JPWO2024079886 A1 JP WO2024079886A1 JP 2024551029 A JP2024551029 A JP 2024551029A JP 2024551029 A JP2024551029 A JP 2024551029A JP WO2024079886 A1 JPWO2024079886 A1 JP WO2024079886A1
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Debugging And Monitoring (AREA)
- Multi Processors (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/JP2022/038384 WO2024079886A1 (ja) | 2022-10-14 | 2022-10-14 | オフロードサーバ、オフロード制御方法およびオフロードプログラム |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPWO2024079886A1 true JPWO2024079886A1 (https=) | 2024-04-18 |
Family
ID=90669262
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2024551029A Pending JPWO2024079886A1 (https=) | 2022-10-14 | 2022-10-14 |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JPWO2024079886A1 (https=) |
| WO (1) | WO2024079886A1 (https=) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2020137017A (ja) * | 2019-02-22 | 2020-08-31 | 日本電信電話株式会社 | オフロードサーバのソフトウェア最適配置方法およびプログラム |
-
2022
- 2022-10-14 WO PCT/JP2022/038384 patent/WO2024079886A1/ja not_active Ceased
- 2022-10-14 JP JP2024551029A patent/JPWO2024079886A1/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2020137017A (ja) * | 2019-02-22 | 2020-08-31 | 日本電信電話株式会社 | オフロードサーバのソフトウェア最適配置方法およびプログラム |
Non-Patent Citations (2)
| Title |
|---|
| YAMATO, YOJI: "Proposal of Automatic FPGA Offloading for Applications Loop Statement", THE 7TH ANNUAL CONFERENCE ON ENGINEERING AND INFORMATION TECHNOLOGY (ACEAIT 2020), JPN6022052389, 18 April 2020 (2020-04-18), US, pages 111 - 123, ISSN: 0005770976 * |
| 山登 庸次: "アプリケーション機能ブロックのＧＰＵ，ＦＰＧＡ自動オフロード手法の評価", 電子情報通信学会技術研究報告, vol. 119, no. 482, JPN6022052390, 9 March 2020 (2020-03-09), pages 59 - 66, ISSN: 0005770975 * |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2024079886A1 (ja) | 2024-04-18 |
Similar Documents
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A621 | Written request for application examination |
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| A521 | Request for written amendment filed |
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| A01 | Written decision to grant a patent or to grant a registration (utility model) |
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