JPWO2024013831A5 - - Google Patents

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Publication number
JPWO2024013831A5
JPWO2024013831A5 JP2023567089A JP2023567089A JPWO2024013831A5 JP WO2024013831 A5 JPWO2024013831 A5 JP WO2024013831A5 JP 2023567089 A JP2023567089 A JP 2023567089A JP 2023567089 A JP2023567089 A JP 2023567089A JP WO2024013831 A5 JPWO2024013831 A5 JP WO2024013831A5
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JP2023567089A
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JPWO2024013831A1 (https=
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Priority claimed from PCT/JP2022/027327 external-priority patent/WO2024013831A1/ja
Priority to JP2023187211A priority Critical patent/JP7616321B2/ja
Publication of JPWO2024013831A1 publication Critical patent/JPWO2024013831A1/ja
Publication of JPWO2024013831A5 publication Critical patent/JPWO2024013831A5/ja
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JP2023567089A 2022-07-11 2022-07-11 Pending JPWO2024013831A1 (https=)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2023187211A JP7616321B2 (ja) 2022-07-11 2023-10-31 タスクスケジューラ装置およびプログラム

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2022/027327 WO2024013831A1 (ja) 2022-07-11 2022-07-11 タスクスケジューラ装置、計算システム、タスクスケジューリング方法およびプログラム

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JP2023187211A Division JP7616321B2 (ja) 2022-07-11 2023-10-31 タスクスケジューラ装置およびプログラム

Publications (2)

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JPWO2024013831A1 JPWO2024013831A1 (https=) 2024-01-18
JPWO2024013831A5 true JPWO2024013831A5 (https=) 2024-10-09

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ID=89536171

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JP2023567089A Pending JPWO2024013831A1 (https=) 2022-07-11 2022-07-11
JP2023187211A Active JP7616321B2 (ja) 2022-07-11 2023-10-31 タスクスケジューラ装置およびプログラム

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JP2023187211A Active JP7616321B2 (ja) 2022-07-11 2023-10-31 タスクスケジューラ装置およびプログラム

Country Status (4)

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EP (1) EP4557052A1 (https=)
JP (2) JPWO2024013831A1 (https=)
CN (1) CN119522407A (https=)
WO (1) WO2024013831A1 (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2025182036A1 (ja) * 2024-02-29 2025-09-04 Ntt株式会社 タスクスケジューラ装置およびプログラム
WO2025215667A1 (en) * 2024-04-08 2025-10-16 Tejas Networks Limited Method and system for scheduling radio access networks (ran) workloads in multi-core architecture

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3366970B2 (ja) * 1994-12-21 2003-01-14 コニカ株式会社 トナーガイドローラを用いた画像形成方法
JP2000040067A (ja) 1998-07-24 2000-02-08 Mitsubishi Electric Corp 計算機システム
US9015501B2 (en) * 2006-07-13 2015-04-21 International Business Machines Corporation Structure for asymmetrical performance multi-processors
JP4905120B2 (ja) 2006-12-27 2012-03-28 富士通株式会社 負荷集約プログラム、該プログラムを記録した記録媒体、負荷集約装置および負荷集約方法
JP2010160565A (ja) * 2009-01-06 2010-07-22 Ricoh Co Ltd タスクスケジューリング装置、タスクスケジューリング制御方法、及びタスクスケジューリング制御プログラム
US8775838B2 (en) * 2012-02-01 2014-07-08 Texas Instruments Incorporated Limiting the number of unexpected wakeups in a computer system implementing a power-saving preemptive wakeup method from historical data
US8862824B2 (en) * 2012-09-26 2014-10-14 Intel Corporation Techniques for managing power and performance of multi-socket processors
JP6249121B1 (ja) * 2017-03-30 2017-12-20 日本電気株式会社 消費電力削減装置、消費電力削減方法および消費電力削減プログラム

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