JPWO2023182194A5 - - Google Patents

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Publication number
JPWO2023182194A5
JPWO2023182194A5 JP2024510120A JP2024510120A JPWO2023182194A5 JP WO2023182194 A5 JPWO2023182194 A5 JP WO2023182194A5 JP 2024510120 A JP2024510120 A JP 2024510120A JP 2024510120 A JP2024510120 A JP 2024510120A JP WO2023182194 A5 JPWO2023182194 A5 JP WO2023182194A5
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JP
Japan
Prior art keywords
nitride semiconductor
light
manufacturing
growth
semiconductor substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2024510120A
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English (en)
Japanese (ja)
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JPWO2023182194A1 (https=
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Publication date
Application filed filed Critical
Priority claimed from PCT/JP2023/010518 external-priority patent/WO2023182194A1/ja
Publication of JPWO2023182194A1 publication Critical patent/JPWO2023182194A1/ja
Publication of JPWO2023182194A5 publication Critical patent/JPWO2023182194A5/ja
Pending legal-status Critical Current

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JP2024510120A 2022-03-24 2023-03-17 Pending JPWO2023182194A1 (https=)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2022048788 2022-03-24
PCT/JP2023/010518 WO2023182194A1 (ja) 2022-03-24 2023-03-17 半導体基板の製造方法および製造装置

Publications (2)

Publication Number Publication Date
JPWO2023182194A1 JPWO2023182194A1 (https=) 2023-09-28
JPWO2023182194A5 true JPWO2023182194A5 (https=) 2024-11-28

Family

ID=88100807

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2024510120A Pending JPWO2023182194A1 (https=) 2022-03-24 2023-03-17

Country Status (5)

Country Link
JP (1) JPWO2023182194A1 (https=)
KR (1) KR20240160132A (https=)
DE (1) DE112023001542T5 (https=)
TW (1) TWI899553B (https=)
WO (1) WO2023182194A1 (https=)

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4638958B1 (ja) * 2009-08-20 2011-02-23 株式会社パウデック 半導体素子の製造方法
WO2012102970A1 (en) * 2011-01-24 2012-08-02 Applied Materials, Inc. Growth of iii-v led stacks using nano masks
JP2013251304A (ja) 2012-05-30 2013-12-12 Furukawa Co Ltd 積層体および積層体の製造方法
DE102015107661B4 (de) * 2015-05-15 2021-03-18 OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung Verfahren zur Herstellung eines Nitridverbindungshalbleiter-Bauelements

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