JPWO2020185539A5 - - Google Patents

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Publication number
JPWO2020185539A5
JPWO2020185539A5 JP2021554600A JP2021554600A JPWO2020185539A5 JP WO2020185539 A5 JPWO2020185539 A5 JP WO2020185539A5 JP 2021554600 A JP2021554600 A JP 2021554600A JP 2021554600 A JP2021554600 A JP 2021554600A JP WO2020185539 A5 JPWO2020185539 A5 JP WO2020185539A5
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JP
Japan
Prior art keywords
substrate
plasma
distance
station
pedestal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2021554600A
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English (en)
Japanese (ja)
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JP2022525086A (ja
Publication date
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Priority claimed from PCT/US2020/021323 external-priority patent/WO2020185539A1/en
Publication of JP2022525086A publication Critical patent/JP2022525086A/ja
Publication of JPWO2020185539A5 publication Critical patent/JPWO2020185539A5/ja
Pending legal-status Critical Current

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JP2021554600A 2019-03-12 2020-03-06 独立して調節可能な台座を用いるマルチステーション半導体処理 Pending JP2022525086A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201962817332P 2019-03-12 2019-03-12
US62/817,332 2019-03-12
PCT/US2020/021323 WO2020185539A1 (en) 2019-03-12 2020-03-06 Multi-station semiconductor processing with independently adjustable pedestals

Publications (2)

Publication Number Publication Date
JP2022525086A JP2022525086A (ja) 2022-05-11
JPWO2020185539A5 true JPWO2020185539A5 (ko) 2023-03-13

Family

ID=72427072

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2021554600A Pending JP2022525086A (ja) 2019-03-12 2020-03-06 独立して調節可能な台座を用いるマルチステーション半導体処理

Country Status (7)

Country Link
US (1) US20220136104A1 (ko)
JP (1) JP2022525086A (ko)
KR (1) KR20210128017A (ko)
CN (1) CN113811637A (ko)
SG (1) SG11202109959TA (ko)
TW (1) TW202104655A (ko)
WO (1) WO2020185539A1 (ko)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11864472B2 (en) 2020-07-10 2024-01-02 California Institute Of Technology Methods and systems for atomic layer etching and atomic layer deposition
WO2023059988A1 (en) * 2021-10-07 2023-04-13 Lam Research Corporation Selective control of multi-station processing chamber components

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100358097C (zh) * 2005-08-05 2007-12-26 中微半导体设备(上海)有限公司 半导体工艺处理系统及其处理方法
US9002514B2 (en) * 2007-11-30 2015-04-07 Novellus Systems, Inc. Wafer position correction with a dual, side-by-side wafer transfer robot
US20090206056A1 (en) * 2008-02-14 2009-08-20 Songlin Xu Method and Apparatus for Plasma Process Performance Matching in Multiple Wafer Chambers
US9997357B2 (en) * 2010-04-15 2018-06-12 Lam Research Corporation Capped ALD films for doping fin-shaped channel regions of 3-D IC transistors
US9797042B2 (en) * 2014-05-15 2017-10-24 Lam Research Corporation Single ALD cycle thickness control in multi-station substrate deposition systems
US9214333B1 (en) * 2014-09-24 2015-12-15 Lam Research Corporation Methods and apparatuses for uniform reduction of the in-feature wet etch rate of a silicon nitride film formed by ALD
US9508547B1 (en) * 2015-08-17 2016-11-29 Lam Research Corporation Composition-matched curtain gas mixtures for edge uniformity modulation in large-volume ALD reactors
US20170314129A1 (en) * 2016-04-29 2017-11-02 Lam Research Corporation Variable cycle and time rf activation method for film thickness matching in a multi-station deposition system
JP7017306B2 (ja) * 2016-11-29 2022-02-08 株式会社日立ハイテク 真空処理装置

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