JPWO2008038360A1 - Plasma display panel and manufacturing method thereof - Google Patents

Abstract

A phosphor layer is formed from the bottom to the top of the barrier rib partitioning the cell region of the back substrate in order to suppress the decrease in viewing angle and the secondary electron emission coefficient is high near the top of the barrier rib A protective layer made of MgO or the like is formed. Increasing the amount of secondary electrons in the vicinity of the top of the barrier ribs to increase the discharge scale to increase the luminous efficiency, and the phosphor layer is formed from the bottom to the top of the side walls of the barrier ribs. Light emission brightness can be realized.

Description

  The present invention relates to a plasma display panel and a method for manufacturing the same, and more particularly, to a plasma display panel having a wide viewing angle and improved luminous efficiency and a method for manufacturing the same.

  The PDP currently commercialized is an AC drive system and a surface discharge type. In the surface discharge type PDP, a display electrode pair is provided on the front substrate, and address electrodes, barrier ribs for partitioning the discharge space, and a phosphor layer for color display are provided on the rear substrate. By disposing the phosphor layer away from the display electrode pair in the thickness direction of the panel, it is possible to reduce deterioration of the phosphor characteristics due to ion bombardment during discharge. Therefore, the surface discharge type PDP is suitable for extending the life compared to the counter discharge type in which the X and Y display electrodes are separately arranged on the front substrate and the rear substrate.

  In an AC drive, surface discharge type PDP, a stripe-like or grid-like partition that separates phosphors having different emission colors is provided on the rear substrate, a dielectric layer that covers the display electrode on the front substrate, a protective layer such as MgO, and the like The protective layer and the top of the partition wall are in contact with each other. Since the barrier rib on the back substrate side is also an insulator such as glass and is a kind of dielectric, a part of the electric field formed in the discharge space by the voltage applied to the display electrode also goes to the barrier rib. For this reason, a part of the electric charge generated by the discharge collides with the partition.

  On the other hand, the protective layer such as MgO covering the dielectric layer on the display electrode emits many secondary electrons when the discharge ions collide in addition to the function of protecting the dielectric layer from the impact of the discharge ions. It has the function of growing the discharge. However, barrier ribs made of glass material or the like have a lower secondary electron emission coefficient than MgO, and the amount of secondary electrons emitted by ions colliding with the barrier ribs is much smaller than that of the protective layer of MgO. For this reason, the discharge in the display period is hindered by the barrier ribs on the rear substrate side, and the discharge scale is reduced, which is one of the causes of reducing the light emission efficiency of the PDP.

On the other hand, a structure has been proposed in which a protective layer is also provided on the structure on the back substrate side to increase the emission efficiency by increasing the amount of secondary electrons emitted by collision of discharge ions (Patent Document 1). According to one embodiment of Patent Document 1, the entire surface of the phosphor layer of the back substrate is covered with MgO as a protective layer to increase the amount of secondary electron emission. Further, according to another embodiment, the phosphor layer is formed on the surface of the back substrate and the lower side surface region of the barrier rib, and only the protective layer of MgO is formed on the upper side region of the barrier rib without forming the phosphor layer. The phosphor layer is not covered with a protective layer. By preventing the protective layer from covering the phosphor layer, the phosphor layer is prevented from being deteriorated by the MgO formation process.
JP 2002-110046 A

  However, in one embodiment of the above-mentioned Patent Document 1, since the entire phosphor layer is covered with a protective layer, the secondary electron emission amount is certainly increased due to the presence of the MgO protective layer above the barrier ribs, and the discharge scale. However, there is a problem that the amount of ultraviolet rays that are absorbed by the protective layer when the discharge gas is ionized is absorbed by the protective layer and the amount of the ultraviolet rays that reaches the phosphor layer decreases, and the luminous efficiency does not increase.

  In another embodiment, when the MgO protective layer is formed only on the upper part of the side wall of the barrier rib and the phosphor layer is formed on the lower region of the side face of the barrier rib and the address electrode on the rear substrate, MgO Although the problem of ultraviolet absorption by the protective layer is solved, the phosphor layer is not formed in the upper region of the side wall of the barrier rib, so that the amount of light emitted at both ends corresponding to the upper side surface of the barrier rib in the cell space sandwiched between the barrier ribs Has a problem that the viewing angle is reduced and the viewing angle is reduced.

  Therefore, an object of the present invention is to provide a PDP with a wide viewing angle and improved luminous efficiency.

  Another object of the present invention is to provide a PDP in which the emission scale is increased by increasing the amount of secondary electron emission while suppressing the decrease in viewing angle.

  Furthermore, another object of the present invention is to provide a method for manufacturing the PDP.

  In order to achieve the above object, according to a first aspect of the present invention, in an AC type plasma display panel having a discharge space in which a discharge gas is sealed between a front substrate and a rear substrate, , A display electrode group, a dielectric layer on the display electrode, and a first protective layer made of a material having a high secondary electron emission coefficient that covers the dielectric layer are formed on the rear substrate. A group, a partition disposed on both sides of the address electrode, a phosphor layer formed above the address electrode and extending from the bottom to the top of the side of the partition, and on the address electrode and the side of the partition The phosphor on the lower region is not covered, and a second protective layer made of the material for covering the phosphor layer in the vicinity of the top of the side surface of the partition is formed.

  According to the first aspect described above, the phosphor layer is formed so as to extend from the lower part of the side surface of the partition wall to the top part, so that the reduction in viewing angle can be suppressed. By forming the second protective layer covering the phosphor layer, the discharge scale can be expanded by secondary electron emission from the second protective layer. Since the second protective layer covers a part of the phosphor layer, a part of the ultraviolet ray is absorbed by the protective layer, but the ultraviolet ray still reaches the phosphor layer near the top of the partition wall and emits light. Can be suppressed.

 To achieve the above object, according to a second aspect of the present invention, in a method of manufacturing an AC plasma display panel having a discharge space in which a discharge gas is sealed between a front substrate and a rear substrate, Forming a display electrode group, a dielectric layer on the display electrode group, and a first protective layer made of a material having a high secondary electron emission coefficient covering the dielectric layer; an address electrode group on the rear substrate; Forming a barrier rib disposed on both sides of the address electrode and a phosphor layer formed on the upper side of the address electrode and extending from a lower portion to a top portion of a side surface of the barrier rib; Inclination with respect to the source is performed while vapor deposition is performed while one side surface of the side wall is exposed to the vapor deposition source, and the phosphor layer in the vicinity of the top is covered except for the lower region of the side surface of the partition wall. As before Characterized by a step of forming a second protective layer of material.

  According to the second aspect described above, since the second protective layer can be deposited only in the vicinity of the top of the side wall of the partition wall, the secondary electron emission amount is increased while suppressing the absorption of ultraviolet rays into the phosphor layer. A PDP can be formed.

  It is possible to provide a PDP in which the efficiency of looking is improved by increasing the emission scale by increasing the amount of secondary electron emission while suppressing the decrease in viewing angle.

It is sectional drawing of PDP in 1st Embodiment. It is a perspective view which shows the basic structure of PDP. It is a block diagram which shows the structure of the drive circuit of PDP. It is a figure which shows the drive sequence of PDP. It is a figure which shows the drive waveform of PDP. It is sectional drawing of PDP in 2nd Embodiment. It is a figure which shows the manufacturing method in this invention. It is a figure which shows the viewing angle dependence in the cell in this Embodiment. It is a figure which shows the discharge mechanism of PDP.

Explanation of symbols

1 Front glass substrate 2 Display electrode X
2 Display electrode Y
3 Dielectric layer 4-1 Front substrate side protective layer (first protective layer)
4-2 Back substrate side protective layer (second protective layer)
4-3 Secondary electrons 5 Bulkhead 6R Phosphor R
6G phosphor G
6B Phosphor B
7 Base reflective layer 8 Address electrode 9 Back glass substrate 11 MgO sublimated by electron beam
12 Hearth (place to put solid MgO)
13 MgO pellet 14 Electron beam

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, the technical scope of the present invention is not limited to these embodiments, but extends to the matters described in the claims and equivalents thereof.

  FIG. 2 is a perspective view showing a general configuration of the PDP. The PDP shown in FIG. 2 is an AC drive type three-electrode surface discharge type PDP for color display, and a front substrate 1 and a rear substrate 9 are provided facing each other with a discharge gas space therebetween.

  On the inner surface of the front substrate 1, a plurality of display electrodes 2X and a display electrode 2Y extending in the horizontal direction are arranged in parallel. A display line is entirely formed between the adjacent display electrode 2X and the display electrode 2Y. This PDP is a so-called ALIS structure PDP in which the display electrode 2X and the display electrode 2Y are arranged at equal intervals, and a display line is formed between the adjacent display electrodes 2X and 2Y. However, the present invention can also be applied to a PDP having a structure in which the pair of display electrodes 2X and the display electrodes 2Y are arranged with a non-discharge gap where no discharge occurs.

  Each of the display electrodes 2X and 2Y includes a transparent electrode 10 made of ITO, SnO2, or the like and, for example, Ag, Au, Al, Cu, Cr formed thereon and a laminate thereof (for example, a laminated structure of Cr / Cu / Cr). ) And the like, and the metal bus electrode 11 is formed. The display electrodes 2X and 2Y are formed in a predetermined number by using a thick film formation technique such as screen printing for Ag and Au, and a thin film formation technique such as a vapor deposition method and a sputtering method and an etching technique for other metals. , Thickness, width and spacing. The transparent electrode 10 is mainly formed of a light transmissive material so as to contribute to the discharge and allow the phosphor to emit light from the front substrate 1 side. It is desirable that the bus electrode 11 has a low resistance in order to flow a current during discharge.

  A dielectric layer 3 is formed on the display electrodes 2X and 2Y so as to cover the display electrodes 2X and 2Y. The dielectric layer 3 is formed by applying a glass paste mainly composed of a low-melting glass powder on the front glass substrate 1 by screen printing and baking at a high temperature. There is also a method in which a sheet-like dielectric layer is attached and fired. Furthermore, the dielectric layer 3 may be formed by forming a SiO2 film by plasma CVD.

  A protective film 4 is formed on the dielectric layer 3 in order to protect the dielectric layer 3 from impact caused by ion collision caused by discharge. This protective film 4 is made of a material having a high secondary electron emission coefficient when ions collide, and for example, MgO or MgF is used. The protective film 4 is formed by a thin film forming process known in the art, such as an electron beam evaporation method or a sputtering method.

  A plurality of address electrodes 8 are formed on the inner surface of the back substrate 9 in a direction intersecting with the display electrodes 2X and 2Y when seen in a plan view, and a dielectric layer 7 is formed to cover the address electrodes 8. The address electrode 8 generates an address discharge for selecting a light emitting cell at the intersection with the display electrode 2Y, and is formed of, for example, a three-layer structure of Cr / Cu / Cr. In addition, the address electrode 8 can be formed of Ag, Au, Al, Cu, Cr, or the like. Similarly to the display electrodes 2X and 2Y, the address electrode 8 uses a thick film forming technique such as screen printing for Ag and Au, and a thin film forming technique such as a vapor deposition method and a sputtering method and an etching technique for other metals. By using it, it is formed with a predetermined number, thickness, width and interval. The dielectric layer 7 can be formed using the same material and the same method as the dielectric layer 3 on the front substrate 1. The dielectric layer 7 is not necessarily provided.

  On the dielectric layer 7, partition walls 5 are formed between the adjacent address electrodes 8. The shape of the partition wall 5 in this example is a stripe shape parallel to the address electrode, but it may be a lattice shape surrounding the cell region at the intersection of the address electrode and the display electrode.

  The partition walls 5 are formed by a sand blast method, a photo etching method, or the like. For example, in the sandblasting method, a glass paste made of low melting glass powder, a binder resin, a solvent, etc. is applied on the dielectric layer 7 and dried, and then a cutting mask having openings in the partition pattern on the glass paste layer. The partition wall 5 is formed by spraying cutting particles in a state where the glass paste is provided, cutting the glass paste layer exposed in the opening of the mask, and further baking. In the photoreceptor paste method, instead of cutting with cutting particles, a photosensitive resin is used as the binder resin of the glass paste, and it is formed by baking after exposure and development using a mask.

  Red (R), green (G), and blue (B) phosphor layers 6R, 6G, and 6B are formed on the side and bottom surfaces of the discharge space partitioned by the barrier ribs 5. The phosphor layers 6R, 6G, and 6B are coated with a phosphor paste containing phosphor powder, a binder resin, and a solvent in a discharge space partitioned by partition walls by a method using screen printing or a dispenser. It is formed by firing after repeating for each color.

  The phosphor layers 6R, 6G, and 6B can be formed by a photolithography technique using a sheet-like phosphor layer material containing phosphor powder, a photosensitive material, and a binder resin, a so-called green sheet. In this case, a sheet of a predetermined color is attached to the entire display area on the substrate, exposure and development are performed, and this is repeated for each color, thereby forming the phosphor layer 6 of each color between the corresponding barrier ribs 5. . The phosphor layers 6R, 6G, and 6B are formed on the address electrode 8, that is, on the dielectric layer when the dielectric layer 7 is provided, and on the address electrode when not provided. It is formed up to the side wall of the partition wall.

  In this PDP, a front substrate and a rear substrate are arranged to face each other so that the display electrodes 2X, 2Y and the address electrodes 8 intersect, the periphery is sealed, and Xe, Ne, and Ne are formed in a discharge space surrounded by the barrier ribs 5. It is produced by filling a discharge gas mixed with. In this PDP, the discharge space at the intersection of the display electrodes 2X and 2Y and the address electrode 8 becomes one cell (unit light emitting region) which is the minimum unit of display. One pixel is composed of three cells of R, G, and B.

  FIG. 3 is a block diagram showing an overall configuration of an example of a plasma display module. In the PDP, display electrodes X1, X2, X3,... That perform sustain discharge and display electrodes Y1, Y2, Y3,... That are also scan electrodes are alternately arranged to form a display line. The address electrodes A1, A2, A3,... Perpendicular to these electrodes form a matrix display cell. In order to apply a voltage to each electrode, an address drive circuit 15, a scan driver 16, a Y drive circuit 17, and an X drive circuit 18 are connected to the corresponding electrodes. Moreover, the control circuit 19 for controlling them is provided.

  In the address period, the scan driver 16 sequentially applies scan pulses to the scan electrodes Y to select the scan electrodes (display lines), and the address electrodes A connected to the address drive circuit 15 and the selected scan electrodes Y are connected to each other. In the meantime, an address discharge for selecting lighting / non-lighting of the cell is generated. Further, the Y drive circuit 17 and the X drive circuit 18 cause the number of sustain discharges corresponding to the weight of each subfield to the cells selected by the address discharge in the display period. The control circuit 19 controls a predetermined image display by outputting a control signal suitable for each drive circuit from image data, a synchronization signal, and a control signal input from an external device such as a TV tuner or a computer.

  FIG. 4 is a diagram showing an example of a gradation drive sequence in the PDP of FIG. As shown in FIG. 4, in the gradation driving sequence in the plasma display device, one field (frame) 20 is composed of a plurality of subfields (subframes) 21 (SF1 to SFn) each having a predetermined luminance weight. , Predetermined gradation display is performed by a combination of subfields. Specifically, a plurality of subfields, for example, eight having a luminance weight of a power of 2 with a ratio of the number of sustain discharges set to 1: 2: 4: 8: 16: 32: 64: 128 The 256 gray scales are displayed by the subfields SF1 to SF8. Needless to say, various combinations of the number of subfields and the weight of each subfield are possible.

  Each subfield includes an initialization process (reset period 22) for making the wall charges of all the cells in the display region uniform, an address process (address period 23) for selecting a lighted cell, and a luminance of the selected cell. It comprises a display process (sustain discharge period 24) in which the discharge is performed for the number of times corresponding to (the weight of each subfield). Then, for each subfield, a cell is turned on according to the luminance, and display control of one field is performed by controlling display of, for example, eight subfields SF1 to SF8.

  Next, FIG. 5 shows an example of the drive waveform. 5A to 5E show drive waveforms applied to the display electrodes X1, Y1, Y3, Y2, and the address electrode A in the period from the reset period 22 to the sustain discharge period 24, respectively. The numbers given to X and Y indicate the number of rows, and this waveform shows the case of discharging between two electrodes with the same number. Y1 and Y3 are an example representing an odd row of Y and Y2 is an even row.

  First, a Y write blunt wave 32 and an X voltage 25 for forming wall charges in all the cells are applied to the electrodes X1 and Y1 in FIGS. Subsequently, a Y-compensation blunt wave 33 and an X-compensation voltage 26 are applied to erase the wall charges formed in the cell while leaving a necessary amount.

  The voltage waveform applied in the next address period 23 is an odd-numbered row scanning pulse 34 for discharging to determine display cells in the row direction, and an X voltage 27 for forming charges by the main discharge. The scanning pulse 34 is applied at a different timing for each row. In the subsequent sustain discharge period 24, the first sustain pulses 28 and 35 and the repeated sustain pulses 29, 30, 31, 36, 37, and 38 are applied.

  FIG. 5C shows a voltage waveform applied to the electrode Y3, and is the same as the voltage waveform applied to the electrode Y1 shown in FIG. 5B except for the timing of the scanning pulse 39. If no cell on the line of the electrode Y3 is turned on now, the scanning pulse 39 is unnecessary and can be thinned out. Thereby, drive time can be shortened. At this time, no voltage is applied to all the address electrodes, and they can be thinned out similarly. Since the voltage applied to the display electrode is also a constant value, a similar time reduction is easy.

 In the reset period 22, a Y write blunt wave 40 that forms charges in all the cells is applied to the electrode Y2 in FIG. Subsequently, a Y compensation blunt wave 41 is applied to erase the charge formed in the cell while leaving a necessary amount.

  The voltage waveform applied in the next address period 23 is a scan pulse 42 in an even-numbered row for performing discharge for determining display cells in the row direction. The scan pulse 42 is also applied at a different timing for each row. In the subsequent display period 24, a first sustain pulse 44, repetitive sustain pulses 44 and 45, and a discharge pulse adjusting pulse 46 are applied.

 The voltage waveform applied to the address electrode A in FIG. 5 (e) during the address period is address pulses 47 and 48 for discharging to determine cells to be displayed in the column direction. The address pulse is applied at the timing of causing a discharge to a cell to be displayed located at the intersection of the scan electrode and the address electrode A in synchronization with the scan pulse applied for each row.

  In addition to the above driving waveforms, a voltage waveform for erasing wall charges may be added at the end of the display period 24.

  The above is the general structure, drive sequence, and drive waveform of the PDP. Next, a configuration in which a protective layer is formed on the partition wall of the rear substrate in this embodiment will be described.

  FIG. 1 shows a cross-sectional view of the PDP in the first embodiment. The front glass substrate 1 has a high secondary electron emission coefficient including a display electrode 2 made of a transparent electrode material, a dielectric layer 3 covering the display electrode 2, and any of MgO, MgF, and SrO covering the dielectric layer. A first protective film 4-1 made of is formed. These forming methods are as described above.

  On the other hand, the rear glass substrate 9 has a plurality of address electrodes 8 extending in a direction intersecting with the display electrodes, a dielectric layer 7 covering the address electrodes 8, and stripe-like or grid-like barrier ribs 5 that divide the discharge space into cell arrays. Is formed. As described above, the partition walls 5 are formed by a sandblast method using glass paste or the like. A phosphor layer 6 is formed on the dielectric layer 7 on the address electrodes 8 and on the side surfaces of the barrier ribs 5. As described above, the phosphor layers 6 are separately formed of phosphor materials that emit RGB light. When the dielectric layer 7 is not provided, the phosphor layer 6 is formed on the address electrode 8.

  According to the cell structure of the PDP in the present embodiment, in addition to the address electrodes 8, the phosphor layer 6 is applied from the lower region of the side surface of the partition wall 5 of the rear glass substrate 9 to the top, and the partition wall 5 A second protective layer 4-2 made of a material such as MgO, MgF, or SrO having a high secondary electron emission coefficient is formed so as to cover the phosphor layer 6 in the vicinity of the top of the side surface. With such a configuration, it is possible to increase the amount of secondary electrons emitted during discharge while increasing the discharge scale while suppressing the narrowing of the viewing angle, and to increase the light emission efficiency.

  FIG. 8 is a diagram showing the spread of the discharge of the PDP. The protective layer 4-1 on the front substrate side and the protective layer 4-2 on the top of the partition wall of the rear substrate are shown enlarged. In the discharge of the PDP, charged particles (electrons) existing in the discharge space are moved by an electric field, collide with gas molecules 49 of the discharge gas, and are separated into positive ions 50 and electrons 51. The positive ions 50 generated at this time move by an electric field and collide with a scanning electrode (Y electrode) which is a cathode. When the positive ions collide with the cathode, the protective layer 4-1 covering the Y electrode of the cathode emits secondary electrons. The emitted secondary electrons further collide with the gas molecules 49 and are separated into positive ions 50 and electrons 51. By repeating this process, the charge in the gas space increases and discharge occurs. When gas molecules are ionized, ultraviolet rays are emitted, and the ultraviolet rays collide with the phosphor to excite the phosphor to induce light emission.

  In the address discharge, when a negative pulse is applied to the scan electrode Y and a positive pulse is applied to the address electrode 8, a discharge is first generated between the scan electrode Y and the address electrode 8, and thereby generated. Due to the wall charges on the scan electrode Y, a discharge is generated between the scan electrode Y and the display electrode X, and positive and negative wall charges are accumulated on the dielectric layers of both the electrodes X and Y. Due to the accumulated wall charges, the sustain discharge is repeated between the electrodes X and Y in response to the subsequent sustain discharge pulse application.

  As described above, in order to expand the discharge scale, it is important to emit more electrons into the discharge space. In particular, the vicinity of the protective layer 4-1 on the front substrate side where the discharge is concentrated and the rear substrate side. It is desirable that a substance having a high secondary electron emission coefficient is formed in the vicinity of the top of the side wall of the barrier rib.

  Therefore, in the present embodiment, the phosphor layer 6 is applied from the lower region to the top on the side surface of the partition wall 5 that partitions the cells of the rear glass substrate 9, that is, the entire height of the side surface of the partition wall. A protective layer 4-2 was formed so as to cover the phosphor layer 6 only in the vicinity of the top of the side surface of 5. As a result, when a voltage is applied to discharge gas molecules by ionizing them into positive ions and electrons, the generated positive ions are collided with the protective layer 4-1 on the front substrate side by the electric field, and the back surface. It can collide with the protective layer 4-2 at the top of the partition wall of the glass substrate, and the secondary electrons 4-3 can be emitted from the colliding protective layer 4-2 to grow a discharge.

  In addition, in the present embodiment, since the phosphor layer 6 is formed from the upper surface of the dielectric layer 7 on the address electrode 8 and the lower region to the top of the side wall of the partition wall, high emission luminance can be realized in the cell region. , The viewing angle can be kept wide. That is, since the phosphor layer 6 is covered with the protective film 4-2 in the vicinity of the top of the partition wall, the ultraviolet rays are partially absorbed by the protective layer 4-2, but the remaining ultraviolet rays reach the phosphor layer 6 and are excited. Since this contributes to light emission, a high light emission luminance region in the cell region can be widened. The phosphor layer 6 in the vicinity of the top of the partition that is affected by ion bombardment due to discharge is protected by the protective layer 4-2, so that the lifetime of the phosphor layer 6 is also increased.

  FIG. 9 is a graph showing the correlation between the cell center distance and the luminance in this embodiment and showing the viewing angle dependence of the luminance. A solid line indicates the emission intensity ratio of the present embodiment, and a broken line indicates the emission intensity ratio of Patent Document 1 described above. As shown in the cross-sectional view shown below the graph, in Patent Document 1 described above, the phosphor layer 6B is formed only up to the lower side region of the partition wall 5 as shown by the broken line, and the phosphor layer is not formed up to the vicinity of the top of the side surface. . For this reason, the emission luminance decreases as the distance from the cell center position increases. However, in the present embodiment, as shown by the solid line, the phosphor layer 6A is applied to the vicinity of the top of the side surface of the partition wall 5, so that the emission luminance is hardly lowered even if it is away from the cell center position. In the present embodiment, since only the phosphor layer 6 near the top of the side surface of the partition wall 5 is covered with the protective layer 4-2, the ultraviolet rays generated by the discharge are absorbed by the protective layer 4-2 and the phosphor layer. It is possible to minimize the situation where it does not reach 6. Therefore, it is possible to minimize a decrease in light emission of the phosphor due to the provision of the protective layer 4-2. From the above, in the present embodiment, it is possible to improve the discharge near the top of the partition wall while preventing the viewing angle and the luminance from being lowered.

  Next, a method for manufacturing the PDP in the present embodiment will be described. FIG. 7 is an explanatory diagram of a method for manufacturing a PDP in the present embodiment. In the present embodiment, a protective layer made of MgO is formed only near the top of the side wall of the partition wall on the back glass substrate. In order to partially form the protective layer in this way, as shown in FIG. 7, the rear glass substrate 9 on which the partition walls 5 are formed in the vapor deposition apparatus is applied to the MgO pellets 13 placed on the hearth 12 as the vapor deposition source. On the other hand, the MgO is vapor-deposited while being held obliquely and only one side surface of the partition wall 5 is exposed to the vapor deposition source.

  In the vapor deposition apparatus, the MgO pellet 13 mounted on the hearth 12 is irradiated with the electron beam 14 to sublimate the pellet 13, and the sublimated MgO is blown in the direction of the arrow 11. Therefore, in the present embodiment, the rear glass substrate 9 is inclined and the state in which only one side surface of the partition wall faces the deposition source is passed through the rear glass substrate 9 through the vapor deposition apparatus. Thereby, MgO is formed on one side of the side wall of the partition wall on the inclined rear glass substrate. At this time, MgO is not deposited on the lower region of the side wall of the partition wall and the address electrode, which is behind the adjacent partition wall 5. Further, the MgO film is also formed in the vicinity of the top of the side surface on the opposite side of the partition wall by changing the inclination direction to the opposite side and passing the MgO pellet again. As described above, MgO can be deposited only in the vicinity of the tops of both side surfaces of the partition wall 5 by changing the inclination direction of the back glass substrate 9 and reciprocating the MgO pellets 13 as the evaporation source. In addition, since it is only necessary to tilt the rear glass substrate 9 in a predetermined direction, this can be realized easily. In this case, the protective layer 4-2 is formed from the vicinity of the top of the side wall of the partition wall to the top.

  FIG. 6 is a cross-sectional view of a PDP according to the second embodiment of the present invention. The second embodiment is the same as the first embodiment shown in FIG. 1 except for the protective layer 4-2 at the top of the partition wall 5 on the rear glass substrate 9. In the first embodiment of FIG. 1, the protective layer 4-2 is formed in the vicinity of the top of the partition wall 5 of the rear glass substrate 9, whereas in the second embodiment of FIG. A protective layer 4-2 covering the phosphor layer 6 is provided only in the vicinity of the top of the side surface excluding the top of the partition wall 5 of the substrate 9. That is, since the top of the partition wall 5 is in contact with the protective layer 4-1 on the front substrate side, it does not contribute to secondary electron emission during discharge. The protective layer made of MgO itself has a hygroscopic property, which causes deterioration of discharge characteristics after sealing the panel. Therefore, it is desirable not to form the protective layer of MgO on the top of unnecessary partition walls.

  As a manufacturing method of the second embodiment, there is a method in which MgO is deposited on the top of the partition wall 5 by vapor deposition or the like and then MgO on the top of the partition wall is polished. Thereby, the protective layer 4-2 can be formed only on the phosphor layer 6 in the vicinity of the top of the partition wall. As another manufacturing method, a method may be used in which the top portion of the barrier rib is covered with a mask and the portion excluding the vicinity of the barrier rib top portion on the surface of the phosphor layer is covered with a mask to form MgO.

  ADVANTAGE OF THE INVENTION According to this invention, PDP which improved luminous efficiency, suppressing the fall of a viewing angle can be provided.

Claims (6)

In an AC type plasma display panel having a discharge space in which a discharge gas is sealed between a front substrate and a rear substrate,
On the front substrate, a display electrode group, a dielectric layer on the display electrode, and a first protective layer made of a material having a high secondary electron emission coefficient that covers the dielectric layer are formed.
On the back substrate, an address electrode group, barrier ribs disposed on at least both sides of the address electrode, a phosphor layer extending from the lower side to the top of the side wall of the barrier rib in addition to the address electrode, and the address electrode And a second protective layer made of the material that covers the phosphor layer in the vicinity of the top of the side surface of the partition wall is formed without covering the phosphor on the lower region of the side surface of the partition wall. Plasma display panel. In claim 1,
The plasma display panel, wherein the second protective layer covers from the top of the partition wall to the vicinity of the top of the side surface. In claim 1,
2. The plasma display panel according to claim 1, wherein the second protective layer is not formed on the top of the partition wall, but is formed only near the top of the side surface of the partition wall.   The plasma display panel, wherein the material includes any one of MgO, MgF, and SrO. In a method of manufacturing an AC type plasma display panel having a discharge space in which a discharge gas is sealed between a front substrate and a back substrate,
Forming a display electrode group on the front substrate, a dielectric layer thereon, and a first protective layer made of a material having a high secondary electron emission coefficient covering the dielectric layer;
Forming an address electrode group on the back substrate, barrier ribs disposed on both sides of the address electrode, and a phosphor layer extending from the bottom to the top of the side surface of the barrier rib in addition to the address electrodes;
Further, the rear substrate is inclined obliquely with respect to the deposition source of the material, and deposition is performed while holding one side surface of the side wall exposed to the deposition source, except for a lower region on the side surface of the partition wall. Forming a second protective layer made of the material so as to cover the phosphor layer in the vicinity of the top of the plasma display panel. In claim 5,
In the vapor deposition step, the back substrate is tilted in the first direction to form the second protective layer near the top of one side surface of the partition wall, and the back substrate is opposite to the first direction. A method of manufacturing a plasma display panel, wherein the second protective layer is formed near the top of the other side surface of the partition wall by inclining in a second direction.

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