JPS647557A - Vertically stacked read-only memory - Google Patents

Vertically stacked read-only memory

Info

Publication number
JPS647557A
JPS647557A JP16374987A JP16374987A JPS647557A JP S647557 A JPS647557 A JP S647557A JP 16374987 A JP16374987 A JP 16374987A JP 16374987 A JP16374987 A JP 16374987A JP S647557 A JPS647557 A JP S647557A
Authority
JP
Japan
Prior art keywords
memory block
digit line
memory
type
transistors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16374987A
Other languages
Japanese (ja)
Inventor
Takashige Kiuchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP16374987A priority Critical patent/JPS647557A/en
Publication of JPS647557A publication Critical patent/JPS647557A/en
Pending legal-status Critical Current

Links

Landscapes

  • Read Only Memory (AREA)
  • Semiconductor Memories (AREA)

Abstract

PURPOSE:To reduce bit-related defects by a method wherein a memory block constituted of enhancement-type transistors is separated from a digit line. CONSTITUTION:When all cell transistors c1, c2...cn are of the enhancement type, a memory block selecting transistor 2 is changed from a depletion type to an enhancement type. This means that a second block selecting transistor 2 functions to electrically isolate a memory block from a digit line 20 when any of the transistors c1, c2...cn constituting the memory block is broken down. This stops a digit line from discharging, preventing trouble.
JP16374987A 1987-06-29 1987-06-29 Vertically stacked read-only memory Pending JPS647557A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16374987A JPS647557A (en) 1987-06-29 1987-06-29 Vertically stacked read-only memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16374987A JPS647557A (en) 1987-06-29 1987-06-29 Vertically stacked read-only memory

Publications (1)

Publication Number Publication Date
JPS647557A true JPS647557A (en) 1989-01-11

Family

ID=15779964

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16374987A Pending JPS647557A (en) 1987-06-29 1987-06-29 Vertically stacked read-only memory

Country Status (1)

Country Link
JP (1) JPS647557A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0498691A (en) * 1990-08-16 1992-03-31 Nec Ic Microcomput Syst Ltd Semiconductor memory
JPH06150691A (en) * 1992-11-11 1994-05-31 Yamaha Corp Semiconductor memory
US5581107A (en) * 1993-03-17 1996-12-03 Fujitsu Limited Nonvolatile semiconductor memory that eases the dielectric strength requirements

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0498691A (en) * 1990-08-16 1992-03-31 Nec Ic Microcomput Syst Ltd Semiconductor memory
JPH06150691A (en) * 1992-11-11 1994-05-31 Yamaha Corp Semiconductor memory
US5581107A (en) * 1993-03-17 1996-12-03 Fujitsu Limited Nonvolatile semiconductor memory that eases the dielectric strength requirements

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