JPS6471162A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS6471162A
JPS6471162A JP62226307A JP22630787A JPS6471162A JP S6471162 A JPS6471162 A JP S6471162A JP 62226307 A JP62226307 A JP 62226307A JP 22630787 A JP22630787 A JP 22630787A JP S6471162 A JPS6471162 A JP S6471162A
Authority
JP
Japan
Prior art keywords
packaging
packages
tape carrier
superimposed
reliability
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62226307A
Other languages
Japanese (ja)
Other versions
JP2642359B2 (en
Inventor
Masayuki Watanabe
Toshio Kanno
Yoshiaki Wakashima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Hitachi Consumer Electronics Co Ltd
Japan Display Inc
Original Assignee
Hitachi Device Engineering Co Ltd
Hitachi Ltd
Hitachi Consumer Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Device Engineering Co Ltd, Hitachi Ltd, Hitachi Consumer Electronics Co Ltd filed Critical Hitachi Device Engineering Co Ltd
Priority to JP62226307A priority Critical patent/JP2642359B2/en
Priority to KR1019880007112A priority patent/KR970003915B1/en
Priority to US07/209,739 priority patent/US4982265A/en
Publication of JPS6471162A publication Critical patent/JPS6471162A/en
Priority to US07/796,873 priority patent/US5138438A/en
Priority to KR1019930010377A priority patent/KR970003913B1/en
Priority to KR1019930010378A priority patent/KR970003914B1/en
Priority to US08/323,709 priority patent/US5587341A/en
Priority to US08/763,469 priority patent/US5708298A/en
Application granted granted Critical
Publication of JP2642359B2 publication Critical patent/JP2642359B2/en
Priority to US08/984,330 priority patent/US5910685A/en
Priority to US09/292,999 priority patent/US6262488B1/en
Priority to US09/863,450 priority patent/US6424030B2/en
Priority to US10/124,281 priority patent/US6521993B2/en
Priority to US10/341,397 priority patent/US6693346B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Abstract

PURPOSE:To assure high density packaging together with the improvement of reliability by superimposing on a substrate two or more of tape carrier packages, each of which is modified to realize the superimposed packaging of tape carrier packages. CONSTITUTION:A upper tape carrier package 8a is one having a lead pattern 2 shown by A and a lower tape carrier package 8b is one having a lead pattern 2 shown by B. In A, a upper right end leads 2a are disposed in parallel to the remaining leads 2b. In B, the upper right end leads 2a are bent at a right angle. the packages 8a, 8b are superimposed on a packaging substrate 9, for packaging thereof. This improves packaging density compared with a situation where the packages 8a, 8b are provided in parallel to each other. Hereby, reliability is improved.
JP62226307A 1987-06-24 1987-09-11 Semiconductor device Expired - Lifetime JP2642359B2 (en)

Priority Applications (13)

Application Number Priority Date Filing Date Title
JP62226307A JP2642359B2 (en) 1987-09-11 1987-09-11 Semiconductor device
KR1019880007112A KR970003915B1 (en) 1987-06-24 1988-06-14 Semiconductor device and the use memory module
US07/209,739 US4982265A (en) 1987-06-24 1988-06-22 Semiconductor integrated circuit device and method of manufacturing the same
US07/796,873 US5138438A (en) 1987-06-24 1991-11-25 Lead connections means for stacked tab packaged IC chips
KR1019930010377A KR970003913B1 (en) 1987-06-24 1993-06-09 Surface mounting method of semiconductor integrated device
KR1019930010378A KR970003914B1 (en) 1987-06-24 1993-06-09 Semiconductor memory module
US08/323,709 US5587341A (en) 1987-06-24 1994-10-18 Process for manufacturing a stacked integrated circuit package
US08/763,469 US5708298A (en) 1987-06-24 1996-12-10 Semiconductor memory module having double-sided stacked memory chip layout
US08/984,330 US5910685A (en) 1987-06-24 1997-12-03 Semiconductor memory module having double-sided stacked memory chip layout
US09/292,999 US6262488B1 (en) 1987-06-24 1999-04-16 Semiconductor memory module having double-sided memory chip layout
US09/863,450 US6424030B2 (en) 1987-06-24 2001-05-24 Semiconductor memory module having double-sided stacked memory chip layout
US10/124,281 US6521993B2 (en) 1987-06-24 2002-04-18 Semiconductor memory module having double-sided stacked memory chip layout
US10/341,397 US6693346B2 (en) 1987-06-24 2003-01-14 Semiconductor memory module having double-sided stacked memory chip layout

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62226307A JP2642359B2 (en) 1987-09-11 1987-09-11 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS6471162A true JPS6471162A (en) 1989-03-16
JP2642359B2 JP2642359B2 (en) 1997-08-20

Family

ID=16843154

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62226307A Expired - Lifetime JP2642359B2 (en) 1987-06-24 1987-09-11 Semiconductor device

Country Status (1)

Country Link
JP (1) JP2642359B2 (en)

Cited By (64)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5028986A (en) * 1987-12-28 1991-07-02 Hitachi, Ltd. Semiconductor device and semiconductor module with a plurality of stacked semiconductor devices
US5198888A (en) * 1987-12-28 1993-03-30 Hitachi, Ltd. Semiconductor stacked device
US6383840B1 (en) 1999-07-22 2002-05-07 Seiko Epson Corporation Semiconductor device, method of manufacture thereof, circuit board, and electronic device
US6395578B1 (en) 1999-05-20 2002-05-28 Amkor Technology, Inc. Semiconductor package and method for fabricating the same
US6521483B1 (en) 1999-07-22 2003-02-18 Seiko Epson Corporation Semiconductor device, method of manufacture thereof, circuit board, and electronic device
US6552416B1 (en) 2000-09-08 2003-04-22 Amkor Technology, Inc. Multiple die lead frame package with enhanced die-to-die interconnect routing using internal lead trace wiring
US6555917B1 (en) 2001-10-09 2003-04-29 Amkor Technology, Inc. Semiconductor package having stacked semiconductor chips and method of making the same
US6642610B2 (en) 1999-12-20 2003-11-04 Amkor Technology, Inc. Wire bonding method and semiconductor package manufactured using the same
US6737750B1 (en) 2001-12-07 2004-05-18 Amkor Technology, Inc. Structures for improving heat dissipation in stacked semiconductor packages
US6759272B2 (en) 1996-11-21 2004-07-06 Renesas Technology Corp. Semiconductor device and manufacturing method thereof
US6798049B1 (en) 1999-08-24 2004-09-28 Amkor Technology Inc. Semiconductor package and method for fabricating the same
US6879047B1 (en) 2003-02-19 2005-04-12 Amkor Technology, Inc. Stacking structure for semiconductor devices using a folded over flexible substrate and method therefor
US6885106B1 (en) 2001-01-11 2005-04-26 Tessera, Inc. Stacked microelectronic assemblies and methods of making same
US6946323B1 (en) 2001-11-02 2005-09-20 Amkor Technology, Inc. Semiconductor package having one or more die stacked on a prepackaged device and method therefor
US7154171B1 (en) 2002-02-22 2006-12-26 Amkor Technology, Inc. Stacking structure for semiconductor devices using a folded over flexible substrate and method therefor
US7485490B2 (en) 2001-03-09 2009-02-03 Amkor Technology, Inc. Method of forming a stacked semiconductor package
US8835228B2 (en) 2012-05-22 2014-09-16 Invensas Corporation Substrate-less stackable package with wire-bond interconnect
US8878353B2 (en) 2012-12-20 2014-11-04 Invensas Corporation Structure for microelectronic packaging with bond elements to encapsulation surface
US8883563B1 (en) 2013-07-15 2014-11-11 Invensas Corporation Fabrication of microelectronic assemblies having stack terminals coupled by connectors extending through encapsulation
US8907466B2 (en) 2010-07-19 2014-12-09 Tessera, Inc. Stackable molded microelectronic packages
US8927337B2 (en) 2004-11-03 2015-01-06 Tessera, Inc. Stacked packaging improvements
US8957527B2 (en) 2010-11-15 2015-02-17 Tessera, Inc. Microelectronic package with terminals on dielectric mass
US8975738B2 (en) 2012-11-12 2015-03-10 Invensas Corporation Structure for microelectronic packaging with terminals on dielectric mass
USRE45463E1 (en) 2003-11-12 2015-04-14 Tessera, Inc. Stacked microelectronic assemblies with central contacts
US9023691B2 (en) 2013-07-15 2015-05-05 Invensas Corporation Microelectronic assemblies with stack terminals coupled by connectors extending through encapsulation
US9034696B2 (en) 2013-07-15 2015-05-19 Invensas Corporation Microelectronic assemblies having reinforcing collars on connectors extending through encapsulation
US9041227B2 (en) 2011-10-17 2015-05-26 Invensas Corporation Package-on-package assembly with wire bond vias
US9082753B2 (en) 2013-11-12 2015-07-14 Invensas Corporation Severing bond wire by kinking and twisting
US9087815B2 (en) 2013-11-12 2015-07-21 Invensas Corporation Off substrate kinking of bond wire
US9093435B2 (en) 2011-05-03 2015-07-28 Tessera, Inc. Package-on-package assembly with wire bonds to encapsulation surface
US9159708B2 (en) 2010-07-19 2015-10-13 Tessera, Inc. Stackable molded microelectronic packages with area array unit connectors
US9214454B2 (en) 2014-03-31 2015-12-15 Invensas Corporation Batch process fabrication of package-on-package microelectronic assemblies
US9218988B2 (en) 2005-12-23 2015-12-22 Tessera, Inc. Microelectronic packages and methods therefor
US9224717B2 (en) 2011-05-03 2015-12-29 Tessera, Inc. Package-on-package assembly with wire bonds to encapsulation surface
US9324681B2 (en) 2010-12-13 2016-04-26 Tessera, Inc. Pin attachment
US9349706B2 (en) 2012-02-24 2016-05-24 Invensas Corporation Method for package-on-package assembly with wire bonds to encapsulation surface
US9391008B2 (en) 2012-07-31 2016-07-12 Invensas Corporation Reconstituted wafer-level package DRAM
US9412714B2 (en) 2014-05-30 2016-08-09 Invensas Corporation Wire bond support structure and microelectronic package including wire bonds therefrom
US9502390B2 (en) 2012-08-03 2016-11-22 Invensas Corporation BVA interposer
US9583411B2 (en) 2014-01-17 2017-02-28 Invensas Corporation Fine pitch BVA using reconstituted wafer with area array accessible for testing
US9601454B2 (en) 2013-02-01 2017-03-21 Invensas Corporation Method of forming a component having wire bonds and a stiffening layer
US9646917B2 (en) 2014-05-29 2017-05-09 Invensas Corporation Low CTE component with wire bond interconnects
US9659848B1 (en) 2015-11-18 2017-05-23 Invensas Corporation Stiffened wires for offset BVA
US9685365B2 (en) 2013-08-08 2017-06-20 Invensas Corporation Method of forming a wire bond having a free end
US9691679B2 (en) 2012-02-24 2017-06-27 Invensas Corporation Method for package-on-package assembly with wire bonds to encapsulation surface
US9728527B2 (en) 2013-11-22 2017-08-08 Invensas Corporation Multiple bond via arrays of different wire heights on a same substrate
US9735084B2 (en) 2014-12-11 2017-08-15 Invensas Corporation Bond via array for thermal conductivity
US9761554B2 (en) 2015-05-07 2017-09-12 Invensas Corporation Ball bonding metal wire bond wires to metal pads
US9812402B2 (en) 2015-10-12 2017-11-07 Invensas Corporation Wire bond wires for interference shielding
US9842745B2 (en) 2012-02-17 2017-12-12 Invensas Corporation Heat spreading substrate with embedded interconnects
US9852969B2 (en) 2013-11-22 2017-12-26 Invensas Corporation Die stacks with one or more bond via arrays of wire bond wires and with one or more arrays of bump interconnects
US9888579B2 (en) 2015-03-05 2018-02-06 Invensas Corporation Pressing of wire bond wire tips to provide bent-over tips
US9911718B2 (en) 2015-11-17 2018-03-06 Invensas Corporation ‘RDL-First’ packaged microelectronic device for a package-on-package device
US9935075B2 (en) 2016-07-29 2018-04-03 Invensas Corporation Wire bonding method and apparatus for electromagnetic interference shielding
US9984992B2 (en) 2015-12-30 2018-05-29 Invensas Corporation Embedded wire bond wires for vertical integration with separate surface mount and wire bond mounting surfaces
US10008469B2 (en) 2015-04-30 2018-06-26 Invensas Corporation Wafer-level packaging using wire bond wires in place of a redistribution layer
US10008477B2 (en) 2013-09-16 2018-06-26 Invensas Corporation Microelectronic element with bond elements to encapsulation surface
US10026717B2 (en) 2013-11-22 2018-07-17 Invensas Corporation Multiple bond via arrays of different wire heights on a same substrate
US10181457B2 (en) 2015-10-26 2019-01-15 Invensas Corporation Microelectronic package for wafer-level chip scale packaging with fan-out
US10299368B2 (en) 2016-12-21 2019-05-21 Invensas Corporation Surface integrated waveguides and circuit structures therefor
US10332854B2 (en) 2015-10-23 2019-06-25 Invensas Corporation Anchoring structure of fine pitch bva
US10381326B2 (en) 2014-05-28 2019-08-13 Invensas Corporation Structure and method for integrated circuits packaging with increased density
US10460958B2 (en) 2013-08-07 2019-10-29 Invensas Corporation Method of manufacturing embedded packaging with preformed vias
US10490528B2 (en) 2015-10-12 2019-11-26 Invensas Corporation Embedded wire bond wires

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62142394A (en) * 1985-12-17 1987-06-25 Matsushita Electronics Corp Semiconductor package mounting
JPS6318654A (en) * 1986-07-11 1988-01-26 Hitachi Micro Comput Eng Ltd Electronic device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62142394A (en) * 1985-12-17 1987-06-25 Matsushita Electronics Corp Semiconductor package mounting
JPS6318654A (en) * 1986-07-11 1988-01-26 Hitachi Micro Comput Eng Ltd Electronic device

Cited By (107)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5028986A (en) * 1987-12-28 1991-07-02 Hitachi, Ltd. Semiconductor device and semiconductor module with a plurality of stacked semiconductor devices
US5198888A (en) * 1987-12-28 1993-03-30 Hitachi, Ltd. Semiconductor stacked device
US5334875A (en) * 1987-12-28 1994-08-02 Hitachi, Ltd. Stacked semiconductor memory device and semiconductor memory module containing the same
US6759272B2 (en) 1996-11-21 2004-07-06 Renesas Technology Corp. Semiconductor device and manufacturing method thereof
US6395578B1 (en) 1999-05-20 2002-05-28 Amkor Technology, Inc. Semiconductor package and method for fabricating the same
US6762078B2 (en) 1999-05-20 2004-07-13 Amkor Technology, Inc. Semiconductor package having semiconductor chip within central aperture of substrate
US6383840B1 (en) 1999-07-22 2002-05-07 Seiko Epson Corporation Semiconductor device, method of manufacture thereof, circuit board, and electronic device
US6521483B1 (en) 1999-07-22 2003-02-18 Seiko Epson Corporation Semiconductor device, method of manufacture thereof, circuit board, and electronic device
US6798049B1 (en) 1999-08-24 2004-09-28 Amkor Technology Inc. Semiconductor package and method for fabricating the same
US6642610B2 (en) 1999-12-20 2003-11-04 Amkor Technology, Inc. Wire bonding method and semiconductor package manufactured using the same
US6803254B2 (en) 1999-12-20 2004-10-12 Amkor Technology, Inc. Wire bonding method for a semiconductor package
US6552416B1 (en) 2000-09-08 2003-04-22 Amkor Technology, Inc. Multiple die lead frame package with enhanced die-to-die interconnect routing using internal lead trace wiring
US6885106B1 (en) 2001-01-11 2005-04-26 Tessera, Inc. Stacked microelectronic assemblies and methods of making same
US7485490B2 (en) 2001-03-09 2009-02-03 Amkor Technology, Inc. Method of forming a stacked semiconductor package
US6555917B1 (en) 2001-10-09 2003-04-29 Amkor Technology, Inc. Semiconductor package having stacked semiconductor chips and method of making the same
US6946323B1 (en) 2001-11-02 2005-09-20 Amkor Technology, Inc. Semiconductor package having one or more die stacked on a prepackaged device and method therefor
US6919631B1 (en) 2001-12-07 2005-07-19 Amkor Technology, Inc. Structures for improving heat dissipation in stacked semiconductor packages
US6737750B1 (en) 2001-12-07 2004-05-18 Amkor Technology, Inc. Structures for improving heat dissipation in stacked semiconductor packages
US7154171B1 (en) 2002-02-22 2006-12-26 Amkor Technology, Inc. Stacking structure for semiconductor devices using a folded over flexible substrate and method therefor
US6879047B1 (en) 2003-02-19 2005-04-12 Amkor Technology, Inc. Stacking structure for semiconductor devices using a folded over flexible substrate and method therefor
USRE45463E1 (en) 2003-11-12 2015-04-14 Tessera, Inc. Stacked microelectronic assemblies with central contacts
US9570416B2 (en) 2004-11-03 2017-02-14 Tessera, Inc. Stacked packaging improvements
US9153562B2 (en) 2004-11-03 2015-10-06 Tessera, Inc. Stacked packaging improvements
US8927337B2 (en) 2004-11-03 2015-01-06 Tessera, Inc. Stacked packaging improvements
US9218988B2 (en) 2005-12-23 2015-12-22 Tessera, Inc. Microelectronic packages and methods therefor
US9984901B2 (en) 2005-12-23 2018-05-29 Tessera, Inc. Method for making a microelectronic assembly having conductive elements
US8907466B2 (en) 2010-07-19 2014-12-09 Tessera, Inc. Stackable molded microelectronic packages
US9553076B2 (en) 2010-07-19 2017-01-24 Tessera, Inc. Stackable molded microelectronic packages with area array unit connectors
US9123664B2 (en) 2010-07-19 2015-09-01 Tessera, Inc. Stackable molded microelectronic packages
US9159708B2 (en) 2010-07-19 2015-10-13 Tessera, Inc. Stackable molded microelectronic packages with area array unit connectors
US9570382B2 (en) 2010-07-19 2017-02-14 Tessera, Inc. Stackable molded microelectronic packages
US10128216B2 (en) 2010-07-19 2018-11-13 Tessera, Inc. Stackable molded microelectronic packages
US8957527B2 (en) 2010-11-15 2015-02-17 Tessera, Inc. Microelectronic package with terminals on dielectric mass
US9324681B2 (en) 2010-12-13 2016-04-26 Tessera, Inc. Pin attachment
US10593643B2 (en) 2011-05-03 2020-03-17 Tessera, Inc. Package-on-package assembly with wire bonds to encapsulation surface
US9224717B2 (en) 2011-05-03 2015-12-29 Tessera, Inc. Package-on-package assembly with wire bonds to encapsulation surface
US9093435B2 (en) 2011-05-03 2015-07-28 Tessera, Inc. Package-on-package assembly with wire bonds to encapsulation surface
US9691731B2 (en) 2011-05-03 2017-06-27 Tessera, Inc. Package-on-package assembly with wire bonds to encapsulation surface
US10062661B2 (en) 2011-05-03 2018-08-28 Tessera, Inc. Package-on-package assembly with wire bonds to encapsulation surface
US9252122B2 (en) 2011-10-17 2016-02-02 Invensas Corporation Package-on-package assembly with wire bond vias
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US9842745B2 (en) 2012-02-17 2017-12-12 Invensas Corporation Heat spreading substrate with embedded interconnects
US9349706B2 (en) 2012-02-24 2016-05-24 Invensas Corporation Method for package-on-package assembly with wire bonds to encapsulation surface
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