JPS6458043A - Microcomputer incorporating a/d and d/a converters - Google Patents

Microcomputer incorporating a/d and d/a converters

Info

Publication number
JPS6458043A
JPS6458043A JP62215612A JP21561287A JPS6458043A JP S6458043 A JPS6458043 A JP S6458043A JP 62215612 A JP62215612 A JP 62215612A JP 21561287 A JP21561287 A JP 21561287A JP S6458043 A JPS6458043 A JP S6458043A
Authority
JP
Japan
Prior art keywords
cpu
signal
level
conversion
stop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62215612A
Other languages
Japanese (ja)
Inventor
Hatsuhiro Nagaishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62215612A priority Critical patent/JPS6458043A/en
Publication of JPS6458043A publication Critical patent/JPS6458043A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To decrease the noises and to ensure the accurate conversion with A/D and D/A converters, by stopping the operations of circuits except the converters during the A/D and D/A conversions. CONSTITUTION:When a CPU 3 outputs the address allocated to an A/D converter 2 to an address bus 5, the converter 2 is selected and an A/D selection signal 7 becomes active to be changed to an H level from an L level. An edge detecting circuit 4 detects the leading edge when the signal 7 is changed to an H level from an L level and gives a CPU stop signal 8 to the CPU 3 to request the stop of operation of the CPU 3. The CPU 3 receives the signal 8 and is set under a stop mode. At the same time, the CPU 3 outputs an A/D conversion start signal 11 for the start of the A/D conversion. When the A/D conversion is through, the signal 7 is nonactive and changed again to an L level from an H level. The circuit 4 detects this change and gives a stop releasing signal 9 to the CPU 3. The CPU 3 receives the signal 9 and restarts its operation.
JP62215612A 1987-08-28 1987-08-28 Microcomputer incorporating a/d and d/a converters Pending JPS6458043A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62215612A JPS6458043A (en) 1987-08-28 1987-08-28 Microcomputer incorporating a/d and d/a converters

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62215612A JPS6458043A (en) 1987-08-28 1987-08-28 Microcomputer incorporating a/d and d/a converters

Publications (1)

Publication Number Publication Date
JPS6458043A true JPS6458043A (en) 1989-03-06

Family

ID=16675299

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62215612A Pending JPS6458043A (en) 1987-08-28 1987-08-28 Microcomputer incorporating a/d and d/a converters

Country Status (1)

Country Link
JP (1) JPS6458043A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1991020051A1 (en) * 1990-06-11 1991-12-26 Oki Electric Industry Co., Ltd. Microcomputer provided with built-in converter
JPH0415070U (en) * 1990-05-23 1992-02-06
JPH04328624A (en) * 1991-04-30 1992-11-17 Toshiba Corp Analog-digital mixed integrated circuit
US5640161A (en) * 1991-05-29 1997-06-17 Pacific Microsonics, Inc. Silent data conversion system with sampling during electrical silence
US6300889B1 (en) * 2000-06-19 2001-10-09 Cygnal Integrated Products, Inc. System on chip with ADC having serial test mode

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0415070U (en) * 1990-05-23 1992-02-06
WO1991020051A1 (en) * 1990-06-11 1991-12-26 Oki Electric Industry Co., Ltd. Microcomputer provided with built-in converter
US5307066A (en) * 1990-06-11 1994-04-26 Oki Electric Industry Co., Ltd. Microprocessor controlled converter having reduced noise interference and method of operating same
EP0487743B1 (en) * 1990-06-11 1998-09-09 Oki Electric Industry Company, Limited Microcomputer provided with built-in converter
JPH04328624A (en) * 1991-04-30 1992-11-17 Toshiba Corp Analog-digital mixed integrated circuit
US5640161A (en) * 1991-05-29 1997-06-17 Pacific Microsonics, Inc. Silent data conversion system with sampling during electrical silence
US6300889B1 (en) * 2000-06-19 2001-10-09 Cygnal Integrated Products, Inc. System on chip with ADC having serial test mode

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