JPS6434083A - Still picture transmission equipment - Google Patents

Still picture transmission equipment

Info

Publication number
JPS6434083A
JPS6434083A JP19112187A JP19112187A JPS6434083A JP S6434083 A JPS6434083 A JP S6434083A JP 19112187 A JP19112187 A JP 19112187A JP 19112187 A JP19112187 A JP 19112187A JP S6434083 A JPS6434083 A JP S6434083A
Authority
JP
Japan
Prior art keywords
picture data
signal
memory
picture
clock
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19112187A
Other languages
Japanese (ja)
Inventor
Shinichiro Suda
Satoshi Ito
Hisao Mogi
Tadahisa Yamamoto
Kiichi Hasegawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Sony Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp, Sony Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP19112187A priority Critical patent/JPS6434083A/en
Publication of JPS6434083A publication Critical patent/JPS6434083A/en
Pending legal-status Critical Current

Links

Landscapes

  • Compression Or Coding Systems Of Tv Signals (AREA)

Abstract

PURPOSE:To prevent the disorder of a received picture by using an internal clock even at the time of receiving picture data. CONSTITUTION:At the time of receiving the picture data from an opponent, a carrier signal S1 is extracted from a received AM signal Sa, and instead of making the extracted signal S1 into a clock and writing the picture data to a memory 41, a frequency-dividing signal S1 from a dividing circuit 84 is made into the clock and the picture data are written to the memory 41. Consequently, even though an instantaneous interruption and a pulse noise are generated in a picture data period T6, the increment of a writing address to the memory 41 can not be suspended. Thus, the dislocation of a displayed picture due to the instantaneous interruption and the pulse noise can be prevented.
JP19112187A 1987-07-29 1987-07-29 Still picture transmission equipment Pending JPS6434083A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19112187A JPS6434083A (en) 1987-07-29 1987-07-29 Still picture transmission equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19112187A JPS6434083A (en) 1987-07-29 1987-07-29 Still picture transmission equipment

Publications (1)

Publication Number Publication Date
JPS6434083A true JPS6434083A (en) 1989-02-03

Family

ID=16269214

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19112187A Pending JPS6434083A (en) 1987-07-29 1987-07-29 Still picture transmission equipment

Country Status (1)

Country Link
JP (1) JPS6434083A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4979028A (en) * 1988-05-30 1990-12-18 Sony Corporation Video telephone
US5697678A (en) * 1993-05-26 1997-12-16 Robert Bosch Gmbh Hydraulic unit supported in such a way as to damp vibration and forming part of a slip-controlled brake system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4979028A (en) * 1988-05-30 1990-12-18 Sony Corporation Video telephone
US5697678A (en) * 1993-05-26 1997-12-16 Robert Bosch Gmbh Hydraulic unit supported in such a way as to damp vibration and forming part of a slip-controlled brake system

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