JPS6424631A - Phase locked loop oscillator - Google Patents

Phase locked loop oscillator

Info

Publication number
JPS6424631A
JPS6424631A JP62182761A JP18276187A JPS6424631A JP S6424631 A JPS6424631 A JP S6424631A JP 62182761 A JP62182761 A JP 62182761A JP 18276187 A JP18276187 A JP 18276187A JP S6424631 A JPS6424631 A JP S6424631A
Authority
JP
Japan
Prior art keywords
output
pulse
saw
comparison
leading edge
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62182761A
Other languages
Japanese (ja)
Inventor
Takashi Shinozuka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62182761A priority Critical patent/JPS6424631A/en
Publication of JPS6424631A publication Critical patent/JPS6424631A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To output an output signal with less jitter by outputting a phase comparison output being a stepwise signal of pulse amplitude modulation wave corresponding to a phase difference between an input pulse and a comparison pulse. CONSTITUTION:A phase comparator 6 consists of a saw-tooth wave generating circuit 1 and a sample-hold circuit 2, and the saw-tooth wave generating circuit 1 outputs a saw-tooth wave 11 synchronously with the leading edge of an input pulse 10. The sample-hold circuit 2 samples an output level of the saw-tooth wave 11 at each leading edge of a comparison pulse 10, holds output levels V1, V2, V3 till the leading edge of the next comparison pulse 15 respectively and outputs the result as a phase comparison output 12. Since the band width where the side band wave exists is made narrow, the increase in jitter in the output signal is decreased.
JP62182761A 1987-07-21 1987-07-21 Phase locked loop oscillator Pending JPS6424631A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62182761A JPS6424631A (en) 1987-07-21 1987-07-21 Phase locked loop oscillator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62182761A JPS6424631A (en) 1987-07-21 1987-07-21 Phase locked loop oscillator

Publications (1)

Publication Number Publication Date
JPS6424631A true JPS6424631A (en) 1989-01-26

Family

ID=16123967

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62182761A Pending JPS6424631A (en) 1987-07-21 1987-07-21 Phase locked loop oscillator

Country Status (1)

Country Link
JP (1) JPS6424631A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008123542A1 (en) * 2007-03-29 2008-10-16 System Lsi Co. Ltd. Pll circuit device and control device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008123542A1 (en) * 2007-03-29 2008-10-16 System Lsi Co. Ltd. Pll circuit device and control device

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