JPS6417299U - - Google Patents
Info
- Publication number
- JPS6417299U JPS6417299U JP10906387U JP10906387U JPS6417299U JP S6417299 U JPS6417299 U JP S6417299U JP 10906387 U JP10906387 U JP 10906387U JP 10906387 U JP10906387 U JP 10906387U JP S6417299 U JPS6417299 U JP S6417299U
- Authority
- JP
- Japan
- Prior art keywords
- case
- plate
- seed
- slide plate
- paper
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 101100289061 Drosophila melanogaster lili gene Proteins 0.000 description 1
- 238000005192 partition Methods 0.000 description 1
Landscapes
- Sowing (AREA)
- Sheet Holders (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10906387U JPH0334239Y2 (US08124630-20120228-C00102.png) | 1987-07-17 | 1987-07-17 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10906387U JPH0334239Y2 (US08124630-20120228-C00102.png) | 1987-07-17 | 1987-07-17 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6417299U true JPS6417299U (US08124630-20120228-C00102.png) | 1989-01-27 |
| JPH0334239Y2 JPH0334239Y2 (US08124630-20120228-C00102.png) | 1991-07-19 |
Family
ID=31344970
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10906387U Expired JPH0334239Y2 (US08124630-20120228-C00102.png) | 1987-07-17 | 1987-07-17 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0334239Y2 (US08124630-20120228-C00102.png) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7372741B2 (en) | 1989-02-06 | 2008-05-13 | Renesas Technology Corp. | Nonvolatile memory apparatus having a processor and plural memories one or more of which is a nonvolatile memory having circuitry which performs an erase operation and an erase verify operation when the processor specifies the erase operation mode to the nonvolatile memory |
-
1987
- 1987-07-17 JP JP10906387U patent/JPH0334239Y2/ja not_active Expired
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7372741B2 (en) | 1989-02-06 | 2008-05-13 | Renesas Technology Corp. | Nonvolatile memory apparatus having a processor and plural memories one or more of which is a nonvolatile memory having circuitry which performs an erase operation and an erase verify operation when the processor specifies the erase operation mode to the nonvolatile memory |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0334239Y2 (US08124630-20120228-C00102.png) | 1991-07-19 |
