JPS6415858A - Multi-processor system - Google Patents

Multi-processor system

Info

Publication number
JPS6415858A
JPS6415858A JP17143587A JP17143587A JPS6415858A JP S6415858 A JPS6415858 A JP S6415858A JP 17143587 A JP17143587 A JP 17143587A JP 17143587 A JP17143587 A JP 17143587A JP S6415858 A JPS6415858 A JP S6415858A
Authority
JP
Japan
Prior art keywords
processor
constitution
processors
signal bus
wirings
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP17143587A
Other languages
Japanese (ja)
Other versions
JP2647092B2 (en
Inventor
Masahiko Washimi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP62171435A priority Critical patent/JP2647092B2/en
Publication of JPS6415858A publication Critical patent/JPS6415858A/en
Application granted granted Critical
Publication of JP2647092B2 publication Critical patent/JP2647092B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus

Abstract

PURPOSE:To decrease the number of wirings and to simplify the constitution of a multi-processor system by providing a common address signal bus to plural processor parts so that each processor part uses said signal bus in terms of time division. CONSTITUTION:A processor 1 can carry out the independent programs in parallel with each other. Each of such processors 1 gives an access to each memory 2. A common address signal bus 3 is set between those processors 1 and memories 2 so that each processor 1 can use the us 3 in terms of time division. In such a constitution, it is enough to provide a bus 3 equivalent to only the desired number of bits against the processors 1 and the memories 2. As a result, the number of wirings can be extremely decreased and the system constitution is simplified.
JP62171435A 1987-07-09 1987-07-09 Multi-processor system Expired - Fee Related JP2647092B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62171435A JP2647092B2 (en) 1987-07-09 1987-07-09 Multi-processor system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62171435A JP2647092B2 (en) 1987-07-09 1987-07-09 Multi-processor system

Publications (2)

Publication Number Publication Date
JPS6415858A true JPS6415858A (en) 1989-01-19
JP2647092B2 JP2647092B2 (en) 1997-08-27

Family

ID=15923069

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62171435A Expired - Fee Related JP2647092B2 (en) 1987-07-09 1987-07-09 Multi-processor system

Country Status (1)

Country Link
JP (1) JP2647092B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6347372B1 (en) 1998-03-20 2002-02-12 Fujitsu Limited Multiprocessor control system, and a boot device and a boot control device used therein

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5274244A (en) * 1975-12-17 1977-06-22 Nec Corp Coupling system inter-units
JPS5438031A (en) * 1977-08-29 1979-03-22 Spisak Edward Device of holding wheel trim

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5274244A (en) * 1975-12-17 1977-06-22 Nec Corp Coupling system inter-units
JPS5438031A (en) * 1977-08-29 1979-03-22 Spisak Edward Device of holding wheel trim

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6347372B1 (en) 1998-03-20 2002-02-12 Fujitsu Limited Multiprocessor control system, and a boot device and a boot control device used therein

Also Published As

Publication number Publication date
JP2647092B2 (en) 1997-08-27

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees