JPS6415000A - Chip packaging device - Google Patents

Chip packaging device

Info

Publication number
JPS6415000A
JPS6415000A JP62171616A JP17161687A JPS6415000A JP S6415000 A JPS6415000 A JP S6415000A JP 62171616 A JP62171616 A JP 62171616A JP 17161687 A JP17161687 A JP 17161687A JP S6415000 A JPS6415000 A JP S6415000A
Authority
JP
Japan
Prior art keywords
chip
light
thrusting
collet
stage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62171616A
Other languages
Japanese (ja)
Inventor
Mitsuaki Fujihira
Katsunori Nishiguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Priority to JP62171616A priority Critical patent/JPS6415000A/en
Priority to KR1019880008217A priority patent/KR910006372B1/en
Priority to KR1019880008295A priority patent/KR910006367B1/en
Priority to EP88110940A priority patent/EP0298496B1/en
Priority to CA000571589A priority patent/CA1325292C/en
Priority to DE3851721T priority patent/DE3851721T2/en
Publication of JPS6415000A publication Critical patent/JPS6415000A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Die Bonding (AREA)
  • Supply And Installment Of Electrical Components (AREA)

Abstract

PURPOSE:To make it possible to perform easily and correctly the positioning of a chip by a method wherein the external shape of the chip on a thrusting-up stage is projected on a monitoring means by making light emitted in such a way that the light is emitted through the thrusting-up stage and is incided in the monitoring means. CONSTITUTION:A chip packaging device is provided with a collet 13 arranged in its upper direction and a thrusting-up pin 14 arranged in its lower direction, a sucking hole 15 is formed in the lower end surface of the collet 13 and a chip 12 is vacuum-sucked by a prescribed suction force. The chip 12 is fed between the pin 14 and the collet 13 in a state that it is adhered on a chip fixing tape 11, a light source 20 is driven to make light emit through an insertion drum part 17 of a thrusting-up stage 16 and when the light is incided in a monitoring means, the pattern of the drum part 17 is bright and the pattern of the chip 12 having a small reflection factor is dark. Thereby, the contrast between light and shade appears clearly and the correct positioning of the chip 12 can be easily performed.
JP62171616A 1987-07-09 1987-07-09 Chip packaging device Pending JPS6415000A (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP62171616A JPS6415000A (en) 1987-07-09 1987-07-09 Chip packaging device
KR1019880008217A KR910006372B1 (en) 1987-07-09 1988-07-02 Chip package device
KR1019880008295A KR910006367B1 (en) 1987-07-09 1988-07-05 Chip package device
EP88110940A EP0298496B1 (en) 1987-07-09 1988-07-08 Adhesive tape for bonding chips thereon
CA000571589A CA1325292C (en) 1987-07-09 1988-07-08 Adhesive tape for bonding chips thereon
DE3851721T DE3851721T2 (en) 1987-07-09 1988-07-08 Adhesive tape for holding chips on it.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62171616A JPS6415000A (en) 1987-07-09 1987-07-09 Chip packaging device

Publications (1)

Publication Number Publication Date
JPS6415000A true JPS6415000A (en) 1989-01-19

Family

ID=15926473

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62171616A Pending JPS6415000A (en) 1987-07-09 1987-07-09 Chip packaging device

Country Status (2)

Country Link
JP (1) JPS6415000A (en)
KR (1) KR910006372B1 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04146629A (en) * 1990-10-09 1992-05-20 Matsushita Electric Ind Co Ltd Chip observation device
JP2010045296A (en) * 2008-08-18 2010-02-25 Ueno Seiki Kk Upthrust stage of upthrust device
JP2010186867A (en) * 2009-02-12 2010-08-26 Fuji Mach Mfg Co Ltd Method of positioning ejector pin and electronic component feeder using the same
JP2012508460A (en) * 2008-11-12 2012-04-05 エセック アーゲー Method for peeling and removing a semiconductor chip from a foil

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04146629A (en) * 1990-10-09 1992-05-20 Matsushita Electric Ind Co Ltd Chip observation device
JP2010045296A (en) * 2008-08-18 2010-02-25 Ueno Seiki Kk Upthrust stage of upthrust device
JP2012508460A (en) * 2008-11-12 2012-04-05 エセック アーゲー Method for peeling and removing a semiconductor chip from a foil
JP2010186867A (en) * 2009-02-12 2010-08-26 Fuji Mach Mfg Co Ltd Method of positioning ejector pin and electronic component feeder using the same

Also Published As

Publication number Publication date
KR910006372B1 (en) 1991-08-21
KR890003018A (en) 1989-04-12

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