JPS6414926A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS6414926A JPS6414926A JP16971987A JP16971987A JPS6414926A JP S6414926 A JPS6414926 A JP S6414926A JP 16971987 A JP16971987 A JP 16971987A JP 16971987 A JP16971987 A JP 16971987A JP S6414926 A JPS6414926 A JP S6414926A
- Authority
- JP
- Japan
- Prior art keywords
- film
- nitride film
- distribution
- silicon substrate
- growing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
PURPOSE:To make the distribution of the film thickness in a wafer uniform and to make the distribution of the film thickness within a batch uniform, by performing chemical vapor growth of a silicon nitride film by using trichlorosilane and ammonia under the specified conditions. CONSTITUTION:The using conditions of trichlorosilane and ammonia are as follows: growing temperature is 600-850 deg.C; growing pressure is 100mTorr-10 Torr; flow rate of SiHCP3 is 0.1-500cc/min; flow rate of NH3 is 1-200cc/min; gas ratio of (NH3/SiHCl3) is 1-100; and temperature gradient is 100 deg.C. In order to form a thick oxide film on a silicon substrate, a thin SiO2 film 22 is formed on the silicon substrate 11, and a nitride film 23 is formed thereon and patterned. The thickness of the nitride film 23 is made to be 500Angstrom or more. When thermal oxidation is performed, a thick SiO2 film 24 is formed on the surface of the silicon substrate, which is not masked with the nitride film. The growing is achieved approximately uniformly at the distribution of film thickness in a wafer within 4%.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16971987A JPS6414926A (en) | 1987-07-09 | 1987-07-09 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16971987A JPS6414926A (en) | 1987-07-09 | 1987-07-09 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6414926A true JPS6414926A (en) | 1989-01-19 |
Family
ID=15891592
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16971987A Pending JPS6414926A (en) | 1987-07-09 | 1987-07-09 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6414926A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03192724A (en) * | 1989-12-21 | 1991-08-22 | Matsushita Electric Ind Co Ltd | Bipolar transistor and manufacture thereof |
| US5543343A (en) * | 1993-12-22 | 1996-08-06 | Sgs-Thomson Microelectronics, Inc. | Method fabricating an integrated circuit |
| US5834360A (en) * | 1996-07-31 | 1998-11-10 | Stmicroelectronics, Inc. | Method of forming an improved planar isolation structure in an integrated circuit |
-
1987
- 1987-07-09 JP JP16971987A patent/JPS6414926A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03192724A (en) * | 1989-12-21 | 1991-08-22 | Matsushita Electric Ind Co Ltd | Bipolar transistor and manufacture thereof |
| US5543343A (en) * | 1993-12-22 | 1996-08-06 | Sgs-Thomson Microelectronics, Inc. | Method fabricating an integrated circuit |
| US5834360A (en) * | 1996-07-31 | 1998-11-10 | Stmicroelectronics, Inc. | Method of forming an improved planar isolation structure in an integrated circuit |
| US6046483A (en) * | 1996-07-31 | 2000-04-04 | Stmicroelectronics, Inc. | Planar isolation structure in an integrated circuit |
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