JPS6384352U - - Google Patents

Info

Publication number
JPS6384352U
JPS6384352U JP1986179196U JP17919686U JPS6384352U JP S6384352 U JPS6384352 U JP S6384352U JP 1986179196 U JP1986179196 U JP 1986179196U JP 17919686 U JP17919686 U JP 17919686U JP S6384352 U JPS6384352 U JP S6384352U
Authority
JP
Japan
Prior art keywords
led
led array
array
transparent substrate
head
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1986179196U
Other languages
English (en)
Japanese (ja)
Other versions
JPH0721329Y2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1986179196U priority Critical patent/JPH0721329Y2/ja
Publication of JPS6384352U publication Critical patent/JPS6384352U/ja
Application granted granted Critical
Publication of JPH0721329Y2 publication Critical patent/JPH0721329Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73257Bump and wire connectors

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Dot-Matrix Printers And Others (AREA)
  • Printers Or Recording Devices Using Electromagnetic And Radiation Means (AREA)
  • Laser Beam Printer (AREA)
  • Exposure Or Original Feeding In Electrophotography (AREA)
JP1986179196U 1986-11-21 1986-11-21 Ledアレ−ヘツド Expired - Lifetime JPH0721329Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1986179196U JPH0721329Y2 (ja) 1986-11-21 1986-11-21 Ledアレ−ヘツド

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1986179196U JPH0721329Y2 (ja) 1986-11-21 1986-11-21 Ledアレ−ヘツド

Publications (2)

Publication Number Publication Date
JPS6384352U true JPS6384352U (US07223432-20070529-C00017.png) 1988-06-02
JPH0721329Y2 JPH0721329Y2 (ja) 1995-05-17

Family

ID=31122042

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1986179196U Expired - Lifetime JPH0721329Y2 (ja) 1986-11-21 1986-11-21 Ledアレ−ヘツド

Country Status (1)

Country Link
JP (1) JPH0721329Y2 (US07223432-20070529-C00017.png)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04356978A (ja) * 1991-05-31 1992-12-10 Kyocera Corp 画像装置
JP2001036148A (ja) * 1999-07-23 2001-02-09 Matsushita Electric Works Ltd 光源装置
JP2008186795A (ja) * 2007-01-31 2008-08-14 Casio Comput Co Ltd 発光装置及び印刷装置
JP2008186794A (ja) * 2007-01-31 2008-08-14 Casio Comput Co Ltd 発光装置及び印刷装置
JP4735794B2 (ja) * 2003-06-30 2011-07-27 信越半導体株式会社 発光モジュール
JP2014107502A (ja) * 2012-11-29 2014-06-09 Citizen Holdings Co Ltd 発光装置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5598879A (en) * 1979-01-23 1980-07-28 Oki Electric Ind Co Ltd Light emitting element arraying unit
JPS60117154U (ja) * 1984-01-17 1985-08-08 沖電気工業株式会社 光学式記録ヘツド
JPS61123555U (US07223432-20070529-C00017.png) * 1985-01-19 1986-08-04

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5598879A (en) * 1979-01-23 1980-07-28 Oki Electric Ind Co Ltd Light emitting element arraying unit
JPS60117154U (ja) * 1984-01-17 1985-08-08 沖電気工業株式会社 光学式記録ヘツド
JPS61123555U (US07223432-20070529-C00017.png) * 1985-01-19 1986-08-04

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04356978A (ja) * 1991-05-31 1992-12-10 Kyocera Corp 画像装置
JP2001036148A (ja) * 1999-07-23 2001-02-09 Matsushita Electric Works Ltd 光源装置
JP4735794B2 (ja) * 2003-06-30 2011-07-27 信越半導体株式会社 発光モジュール
JP2008186795A (ja) * 2007-01-31 2008-08-14 Casio Comput Co Ltd 発光装置及び印刷装置
JP2008186794A (ja) * 2007-01-31 2008-08-14 Casio Comput Co Ltd 発光装置及び印刷装置
JP2014107502A (ja) * 2012-11-29 2014-06-09 Citizen Holdings Co Ltd 発光装置

Also Published As

Publication number Publication date
JPH0721329Y2 (ja) 1995-05-17

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