JPS6384124U - - Google Patents

Info

Publication number
JPS6384124U
JPS6384124U JP17850286U JP17850286U JPS6384124U JP S6384124 U JPS6384124 U JP S6384124U JP 17850286 U JP17850286 U JP 17850286U JP 17850286 U JP17850286 U JP 17850286U JP S6384124 U JPS6384124 U JP S6384124U
Authority
JP
Japan
Prior art keywords
liquid crystal
counter electrode
substrate
value
display device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17850286U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP17850286U priority Critical patent/JPS6384124U/ja
Publication of JPS6384124U publication Critical patent/JPS6384124U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の第1実施例における液晶表示
装置に採用し得る駆動回路のブロツク図、第2図
は第1図の要部における波形図、第3図は本考案
の第2実施例における液晶表示装置の駆動回路の
ブロツク図、第4図は第2図の要部における波形
図、第5図は本考案の第3実施例における液晶表
示装置の駆動回路の回路図、第6図は本考案の液
晶表示装置のパネルにおける電極配置図、第7図
は第5図の回路における対向電極電位と映像信号
との関係を示す波形図である。第8図は従来の2
40行のアクテイブマトリクスパネルの電極回路
図、第9図は第8図のパネルに印加する映像信号
波形図、第10図は従来の480行のアクテイブ
マトリクスパネルの電極回路図、第11図は第1
0図のパネルに印加する映像信号波形図、第12
図イ乃至ハ、はフリツカを説明する波形図である
。 1……セグメント電極、10……LCDパネル
、20,30……第1,第2列駆動部、40,5
0……第1,第2行駆動部、53,54……列分
割対向電極、60,70……第1,第2極性反転
回路、80……同期制御回路。
FIG. 1 is a block diagram of a drive circuit that can be used in a liquid crystal display device according to a first embodiment of the present invention, FIG. 2 is a waveform diagram of the main part of FIG. 1, and FIG. 3 is a second embodiment of the present invention. 4 is a waveform diagram of the main part of FIG. 2, FIG. 5 is a circuit diagram of the driving circuit of the liquid crystal display device in the third embodiment of the present invention, and FIG. 7 is a diagram showing the arrangement of electrodes in the panel of the liquid crystal display device of the present invention, and FIG. 7 is a waveform diagram showing the relationship between the counter electrode potential and the video signal in the circuit of FIG. 5. Figure 8 shows the conventional 2
An electrode circuit diagram of a 40-row active matrix panel, FIG. 9 is a video signal waveform diagram applied to the panel in FIG. 8, FIG. 10 is an electrode circuit diagram of a conventional 480-row active matrix panel, and FIG. 1
Video signal waveform diagram applied to the panel in Figure 0, No. 12
Figures A to C are waveform diagrams illustrating flicker. 1... Segment electrode, 10... LCD panel, 20, 30... First and second column drive section, 40, 5
0...First and second row drive units, 53, 54... Column division counter electrodes, 60, 70... First and second polarity inversion circuits, 80... Synchronization control circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 複数の表示画素電極が行列配置された第1の基
板とこれに対向する対向電極を備えた第2の基板
との間に液晶物質を介在してなるアクテイブマト
リクス型の液晶表示装置に於いて、上記対向電極
を上記表示電極の列配置方向に延在するように適
数列に分割してなり、各表示画素電極に印加する
映像信号の極性を所定周期で反転させると共に各
分割対向電極間で独立した夫々の印加直流電圧の
電圧値を所定周期で第1の値と第2の値との間で
切り換え設定する事を特徴とする液晶表示装置。
In an active matrix type liquid crystal display device in which a liquid crystal material is interposed between a first substrate on which a plurality of display pixel electrodes are arranged in rows and columns and a second substrate opposite to the first substrate and provided with a counter electrode, The counter electrode is divided into an appropriate number of columns extending in the column arrangement direction of the display electrodes, and the polarity of the video signal applied to each display pixel electrode is reversed at a predetermined period and is independent between each divided counter electrode. A liquid crystal display device characterized in that the voltage value of each applied DC voltage is switched and set between a first value and a second value at a predetermined period.
JP17850286U 1986-11-20 1986-11-20 Pending JPS6384124U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17850286U JPS6384124U (en) 1986-11-20 1986-11-20

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17850286U JPS6384124U (en) 1986-11-20 1986-11-20

Publications (1)

Publication Number Publication Date
JPS6384124U true JPS6384124U (en) 1988-06-02

Family

ID=31120692

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17850286U Pending JPS6384124U (en) 1986-11-20 1986-11-20

Country Status (1)

Country Link
JP (1) JPS6384124U (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61112188A (en) * 1984-11-06 1986-05-30 キヤノン株式会社 Image display unit
JPS61141492A (en) * 1984-12-14 1986-06-28 ソニー株式会社 Liquid crystal display unit
JPS61177702A (en) * 1985-02-01 1986-08-09 Mitsubishi Electric Corp Mold coil
JPS61217021A (en) * 1985-03-22 1986-09-26 Asahi Glass Co Ltd Image display device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61112188A (en) * 1984-11-06 1986-05-30 キヤノン株式会社 Image display unit
JPS61141492A (en) * 1984-12-14 1986-06-28 ソニー株式会社 Liquid crystal display unit
JPS61177702A (en) * 1985-02-01 1986-08-09 Mitsubishi Electric Corp Mold coil
JPS61217021A (en) * 1985-03-22 1986-09-26 Asahi Glass Co Ltd Image display device

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