JPS6373768A - Picture processor - Google Patents

Abstract

PURPOSE:To constantly generate a modulated picture under a constant state and to reduce the fluctuation in a compressibility by providing a threshold generating means and an initializing means for initializing the threshold generating means for every scanning. CONSTITUTION:In a binarization circuit 205, an output from a picture modulation pattern ROM 603 is used as a slice level to execute a binarization processing. Within an interval in which a main scanning direction picture interval signal HE or a sub-scanning scanning direction interval signal VE goes to a high level, a main scanning direction modulated picture output interval signal HMDF of a sub-scanning direction modulated picture output interval signal VMDF is set at an arbitrary position, respective modulation control circuits 601, 602 respectively detect the leading edge of the HMDF, the VMDF and reset an address counter applied to the picture modulation pattern ROM 603. Accordingly, the address to the ROM 603 is constantly started from a constant value to make the pattern of the slice level to be printed to a comparator circuit 606 constant and the modulated picture can be made constant.

Description

[Detailed description of the invention] [Industrial application field] The present invention is an image that reads a manuscript image! A related to the medical equipment.

[Prior Art] Conventionally, in this type of device, the image modulation start position was set completely unrelated to the section signal indicating whether or not to output the image modulation signal, so the modulated image signal output section could be set arbitrarily. If this setting is set, there is a drawback that the modulated image is not constant, and therefore, when pressure area compression processing is performed, there is a drawback that the compression rate fluctuates greatly.

[Problems to be Solved by the Invention] In view of the above-mentioned drawbacks of the conventional example, the present invention makes it possible to arbitrarily change the modulated image output section by synchronizing the image signal modulation start position with the modulated image output section signal. To provide a video processing device that eliminates the drawback that the modulated image is not constant even when the image data is set, and makes it possible to reduce fluctuations in the compression rate even when the band compression processing is performed. be.

[Means for solving the problem] In order to solve this problem, the present invention has the following configuration.

That is, input means for scanning a document and inputting it as pixel data, threshold generation means for generating threshold values in a predetermined order in synchronization with the input of the pixel data, and initialization means for initializing the threshold generation means for each scan. Equipped with.

[Operations] In the configuration of the present invention, pixel data inputted by the input means is initialized by the initialization means and binarized pixel data is generated using a threshold value generated.

[Embodiments] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[Explanation of external view and IT diagram (Figs. 2 and 3) Fig. 2 is an external view of the document image reading device 1 of this embodiment,
FIG. 3 is a diagram showing the internal configuration of the document image reading device 1. As shown in FIG. In the figure, reference numeral 2 denotes a main body of the original image reading apparatus, which illuminates the original on a platen glass 27 with an original illumination unit 24, and forms an image of the original on the CCD 22 with a lens 26. Reference numeral 3 denotes a self-excited document feeding device, in which the document on the document placement table 31 is conveyed in the direction of the arrow B shown by the broken line, and is ejected onto the document discharge table 32 .

[Operation Description (FIGS. 3 and 1)] FIG. 1 is a block diagram showing the circuit configuration of the CCD driver 23 and the control unit 21.

The operation of the document reading device will be explained below with reference to FIGS.
There is a sheet-through mode in which images are read while being conveyed using a DF (referred to as DF) 3, and a blank mode in which a bound document such as a book is placed on the platen glass 27 and the image is scanned by an optical system. There are two modes:

[Explanation of sheet-through mode] First, the sheet-through mode will be explained.

The document reading device 1 (hereinafter referred to as reader) of this embodiment is connected to external devices (digital printer, personal computer, etc.), and communicates control signals with these external devices and outputs image signals to the external devices. teeth,
This is done via the interface circuit 207. Now, the state in which the original is placed on the original copying table 31 of the ADF 3 (
(image facing upward), instructions for various modes are input by an external device. This mode instruction is, for example, what pixel density to set (in this example, 400 dpi, 300 dp+
.

There are three modes of 200 dpi, but the mode is not limited thereto. ), or whether to convert the image signal into a binary code or a multi-value signal. CPU20B that received this
is set in advance by the timing generation circuit 209 and selector 2.
A control signal is output to 06 to set the pixel density and image signal. Note that the operations of the timing generation circuit 209 and the selector 206 will be described later. Further, the original illumination unit 24 of the optical system is positioned at the original reading position (third position) in the ADF 3.
22 in the figure) using an optical surface sensor (not shown). Moreover, this lighting unit 24
In the figure, six strokes are possible from point P2 to point P3. In this embodiment, the original illumination unit 24 initially stops at point 21 in FIG. 3, and moves in the direction of the original reading position in the ADF 3 in response to a command to start reading the original from an external device. When the aforementioned optical position sensor detects that the 22nd point has been reached, the 8 points of the document illumination unit 24 are stopped, and the CPU 208 outputs a lamp control signal to turn on the lamp and send the document to the ADF 3. Outputs feeding start command. As a result, the original placed on the original placing table 31 of the ADF 3 is conveyed in the direction of arrow B toward the path indicated by the broken line in FIG. In addition, since the reader 1 of this embodiment uses a stepping motor as the motor used to drive the ADF 3 and document illumination unit 24, the speed of conveyance and scanning can be adjusted by changing the frequency of pulses for driving the motor. can be changed freely. Further, whether the leading edge of the document has reached the document illumination position of the reader 2 is detected by a document leading edge detection sensor (not shown) provided in the ADF 3. Until the document reaches the document illumination position, the image formed on the CCD 22 is converted into digital values (binary or multivalued) and input to the interface circuit 207, as will be described later. Since this is not the original image, the CPU 208 gives a control signal to the interface circuit 207 so as not to output the image signal. When the original reaches the original illumination position, the CPU 208 outputs a control signal to enable image signal output to the interface circuit 207, and the read image signals are sent one after another to an external device. After that, when the trailing edge of the document has finished passing the document illumination position (detected by the document leading edge detection sensor), the interface circuit 207 outputs the image signal by again giving the interface circuit 207 a control signal that disables image signal output. At the same time, a document reading completion signal is output to an external device. After this, if the command to start reading the original does not come from the external device within a certain period of time,
The CPU 208 turns off the lamp of the original illumination unit 24.
Then, it moves to the initial position 21 points and ends the operation.

[Book mode explanation] Next, book mode will be explained.

In book mode, the original is placed on the platen glass 27.
In Figure 3, the document is placed so that the right end is the leading edge of the document. That is,
To make it easier for the original to hang on the platen glass 27,
One end of the ADF 3 can be opened and closed with the reader 2 and a hinge. Further, the right end of the optical system document illumination unit 24 is at the initial position a P 3 points in FIG. 3, and the position is confirmed by an optical position sensor (not shown) as in the sheet mode. Now, the pixel density and image signal settings before starting to read the document are the same as in the sheet mode. When a document reading start command is input from an external device, the CPU 208 first moves the document illumination unit 24 at point 21 to the initial position of book mode at point 23, and then outputs a lamp control signal to turn on the lamp. .

At this point, the scanner does not immediately start scanning for document reading, but waits for approximately 300 to 500 m5ec until the light intensity of the lamp stabilizes. During this time, image signals are input to the interface circuit 207 as in the sheet mode, but the CPU
Due to the control signal 208, it is not output to the external device. When a document reading start command is input from an external device, the document illumination unit 24 immediately starts scanning in the direction of arrow A in FIG. 3.

From the initial position of the original illumination unit 24 to the platen glass 2
There is a distance of about 2 to 3 mm from the leading edge of the original on the document 7, and the scanning speed of the optical system by the motor is controlled to be stable during this time. When the original illumination unit 24 reaches the leading edge position of the original, the CPU 208 controls the interface circuit 207.
A control signal is output to enable image signal output, and the read image signals are sent one after another to an external device. The scanning length of the optical system is uniquely determined by the number of pulses that the CPU 208 uses to drive the motor, so when the CPU 208 outputs the required number of pulses to the motor, it determines that document reading is complete and outputs the lamp 0FF1 image signal. Not possible, controls the motor reversal and outputs a document reading completion signal to the external device. Under the motor reversal control of the CPU 208, the document irradiation unit 24 moves in the direction opposite to the arrow A in FIG. 3, and stops when the optical position sensor detects that it has reached the initial position 23. If the next document reading start command is not received from the external device during this optical system return period, the document irradiation unit 21 is moved again to the initial position e P l and the operation is completed.

[Explanation of circuit operation (FIGS. 1 and 4)] Next, the circuit operation on the wood grain side will be explained using the block diagram shown in FIG. The CCD 22 on the CCD driver 23 receives φ1. φ2. It is driven through the CCD drive circuit 203 by the timing signal φR1φSH (FIG. 4). The image analog signal output from the CCD 22 is amplified by the AMP 201 and sent to the A/D converter 2.
02 is input. In the A/D converter 202, the image signal is converted from an analog signal to a 4-bit digital signal by the OAD timing signal generated by the timing generation circuit 209, and outputted to the control unit. The control unit can output this digital image signal to an external device in either of the two modes mentioned above, ie, binary mode or multilevel mode. Which of these two modes to output is determined by a command from an external device, and the CPU2
08 outputs a control signal to the selector 206. In multi-value mode, selector 206 selects a 4-bit image signal.
is selected and the interface circuit 207
is input. In the case of multi-value mode, the interface circuit 207 backs up the 4-bit signal for 2 pixels to 8 bits and outputs it to an external device. In binary mode,
2 depending on the slice level output from CPU20B.
The 4-bit image signal is converted to 1-bit by the value conversion circuit 205 and input to the selector 26.

There are two slice levels. One is a level specified by an external device; in this case, the CPU 208 outputs the slice level specified by the external device to the binarization circuit 205 as is. The other is the slice level determined by the background density detection circuit 204. The background density detection performed in this case involves detecting the maximum density value (the brightest value) for each line in the main scanning direction of the image, which is taken in by the CPU 208, and the result of averaging several lines is set as a slice level by the binarization circuit 205. A method is used to output the data to . The image signal binarized by the above method is input to the selector 206, which selects it and inputs it to the interface circuit 207. In the case of the binarization mode, the interface circuit 207 backs eight pixels at once and outputs them as eight dots to an external device.

[Description of Pixel Density Conversion (FIGS. 5(a) to (e)) 1 Next, the method of pixel density conversion performed in this embodiment will be described. FIGS. 5A to 5C show enlarged views of the enable signal VE signal in the sub-scanning direction and the system clocks CLK and CLK. Figure 5(a) is, for example, 400d
In the case of pi, one period of the VE signal corresponds to one period of the optical system scanning motor.
The period of CLK is the same as that of timing signals such as φ1 and φ2 that drive the CCD. Figure 5(b) is 200dpi, that is, Figure 5(a)
), both the HE flaw signal CLK has a period of 172 as shown in FIG. 5(a). For the VE signal,
Controlled by the CPU 208, the motor rotates in the same way as in the case of Fig. 5(a), and image signals are obtained at the same cycle, but the output is now output to the external device only when the VE signal is active. ing. Also, the CLK signal is
By controlling the timing generation circuit 209 by the PU 208, the background density detection circuit 204 and the binarization circuit 2.5
, and the interface circuit 207 as shown in FIG. 5(b).
In order to output the CLK signal shown by , the image signal is output to the interface circuit 207 once every two pixels. Therefore, the pixel density in both main scanning and sub-scanning becomes 1/2. Similarly, in FIG. 5(C), the pixel density is 100 dpi, which is 1/4 of that in FIG. 5(a).

[Description of Binarization Circuit (M6 to FIG. 8)] FIG. 6 is an internal block diagram of the binarization circuit 205. In FIG. 6, 601 is a main scanning direction modulation control circuit, and 602 is a sub-scanning direction modulation control circuit. Further, 603 is an image modulation pattern ROM for storing an image modulation pattern;
Dither pattern data as shown in the figure is stored, and its operation will be described later. 605 is a comparison circuit for binarization without performing image modulation processing, 604 is a selector for outputting either a modulated image signal or a binarized image signal, and 606 is a comparison circuit for outputting either a modulated image signal or a binary image signal. This is a comparison circuit for value conversion operation.

Now, it can be seen that there are two types of processing in this binarization circuit 205. First, the comparison circuit 605 compares the A/D signal output from the A/D converter 202 with the threshold value of the data from the CPU 208 and outputs the result as a binarized signal. Therefore, the data serving as the threshold value at this time is the slice level described above, and its value is determined by an external device or by the background density detection circuit 204.

The other is a binarized signal obtained by binarizing the output from the image modulation pattern ROM 603 as a slice level. Here, the main scanning direction modulation control circuit 601 and the sub-scanning direction control circuit 602 are composed of latches and counters, and each outputs to the image modulation pattern ROM 503 as a 2-bit address bus.

Below, the operation of this image modulation pattern ROM 603 will be explained in the seventh section.
This will be explained using FIG. 8 and FIG. FIG. 7 is an example of an operation timing chart, and FIG. 8 is an example of an image modulation pattern R.
This is an example of OM. For example, the main scanning direction modulation control circuit 60
Address output from 1 and sub-scanning direction modulation control circuit 6
When the addresses output from 02 are "1" and "2", respectively, "3" is selected as shown in FIG. 8 and output to the comparison circuit 606.The comparison circuit 606 compares this value with
A logical signal compared with the D signal is output to the selector 604. Therefore, within the section where the main scanning direction image section signal HE or the sub-scanning direction image section signal E is active (when at high level), the main scanning direction modulated image output section signal HMDF or the sub-scanning direction modulated image output section The signal VMDF is set at an arbitrary location, but the respective modulation control circuits 601 and 602 are set to HMDF and VMDF, respectively.
Detecting the rising edge of DF, image modulation pattern RO
Reset the address counter given to M603. Then, in FIG. 8, even if HMDF and VMDF are image section signals HE and VE, even if they are arbitrary sections of the image section signal HE or VE, when scanning the next document, the same address will be sent at the same timing as the previously scanned and output data. It will be output to the image modulation pattern ROM 503. Therefore, the address to the image modulation pattern ROM 603 always starts from a constant value, and the slice level pattern to be printed to the comparison circuit 606 becomes constant, making it possible to keep the modulation image constant. When performing 1ii processing, this has the effect of reducing fluctuations in compression ratio.

Further, in this embodiment, the dither matrix stored in the image modulation pattern ROM has been described as having a size of 4×4, but it may have a size other than that. In that case, it is sufficient to change the number of bits in main scanning and sub-scanning that address the ROM. Furthermore, image modulation pattern ROM
It is also possible to replace the threshold values stored in the matrix with RAM and freely change the threshold values stored in the matrix.

[Effects of the Invention] As explained above, according to the present invention, it is possible to always generate a modulated image in a constant state.

Especially when performing band compression processing, fluctuations in compression ratio can be reduced.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the circuit configuration of the image reading device of this embodiment, FIG. 2 is an external view of the image reading device of this embodiment, FIG. 3 is an internal configuration diagram of the image reading device of this embodiment, Figure 4 is a timing chart of control signals to the image sensor, Figures 5 (a) to (c) are timing charts for each reading density, Figure 6 is an internal configuration diagram of the binarization circuit of this embodiment, and Figure 7 is a timing chart of control signals to the image sensor. The figure shows the image modulation pattern RO in the binarization circuit shown in Figure 6.
FIG. 8 is a timing chart when addressing M. FIG. 8 is a diagram showing threshold data within the image modulation pattern shown in FIG. 6. In the figure, 1.2... Original image reading device, 3... Automatic document feeder, 21... Control unit, 22...
CCD, 23... CCD driver, 24... Original irradiation unit, 25... Reflection mirror, 26... Lens, 27... Platen glass, 31... Original ffff
11 Ttu stand, 32... Original discharge stand, 201... Amplifier, 202... A/D converter, 203... C
CD drive circuit, 204... background density detection circuit, 205
...Binarization circuit, 206...Selector, 207...
・Interface circuit, 208...CPU1209・
...Timing signal generation circuit, 210...O, S, C
, 211... Modulation interval signal generation circuit, 601... Main scanning direction modulation control circuit, 602... Sub scanning direction modulation control circuit, 603... Image modulation pattern ROM, 604
. . . Selector, 605 . . . Comparison circuit. Patent applicant Canon Co., Ltd. Figure 2 2F53

Claims (2)

[Claims] (1) Input means for scanning a document and inputting it as pixel data, threshold generation means for generating threshold values in a predetermined order in synchronization with the input of the pixel data, and initialization for initializing the threshold generation means for each scan. An image processing apparatus comprising means for binarizing the pixel data using the threshold value. (2) The image processing apparatus according to claim 1, wherein the initializing means resets a counter of an address for generating a threshold value.