JPS637011A - Voltage comparator with built-in hysteresis - Google Patents

Voltage comparator with built-in hysteresis

Info

Publication number
JPS637011A
JPS637011A JP61151952A JP15195286A JPS637011A JP S637011 A JPS637011 A JP S637011A JP 61151952 A JP61151952 A JP 61151952A JP 15195286 A JP15195286 A JP 15195286A JP S637011 A JPS637011 A JP S637011A
Authority
JP
Japan
Prior art keywords
reference potential
voltage
hysteresis
potential point
built
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61151952A
Other languages
Japanese (ja)
Inventor
Hiromi Kashiai
樫合 弘美
Hitoshi Ishikawa
仁 石川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP61151952A priority Critical patent/JPS637011A/en
Publication of JPS637011A publication Critical patent/JPS637011A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To easily set a hysteresis voltage with high accuracy while decreasing the number of components to reduce the cost, by connecting a collector of a transistor (TR) for a 1st differential amplifier to a reference potential point. CONSTITUTION:A TR 23 is a PNP TR as the 1st differential amplifier TR and a TR 24 is a PNP TR as the 2nd differential amplifier TR. In applying a voltage sufficiently lower than a reference potential of a reference potential point 5 to an input terminal 3, the TR 23 is turned on and the TR 24 is turned off. In this case, since a current I12 from a constant current source 12 flows to the reference potential point 5 from a collector of the TR 23, the level of the reference potential is increased by a value of I12 X R4. Conversely, in applying a voltage sufficiently higher than the reference potential of the reference potential point 5 to the input terminal 3, the TR 23 is turned off and the TR 24 is turned on. Since no current flows from the collector of the TR 23 to the reference potential point 5 in this case, the reference potential is not increased.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、例えば発振器、検出回路等に利用されるヒ
ステリシス内蔵電圧比較器に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a voltage comparator with built-in hysteresis used, for example, in an oscillator, a detection circuit, etc.

〔従来の技術〕[Conventional technology]

第2図は従来使用されているビステリシス内蔵電圧比較
器を示す回路図である。乙の図において、1は電圧がV
 ccの電源に接続された電源端子、2はGND端子、
3は入力端子、4ば出力端子、5は基準電位点、6は入
力トランジスタ(以下トランジスタを単にTrという)
、7は基準入力Tr。
FIG. 2 is a circuit diagram showing a conventionally used voltage comparator with built-in bisteresis. In the figure B, 1 indicates that the voltage is V
Power supply terminal connected to cc power supply, 2 is GND terminal,
3 is an input terminal, 4 is an output terminal, 5 is a reference potential point, and 6 is an input transistor (hereinafter, the transistor is simply referred to as Tr)
, 7 is a reference input Tr.

8.9は差動増幅器を構成するTr、10.11は前記
入力Tr6.基準入力Tr7に電流を供給する定電流源
、12は前記Tr8,9に電流を供給する定電流源、1
3ば出力駆動点、14は出力Tr、15,17,18は
それぞれ抵抗値がR1゜R2p R3である抵抗器、1
9はそのオノ、オフにより基準電位の増減を直接制御ず
ろ′I″r、16゜20.21は前記出力Tr14.T
r1gの制御用の抵抗器である。なお、ととて入力1.
’ r 6 、基準人力Tr7.Tr8,9ばPNP型
、出力Tr14、Tr19はNPN型である。
8.9 is a Tr constituting a differential amplifier, and 10.11 is the input Tr 6. 12 is a constant current source that supplies current to the reference input Tr7; 12 is a constant current source that supplies current to the Tr8 and 9;
3 is an output driving point, 14 is an output Tr, 15, 17, and 18 are resistors each having a resistance value of R1°R2p R3, 1
9 is on/off to directly control the increase/decrease of the reference potential. 16°20.21 is the output Tr14.T.
This is a resistor for controlling r1g. In addition, Tototo Input 1.
' r 6, standard human power Tr7. Tr8 and Tr9 are PNP type, and output Tr14 and Tr19 are NPN type.

次に動作について説明する。Next, the operation will be explained.

入力端子3に基準電位点5の基準電位に比べて十分高い
電圧が加わっていると、T’r8がオフし、Tr9がオ
ンする。すると、出力駆動点13はH”状態になり、出
力端子4は′L”になる。
When a voltage sufficiently higher than the reference potential of the reference potential point 5 is applied to the input terminal 3, T'r8 is turned off and Tr9 is turned on. Then, the output driving point 13 goes into the H" state, and the output terminal 4 goes into the 'L" state.

またこの時、Tr19はオンするので、基準入力Tr7
の入力電流Ie7を無視すると、基準電位点5の基準電
位は VccxIt 、+ 結条層””−−−(11から、T
r19のコレクターエミッタ間電圧をVciとすると (V cc −V ce ) X  R−−(21Rt
+R2 に下がり、入力端子3がこれ以下の電圧になって、はじ
めて出力端子4はH”になる。ここで、VC!+は0.
05〜0.2v程度である。
Also, at this time, since Tr19 is turned on, the reference input Tr7
Ignoring the input current Ie7 of the reference potential point 5, the reference potential of the reference potential point 5 is VccxIt,
Letting the collector-emitter voltage of r19 be Vci, (V cc -V ce ) X R--(21Rt
+R2, and only when the voltage at the input terminal 3 becomes lower than this does the output terminal 4 become H".Here, VC!+ is 0.
It is about 0.05 to 0.2v.

反対に入力端子3に基準電位点5の基準電位に比べて十
分低い電圧が加わっていると、Tr8がオンし、Tr9
がオフする。その時、出力端子4はII HITとなる
。またこの時、Tr19はオフするので、基準電位点5
の基準電位は第(1)式のように上がり、入力端子3に
これ以上の電圧が加わってはしめて出力端子4は“L″
になる。
On the other hand, if a voltage sufficiently lower than the reference potential of the reference potential point 5 is applied to the input terminal 3, Tr8 turns on and Tr9
turns off. At that time, the output terminal 4 becomes II HIT. Also, at this time, since Tr19 is turned off, the reference potential point 5
The reference potential of increases as shown in equation (1), and if a voltage higher than this is applied to input terminal 3, output terminal 4 becomes "L".
become.

すなわち第(1)式−第(2)式 R+H−1L、、、(31 (VCcXR1+R2+R3)   (VCCVcg)
XH,+H。
That is, equation (1) - equation (2) R+H-1L, (31 (VCcXR1+R2+R3) (VCCVcg)
XH, +H.

がヒステリシス電圧となる。is the hysteresis voltage.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上記のような従来のヒステリシス内蔵電圧比較器では、
Tr19のオン、オフによってビステリシスを作ってい
たので、Tr19およびそれに付随する抵抗器20.2
1が必要でコスト高になるうえ、第(3)式で示したヒ
ステリシス電圧にTr19のコレクターエミッタ間電圧
vcEが入るため、その精度を十分に高くできないとい
う問題点があった。
In the conventional voltage comparator with built-in hysteresis, as shown above,
Since bisteresis was created by turning Tr19 on and off, Tr19 and its associated resistor 20.2
1 is required, which increases the cost, and since the collector-emitter voltage vcE of the Tr 19 is included in the hysteresis voltage shown in equation (3), there is a problem that the accuracy cannot be made sufficiently high.

この発明は、かかる問題点を解消するためになされたも
ので、素子数を減らしてコストを低減できるとともに、
容易に、かつ精度よくヒステリシス電圧を設定できるヒ
ステリシス内蔵電圧比較器を得る乙とを目的とする。
This invention was made to solve these problems, and it is possible to reduce costs by reducing the number of elements, and
Another object of the present invention is to obtain a voltage comparator with built-in hysteresis that can easily and accurately set a hysteresis voltage.

〔問題点を解決するための手段〕[Means for solving problems]

乙の発明に係るヒステリシス内蔵電圧比較器は、第1の
差動増幅用Trのコレクタを基準電位点に接続したもの
である。
The voltage comparator with built-in hysteresis according to the invention of B has the collector of the first differential amplification transistor connected to a reference potential point.

〔作用〕[Effect]

この発明においては、第1の差動増幅用Trが導通した
時、基準電位点の電圧が変化し、乙の変化分がヒステリ
シス電圧となる。
In this invention, when the first differential amplification transistor conducts, the voltage at the reference potential point changes, and the change in voltage B becomes the hysteresis voltage.

〔実施例〕〔Example〕

第1図は乙の発明のヒステリシス内蔵電圧比較器の一実
施例を示す回路図である。乙の図において、第2図と同
一符号は同一部分を示し、22ばその抵抗値がR4であ
るバイアス用の抵抗器、23は第1の差動増幅用Trと
してのPNP型のTr、24は第2の差動増幅用Trと
してのPNP型のTrである。
FIG. 1 is a circuit diagram showing an embodiment of the voltage comparator with built-in hysteresis according to the invention of Part B. In the figure B, the same symbols as in FIG. 2 indicate the same parts, 22 is a bias resistor whose resistance value is R4, 23 is a PNP type Tr as the first differential amplification Tr, 24 is a PNP type Tr serving as the second differential amplification Tr.

次に動作について説明する。Next, the operation will be explained.

例えば、入力端子3に基準電位点5の基準電位に比べて
十分低い電圧が加わっていると、Tr23がオンし、T
r24がオフする。この時、出力端子4は’ H”とな
る。そしてTr23のコレクタから基準電位点5に定電
流源12からの電流11□が流れるので、基準電位は基
準人力Tr7の入力電流■B2を無視すると VccX−”−・・・−−−・・−(4)R1+R4 から 1、、XR4・・・・・     (5)たけ上がる。
For example, if a voltage sufficiently lower than the reference potential of the reference potential point 5 is applied to the input terminal 3, the Tr23 turns on and the T
r24 turns off. At this time, the output terminal 4 becomes 'H'.Then, the current 11□ from the constant current source 12 flows from the collector of the Tr23 to the reference potential point 5, so the reference potential is calculated as follows, ignoring the input current ■B2 of the reference human power Tr7. VccX-"-...---...-(4) R1+R4 to 1, XR4... (5) Increases.

したがって、この後は入力端子3の電圧がこれ以上にな
ってはしめて出力端子4がL″になる。
Therefore, after this, the voltage at the input terminal 3 becomes higher than this, and the output terminal 4 becomes L''.

反対に、入力端子3に基準電位点5の基準電位に比べて
十分高い電圧が加わっていると、Tr23がオフし、T
r24がオンする。そして、このときには出力端子はI
I L IIとなるとともに、Tr23のコレクタから
基準電位点5に電流は流れないので基準電位は第(4)
式のようになり、入力端子3がこれ以下になってはしめ
て出力端子がパH′″になる。
On the other hand, if a sufficiently high voltage is applied to the input terminal 3 compared to the reference potential at the reference potential point 5, Tr23 turns off and T
r24 turns on. At this time, the output terminal is I
I L II and no current flows from the collector of Tr23 to the reference potential point 5, so the reference potential becomes the (4th)
As shown in the equation, when the input terminal 3 becomes lower than this, the output terminal becomes high.

すなわち、この発明では第(5)式がヒステリシス電圧
となり、これを従来回路の第(3)式と比較すると一見
して分かるように式が簡単であり、コレクターエミッタ
間電圧vcgのような不安定な要素を含まないため、精
度も向上する。
In other words, in this invention, the equation (5) becomes the hysteresis voltage, and if you compare it with the equation (3) of the conventional circuit, the equation is simple as you can see at first glance. Since it does not include any elements, the accuracy is also improved.

なお、上記実施例では、PNPTr差動入力を用いたが
、NPNTr差動入力を用いてトランジスタの極性をす
べて逆導電型に構成しても同様の効果を期待することが
できることはいうまでもない。
In the above embodiment, PNPTr differential input was used, but it goes without saying that the same effect can be expected even if NPNTr differential input is used and the polarities of all the transistors are of opposite conductivity type. .

〔発明の効果〕〔Effect of the invention〕

この発明は以上説明したとおり、第1の差動増幅用Tr
のコレクタを基準電位点に接続したので、従来より素子
数が少なくなリコスト低下ができるうえ、容易に、かつ
精度よくヒステリシス電圧が設定できるという効果があ
る。
As explained above, the present invention provides a first differential amplification Tr.
Since the collector of the device is connected to the reference potential point, the number of elements is smaller than that of the conventional device, which reduces costs, and the hysteresis voltage can be set easily and accurately.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は乙の発明のヒステリシス内蔵電圧比較器の一実
施例を示す回路図、第2図は従来のヒステリシス内蔵電
圧比較器を示す回路図である。 図において、1ば電源端子、2はGND端子、3は入力
端子、4は出力端子、5は基準電位点、6は入力Tr1
7は基準入力Tr、10,11゜12は定電流源、13
は出力駆動点、14は出力Tr、15,16,22は抵
抗器、23,24はTrである。 なお、各図中の同一符号は同一または相当部分を示す。 代理人 大 岩 増 雄   (外2名)第1図 第2図 手続補正書(自発) 1.事件の表示   特願昭61−151952号2、
発明の名称   ヒステリシス内蔵電圧比較器3、補正
をする者 5、補正の対象 図面 6、補正の内容 第1図を別紙のように補正する。 以  上
FIG. 1 is a circuit diagram showing an embodiment of the voltage comparator with built-in hysteresis according to the invention, and FIG. 2 is a circuit diagram showing a conventional voltage comparator with built-in hysteresis. In the figure, 1 is a power supply terminal, 2 is a GND terminal, 3 is an input terminal, 4 is an output terminal, 5 is a reference potential point, and 6 is an input Tr1
7 is a reference input Tr, 10, 11° 12 is a constant current source, 13
is an output driving point, 14 is an output Tr, 15, 16, 22 are resistors, and 23, 24 are Tr. Note that the same reference numerals in each figure indicate the same or corresponding parts. Agent Masuo Oiwa (2 others) Figure 1 Figure 2 Procedural amendment (voluntary) 1. Indication of the incident: Patent Application No. 151952/1986 2,
Title of the Invention The voltage comparator with built-in hysteresis 3, the person making the correction 5, the drawing to be corrected 6, and the details of the correction, Figure 1, are corrected as shown in the attached sheet. that's all

Claims (1)

【特許請求の範囲】[Claims] ベースを入力端子に接続した入力トランジスタのエミッ
タにそのベースを接続した第1の差動増幅用トランジス
タと、ベースを基準電位点に接続した基準入力トランジ
スタのエミッタにそのベースを接続しエミッタを前記第
1の差動増幅用トランジスタのエミッタに接続した第2
の差動増幅用トランジスタとから構成される差動増幅器
を有する電圧比較器において、前記第1の差動増幅用ト
ランジスタのコレクタを前記基準電位点に接続したこと
を特徴とするヒステリシス内蔵電圧比較器。
a first differential amplification transistor whose base is connected to the emitter of an input transistor whose base is connected to the input terminal; and a first differential amplification transistor whose base is connected to the emitter of a reference input transistor whose base is connected to a reference potential point, A second transistor connected to the emitter of the first differential amplification transistor.
A voltage comparator with built-in hysteresis, characterized in that the collector of the first differential amplification transistor is connected to the reference potential point. .
JP61151952A 1986-06-27 1986-06-27 Voltage comparator with built-in hysteresis Pending JPS637011A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61151952A JPS637011A (en) 1986-06-27 1986-06-27 Voltage comparator with built-in hysteresis

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61151952A JPS637011A (en) 1986-06-27 1986-06-27 Voltage comparator with built-in hysteresis

Publications (1)

Publication Number Publication Date
JPS637011A true JPS637011A (en) 1988-01-12

Family

ID=15529790

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61151952A Pending JPS637011A (en) 1986-06-27 1986-06-27 Voltage comparator with built-in hysteresis

Country Status (1)

Country Link
JP (1) JPS637011A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6756849B2 (en) * 2000-09-12 2004-06-29 Dupuis Timothy J. Absolute power detector
US6894565B1 (en) 2002-12-03 2005-05-17 Silicon Laboratories, Inc. Fast settling power amplifier regulator
US6897730B2 (en) 2003-03-04 2005-05-24 Silicon Laboratories Inc. Method and apparatus for controlling the output power of a power amplifier
US6917245B2 (en) 2000-09-12 2005-07-12 Silicon Laboratories, Inc. Absolute power detector

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6756849B2 (en) * 2000-09-12 2004-06-29 Dupuis Timothy J. Absolute power detector
US6917245B2 (en) 2000-09-12 2005-07-12 Silicon Laboratories, Inc. Absolute power detector
US6894565B1 (en) 2002-12-03 2005-05-17 Silicon Laboratories, Inc. Fast settling power amplifier regulator
US7173491B2 (en) 2002-12-03 2007-02-06 Silicon Laboratories Inc. Fast settling power amplifier regulator
US6897730B2 (en) 2003-03-04 2005-05-24 Silicon Laboratories Inc. Method and apparatus for controlling the output power of a power amplifier
US7106137B2 (en) 2003-03-04 2006-09-12 Silicon Laboratories Inc. Method and apparatus for controlling the output power of a power amplifier

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